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GET /api/patches/2219046/?format=api
{ "id": 2219046, "url": "http://patchwork.ozlabs.org/api/patches/2219046/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/7d1812d87058379ae9b4c2e9adcdf1cdb9eafb26.1775122853.git.matheus.bernardino@oss.qualcomm.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<7d1812d87058379ae9b4c2e9adcdf1cdb9eafb26.1775122853.git.matheus.bernardino@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-04-02T10:47:25", "name": "[v2,08/16] target/hexagon: add v68 HVX IEEE float misc insns", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "27c61c9b9d9321b8d28c678765ce46fe409cb293", "submitter": { "id": 90606, "url": "http://patchwork.ozlabs.org/api/people/90606/?format=api", "name": "Matheus Tavares Bernardino", "email": "matheus.bernardino@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/7d1812d87058379ae9b4c2e9adcdf1cdb9eafb26.1775122853.git.matheus.bernardino@oss.qualcomm.com/mbox/", "series": [ { "id": 498468, "url": "http://patchwork.ozlabs.org/api/series/498468/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498468", "date": "2026-04-02T10:47:20", "name": "hexagon: add missing HVX float instructions", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/498468/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219046/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219046/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", 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"richard.henderson@linaro.org, ale@rev.ng, anjo@rev.ng,\n brian.cain@oss.qualcomm.com, ltaylorsimpson@gmail.com,\n marco.liebel@oss.qualcomm.com, philmd@linaro.org,\n quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com", "Subject": "[PATCH v2 08/16] target/hexagon: add v68 HVX IEEE float misc insns", "Date": "Thu, 2 Apr 2026 03:47:25 -0700", "Message-Id": "\n <7d1812d87058379ae9b4c2e9adcdf1cdb9eafb26.1775122853.git.matheus.bernardino@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.37.2", "In-Reply-To": "<cover.1775122853.git.matheus.bernardino@oss.qualcomm.com>", "References": "<cover.1775122853.git.matheus.bernardino@oss.qualcomm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-ORIG-GUID": "Vberd3zamJEK9ZT5LmHMaS1etuvD3IKu", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDAyMDA5NyBTYWx0ZWRfX26wAynXiZDOl\n kHKiaJOQZG99Xzo2Hnsgw/U0NMkuBv8hdCfWF5UDKxlg/MB4ly1oBgWSG0lxws8BaHOwPcNjSpf\n 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"X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 suspectscore=0 malwarescore=0 spamscore=0 clxscore=1015\n bulkscore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 phishscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604020097", "Received-SPF": "pass client-ip=205.220.168.131;\n envelope-from=matheus.bernardino@oss.qualcomm.com;\n helo=mx0a-0031df01.pphosted.com", "X-Spam_score_int": "-7", "X-Spam_score": "-0.8", "X-Spam_bar": "/", "X-Spam_report": "(-0.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=1, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Add HVX IEEE floating-point miscellaneous instructions:\n- vassign_fp (vfmv): vector move\n- vfneg_hf, vfneg_sf: vector floating-point negate\n- vabs_hf, vabs_sf: vector absolute value\n\nSigned-off-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>\n---\n target/hexagon/imported/mmvec/encode_ext.def | 7 +++++++\n target/hexagon/imported/mmvec/ext.idef | 12 ++++++++++++\n 2 files changed, 19 insertions(+)", "diff": "diff --git a/target/hexagon/imported/mmvec/encode_ext.def b/target/hexagon/imported/mmvec/encode_ext.def\nindex d7f50db778..72daf8724c 100644\n--- a/target/hexagon/imported/mmvec/encode_ext.def\n+++ b/target/hexagon/imported/mmvec/encode_ext.def\n@@ -833,4 +833,11 @@ DEF_ENC(V6_vmin_sf,\"00011111110vvvvvPP1uuuuu010ddddd\")\n DEF_ENC(V6_vmax_hf,\"00011111110vvvvvPP1uuuuu011ddddd\")\n DEF_ENC(V6_vmin_hf,\"00011111110vvvvvPP1uuuuu100ddddd\")\n \n+/* IEEE FP move, negate, abs instructions */\n+DEF_ENC(V6_vassign_fp,\"00011110--0-0110PP1uuuuu001ddddd\")\n+DEF_ENC(V6_vfneg_hf,\"00011110--0-0110PP1uuuuu010ddddd\")\n+DEF_ENC(V6_vfneg_sf,\"00011110--0-0110PP1uuuuu011ddddd\")\n+DEF_ENC(V6_vabs_hf,\"00011110--0-0110PP1uuuuu100ddddd\")\n+DEF_ENC(V6_vabs_sf,\"00011110--0-0110PP1uuuuu101ddddd\")\n+\n #endif /* NO MMVEC */\ndiff --git a/target/hexagon/imported/mmvec/ext.idef b/target/hexagon/imported/mmvec/ext.idef\nindex 19135853d4..54bed47083 100644\n--- a/target/hexagon/imported/mmvec/ext.idef\n+++ b/target/hexagon/imported/mmvec/ext.idef\n@@ -3026,6 +3026,18 @@ ITERATOR_INSN_ANY_SLOT_2SRC(16,vmin_hf,\"Vd32.hf=vmin(Vu32.hf,Vv32.hf)\", \\\n \"Vector min of hf input\", VdV.hf[i] = qf_min_hf(VuV.hf[i], VvV.hf[i], \\\n \t&env->hvx_fp_status))\n \n+/* IEEE FP move, negate, abs instructions */\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vassign_fp, \"Vd32.w=vfmv(Vu32.w)\", \\\n+ \"Vector IEEE move\", VdV.w[i] = VuV.w[i])\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vfneg_hf, \"Vd32.hf=vfneg(Vu32.hf)\", \\\n+ \"Vector IEEE neg: hf\", VdV.hf[i] = float16_chs(VuV.hf[i]))\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vfneg_sf, \"Vd32.sf=vfneg(Vu32.sf)\", \\\n+ \"Vector IEEE neg: sf\", VdV.sf[i] = float32_chs(VuV.sf[i]))\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vabs_hf, \"Vd32.hf=vabs(Vu32.hf)\", \\\n+ \"Vector IEEE abs: hf\", VdV.hf[i] = float16_abs(VuV.hf[i]))\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vabs_sf, \"Vd32.sf=vabs(Vu32.sf)\", \\\n+ \"Vector IEEE abs: sf\", VdV.hf[i] = float32_abs(VuV.hf[i]))\n+\n /******************************************************************************\n DEBUG Vector/Register Printing\n ******************************************************************************/\n", "prefixes": [ "v2", "08/16" ] }