Patch Detail
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patch:
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put:
Update a patch.
GET /api/patches/2219022/?format=api
{ "id": 2219022, "url": "http://patchwork.ozlabs.org/api/patches/2219022/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260402095107.205439-3-sherry.sun@nxp.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260402095107.205439-3-sherry.sun@nxp.com>", "list_archive_url": null, "date": "2026-04-02T09:50:56", "name": "[V10,02/13] PCI: host-generic: Add common helpers for parsing Root Port properties", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "65e3a4aa92f474ec36f224478afcdeb2024f595e", "submitter": { "id": 77063, "url": "http://patchwork.ozlabs.org/api/people/77063/?format=api", "name": "Sherry Sun", "email": "sherry.sun@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260402095107.205439-3-sherry.sun@nxp.com/mbox/", "series": [ { "id": 498458, "url": "http://patchwork.ozlabs.org/api/series/498458/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=498458", "date": "2026-04-02T09:50:55", "name": "pci-imx6: Add support for parsing the reset property in new Root Port binding", "version": 10, "mbox": "http://patchwork.ozlabs.org/series/498458/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2219022/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2219022/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51718-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", 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"DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=WuwbxAuMyLI43XOLY5JuxEeUskoPPcPtGM/zWepoy9M=;\n b=lCxVstBz9aSRhzYJyLKdF4LMZr2YamtWYAbvCsEHGLfwOdC2pomouC4VSC5FN/WteTj5UBDqMesIRSdnPoZ23WGVjuiPJu7lkByKElUvNRYdbWW2nE+UONIbqxXmOSpXvr5SpWIal+oe5C91epZUUj90XWiuJIKT5KIiCt0o9nYqWZycbeyEeXJimqRbTCE2Xt35/MqQd5BkqsE1ggNk7DCRhOtfAqdKIS1ODFPiV7UD8Bp8z0ZbKuYIfMbjTZqZ+n9JJWECz6Zh5kYv7/n7nRaVq46vQKgoGSRKuNLbWiWJe0XT1+0HPanQeqzAYjaY1EiIudM8j4nNg34n+77dxw==", "From": "Sherry Sun <sherry.sun@nxp.com>", "To": "robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de", "Cc": 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z9YnB2hQSXFmI+jLWGcmu8djXueKVLtyphlEJZ5QHIFPpPVETb0nG9Ep5mKCLQJ0yHlLu6m93CPXiJJx5t3o95LjF6gSrVwoHbzLspNOZZ3eM+pV6FkvFD6kruxXzcXQO+eWTr3TIMrcjGDigCazI5k1YRbzEgaHoOF8nm8BMPDtWyT3BT5w0s8y/0hWmr1ghOFr++qOgOgRbyxSALWn+tq8X9rYM9UOCLLRT5CodhImhBp6yg7vwvOAWPdOx9ccQKGxTknGIsXLeGcMUpqZrYbs7Xg8B04NLQ4AHDlff+FIeUomdcnMByv5e0uHeYenV5WdcCEHu2Eg1m5yK927ThJ4+NzcadBiZ5lxGuJosYMMld4SwxbrcyrTQ+pvhXqBr0XNb8C/qUWyoDDey7HonBo6tP5JLGWKalH9SEXzqkky54e4TjpZ4EIydB4hhL9n3KC5cA1Jsv+u9h//6oak8uoOtJtx7+4incoWWfZs9/0lGmXgrJHqXw3fmKFiOKM/Px5AtP2rqBNKzs6UeIWdmMWiPqTxkQkL0cX+AJx3hoc6rM0pwYh5wj/n5cJb7Gp5JfTJs3RYhbzqzwF6FqEEJo/41X713GmI2Rlcxr7MaxDOHU7TWeGFrHmj+hDcbmM0fpdz1dF2V/u75kCp4Q9inM+xBAYiU2Df/3Z3VWqD01c+NBv+zom37EhTO5XS+uDsmcXIZHurthr74AP3tLLHUQNygkhNbJexZEynhYJCfYMA08fPqjNVOQsLlSc96gwbjbOhLHHrBe+Kn9hX3aIZtYIxZGwKp6rfyQ7QUjMM7W/NSAClP3yHrkx7iIW2LOafPjk7nMIDG3C/SJ719J0y2CFuO+TjQlnyqTd50lTKyI7KwelrlQjGdoubxiNRbpco7YCIn5ywi4B2QrpcX6dStRYNkIeO3cd2lnj3u5XeAXKnURv/Iqr6jKiamiQ5BCBYONeCwEh2sBvje+G8dDg+i7nEZ1f8Xyuyg6p0fveOa2nD/o7qGOy+Pq9QaBgAXxPiq/C0QlRdZ/JcAwGbbx8R+aGOaMB4xwU4QxMpmgdmogtEuMvv98tx/Z6u5e3gtfVsDuz3pxfzl6Jjs4jpcbF+PxdG5g2XD2By266kROOr6i347JXYGzYSvSf781D2REEKqCo6jCLMOaq9r2msVQlPvgoPCUqddK/fgBWT887/4WKzV5Ohc0LwGue3VfeffyOQiAEBIqjujcaHCB4qLe8F8aL86w1FZ0EyMZ3ksKV7/67xrY5qdGrIrjHL3Ac9NtGYnUpuKhHAMZbUa4Cjt59kwCtPJUqvAdWfD7lMxdEJ86HGXHx0czov23JtmMDV3XXDt+BIID0h71RMJquKOV4ih25gjq4ovVntDzZI6GPNNNFOz2yAkhY5bXC9B1ntd+fQh8YB1IBmgXRBkKdkvu473SzPTFWe8K5+25q8AoJ+y4cti8HbeXfJ9bA42IukJ3VLQ9Sw5SzPieqHTpbc4X0bE7V0/IbCQpA7egshpjdBufRaE709cKHlZDaW8YLpqF20nCUZ5hoQnZjGyCUNZW5QR10hVw6T5h4HFA8x283su88KQ7JFF6DKFWXn7mKu+oPbnPqFMrgTsU09LfEHvG0rumVPXQRlQisjEoPurGx93+3aBf975VQVgkxvmjYeUIh3TyAsSZVEu1xmoOP16S4SZrXWyFtWYunZITgF0mHU+BCIyfdsRtig/AQHXn8dSSRmF91a2xrY0v3pg1jZIOEXZQ==", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e76d3db6-79d6-4156-1a5a-08de909d3c95", "X-MS-Exchange-CrossTenant-AuthSource": "VI0PR04MB12114.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "02 Apr 2026 09:50:13.6077\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n Fv75gd43VOq2+GWOUMvFYaDwqxZHOzMh6Hd/A7ooIBQ5Gx7wAMtwh8YK1gX+cQMLq9uTboSDzSQXrLxncdLt/g==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM9PR04MB8471" }, "content": "Introduce generic helper functions to parse Root Port device tree nodes\nand extract common properties like reset GPIOs. This allows multiple\nPCI host controller drivers to share the same parsing logic.\n\nDefine struct pci_host_port to hold common Root Port properties\n(currently only reset GPIO descriptor) and add\npci_host_common_parse_ports() to parse Root Port nodes from device tree.\n\nAlso add the 'ports' list to struct pci_host_bridge for better maintain\nparsed Root Port information.\n\nSigned-off-by: Sherry Sun <sherry.sun@nxp.com>\n---\n drivers/pci/controller/pci-host-common.c | 77 ++++++++++++++++++++++++\n drivers/pci/controller/pci-host-common.h | 16 +++++\n drivers/pci/probe.c | 1 +\n include/linux/pci.h | 1 +\n 4 files changed, 95 insertions(+)", "diff": "diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c\nindex d6258c1cffe5..0fb6991dde7b 100644\n--- a/drivers/pci/controller/pci-host-common.c\n+++ b/drivers/pci/controller/pci-host-common.c\n@@ -9,6 +9,7 @@\n \n #include <linux/kernel.h>\n #include <linux/module.h>\n+#include <linux/gpio/consumer.h>\n #include <linux/of.h>\n #include <linux/of_address.h>\n #include <linux/of_pci.h>\n@@ -17,6 +18,82 @@\n \n #include \"pci-host-common.h\"\n \n+/**\n+ * pci_host_common_delete_ports - Cleanup function for port list\n+ * @data: Pointer to the port list head\n+ */\n+void pci_host_common_delete_ports(void *data)\n+{\n+\tstruct list_head *ports = data;\n+\tstruct pci_host_port *port, *tmp;\n+\n+\tlist_for_each_entry_safe(port, tmp, ports, list)\n+\t\tlist_del(&port->list);\n+}\n+EXPORT_SYMBOL_GPL(pci_host_common_delete_ports);\n+\n+/**\n+ * pci_host_common_parse_port - Parse a single Root Port node\n+ * @dev: Device pointer\n+ * @bridge: PCI host bridge\n+ * @node: Device tree node of the Root Port\n+ *\n+ * Returns: 0 on success, negative error code on failure\n+ */\n+static int pci_host_common_parse_port(struct device *dev,\n+\t\t\t\t struct pci_host_bridge *bridge,\n+\t\t\t\t struct device_node *node)\n+{\n+\tstruct pci_host_port *port;\n+\tstruct gpio_desc *reset;\n+\n+\treset = devm_fwnode_gpiod_get(dev, of_fwnode_handle(node),\n+\t\t\t\t \"reset\", GPIOD_ASIS, \"PERST#\");\n+\tif (IS_ERR(reset))\n+\t\treturn PTR_ERR(reset);\n+\n+\tport = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);\n+\tif (!port)\n+\t\treturn -ENOMEM;\n+\n+\tport->reset = reset;\n+\tINIT_LIST_HEAD(&port->list);\n+\tlist_add_tail(&port->list, &bridge->ports);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * pci_host_common_parse_ports - Parse Root Port nodes from device tree\n+ * @dev: Device pointer\n+ * @bridge: PCI host bridge\n+ *\n+ * This function iterates through child nodes of the host bridge and parses\n+ * Root Port properties (currently only reset GPIO).\n+ *\n+ * Returns: 0 on success, -ENOENT if no ports found, other negative error codes\n+ * on failure\n+ */\n+int pci_host_common_parse_ports(struct device *dev, struct pci_host_bridge *bridge)\n+{\n+\tint ret = -ENOENT;\n+\n+\tfor_each_available_child_of_node_scoped(dev->of_node, of_port) {\n+\t\tif (!of_node_is_type(of_port, \"pci\"))\n+\t\t\tcontinue;\n+\t\tret = pci_host_common_parse_port(dev, bridge, of_port);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn devm_add_action_or_reset(dev, pci_host_common_delete_ports,\n+\t\t\t\t\t&bridge->ports);\n+}\n+EXPORT_SYMBOL_GPL(pci_host_common_parse_ports);\n+\n static void gen_pci_unmap_cfg(void *ptr)\n {\n \tpci_ecam_free((struct pci_config_window *)ptr);\ndiff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/controller/pci-host-common.h\nindex b5075d4bd7eb..37714bedb625 100644\n--- a/drivers/pci/controller/pci-host-common.h\n+++ b/drivers/pci/controller/pci-host-common.h\n@@ -12,6 +12,22 @@\n \n struct pci_ecam_ops;\n \n+/**\n+ * struct pci_host_port - Generic Root Port properties\n+ * @list: List node for linking multiple ports\n+ * @reset: GPIO descriptor for PERST# signal\n+ *\n+ * This structure contains common properties that can be parsed from\n+ * Root Port device tree nodes.\n+ */\n+struct pci_host_port {\n+\tstruct list_head\tlist;\n+\tstruct gpio_desc\t*reset;\n+};\n+\n+void pci_host_common_delete_ports(void *data);\n+int pci_host_common_parse_ports(struct device *dev, struct pci_host_bridge *bridge);\n+\n int pci_host_common_probe(struct platform_device *pdev);\n int pci_host_common_init(struct platform_device *pdev,\n \t\t\t struct pci_host_bridge *bridge,\ndiff --git a/drivers/pci/probe.c b/drivers/pci/probe.c\nindex 162166c2a9a8..360d4a1e9353 100644\n--- a/drivers/pci/probe.c\n+++ b/drivers/pci/probe.c\n@@ -677,6 +677,7 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)\n {\n \tINIT_LIST_HEAD(&bridge->windows);\n \tINIT_LIST_HEAD(&bridge->dma_ranges);\n+\tINIT_LIST_HEAD(&bridge->ports);\n \n \t/*\n \t * We assume we can manage these PCIe features. Some systems may\ndiff --git a/include/linux/pci.h b/include/linux/pci.h\nindex 3e6b92fdabcd..545f6ad4a8a7 100644\n--- a/include/linux/pci.h\n+++ b/include/linux/pci.h\n@@ -642,6 +642,7 @@ struct pci_host_bridge {\n \tint\t\tdomain_nr;\n \tstruct list_head windows;\t/* resource_entry */\n \tstruct list_head dma_ranges;\t/* dma ranges resource list */\n+\tstruct list_head ports;\t\t/* Root Port list (pci_host_port) */\n #ifdef CONFIG_PCI_IDE\n \tu16 nr_ide_streams; /* Max streams possibly active in @ide_stream_ida */\n \tstruct ida ide_stream_ida;\n", "prefixes": [ "V10", "02/13" ] }