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GET /api/patches/2218892/?format=api
{ "id": 2218892, "url": "http://patchwork.ozlabs.org/api/patches/2218892/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/b127c1c7-61e8-49fc-b10b-a1acd23644eb@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<b127c1c7-61e8-49fc-b10b-a1acd23644eb@gmail.com>", "list_archive_url": null, "date": "2026-04-02T01:32:42", "name": "[RFC,v1,2/2] usb: phy: remove rockchip_usb2_phy.c", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f91421d35af3b7a0f2dc3559db9d98c4ec9bc622", "submitter": { "id": 75645, "url": "http://patchwork.ozlabs.org/api/people/75645/?format=api", "name": "Johan Jonker", "email": "jbx6244@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/b127c1c7-61e8-49fc-b10b-a1acd23644eb@gmail.com/mbox/", "series": [ { "id": 498416, "url": "http://patchwork.ozlabs.org/api/series/498416/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=498416", "date": "2026-04-02T01:31:14", "name": "Add Rockchip USBPHY DM driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498416/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218892/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218892/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=EwiRUyHz;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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charset=UTF-8", "Content-Transfer-Encoding": "7bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Remove rockchip_usb2_phy.c and replace it by phy-rockchip-usb2.c\nAdjust defconfigs. Enable CONFIG_DM_RESET where needed to compile\nth phy driver. Move usbphy node to the DT root in order to be found\nby the generic_phy_get_by_index() function. Remove a variable no\nlonger needed from an include file.\n\nSigned-off-by: Johan Jonker <jbx6244@gmail.com>\n---\n arch/arm/dts/rk3066a-u-boot.dtsi | 29 +++++++\n arch/arm/dts/rk3188-u-boot.dtsi | 29 +++++++\n arch/arm/dts/rk3288-u-boot.dtsi | 40 ++++++++++\n arch/arm/mach-rockchip/board.c | 28 -------\n configs/chromebit_mickey_defconfig | 2 +-\n configs/chromebook_jerry_defconfig | 2 +-\n configs/chromebook_minnie_defconfig | 2 +-\n configs/chromebook_speedy_defconfig | 2 +-\n configs/evb-rk3288-rk808_defconfig | 2 +-\n configs/firefly-rk3288_defconfig | 4 +-\n configs/miqi-rk3288_defconfig | 4 +-\n configs/mk808_defconfig | 2 +-\n configs/phycore-rk3288_defconfig | 3 +-\n configs/popmetal-rk3288_defconfig | 3 +-\n configs/rock-pi-n8-rk3288_defconfig | 2 +-\n configs/rock2_defconfig | 3 +-\n configs/rock_defconfig | 3 +-\n configs/tinker-rk3288_defconfig | 4 +-\n configs/tinker-s-rk3288_defconfig | 4 +-\n configs/vyasa-rk3288_defconfig | 2 +-\n drivers/usb/phy/Kconfig | 3 -\n drivers/usb/phy/Makefile | 1 -\n drivers/usb/phy/rockchip_usb2_phy.c | 113 ----------------------------\n include/usb/dwc2_udc.h | 1 -\n 24 files changed, 122 insertions(+), 166 deletions(-)\n delete mode 100644 drivers/usb/phy/rockchip_usb2_phy.c\n\n--\n2.39.5", "diff": "diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi\nindex d99db7853b59..994c0d44f3f5 100644\n--- a/arch/arm/dts/rk3066a-u-boot.dtsi\n+++ b/arch/arm/dts/rk3066a-u-boot.dtsi\n@@ -7,3 +7,32 @@\n \tstatus = \"disabled\";\n };\n\n+&grf {\n+\t/delete-node/ usbphy;\n+};\n+\n+/ {\n+\tusbphy: usbphy {\n+\t\tcompatible = \"rockchip,rk3066a-usb-phy\";\n+\t\trockchip,grf = <&grf>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tusbphy0: usb-phy@17c {\n+\t\t\treg = <0x17c>;\n+\t\t\tclocks = <&cru SCLK_OTGPHY0>;\n+\t\t\tclock-names = \"phyclk\";\n+\t\t\t#clock-cells = <0>;\n+\t\t\t#phy-cells = <0>;\n+\t\t};\n+\n+\t\tusbphy1: usb-phy@188 {\n+\t\t\treg = <0x188>;\n+\t\t\tclocks = <&cru SCLK_OTGPHY1>;\n+\t\t\tclock-names = \"phyclk\";\n+\t\t\t#clock-cells = <0>;\n+\t\t\t#phy-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\ndiff --git a/arch/arm/dts/rk3188-u-boot.dtsi b/arch/arm/dts/rk3188-u-boot.dtsi\nindex 8f2849dda241..905ebaea7915 100644\n--- a/arch/arm/dts/rk3188-u-boot.dtsi\n+++ b/arch/arm/dts/rk3188-u-boot.dtsi\n@@ -10,7 +10,36 @@\n \tcompatible = \"rockchip,gpio-bank\";\n };\n\n+&grf {\n+\t/delete-node/ usbphy;\n+};\n+\n &pmu {\n \tcompatible = \"rockchip,rk3188-pmu\", \"syscon\", \"simple-mfd\";\n };\n\n+/ {\n+\tusbphy: usbphy {\n+\t\tcompatible = \"rockchip,rk3188-usb-phy\";\n+\t\trockchip,grf = <&grf>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tusbphy0: usb-phy@10c {\n+\t\t\treg = <0x10c>;\n+\t\t\tclocks = <&cru SCLK_OTGPHY0>;\n+\t\t\tclock-names = \"phyclk\";\n+\t\t\t#clock-cells = <0>;\n+\t\t\t#phy-cells = <0>;\n+\t\t};\n+\n+\t\tusbphy1: usb-phy@11c {\n+\t\t\treg = <0x11c>;\n+\t\t\tclocks = <&cru SCLK_OTGPHY1>;\n+\t\t\tclock-names = \"phyclk\";\n+\t\t\t#clock-cells = <0>;\n+\t\t\t#phy-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\ndiff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi\nindex bb0078588fe8..e61746b5b2a8 100644\n--- a/arch/arm/dts/rk3288-u-boot.dtsi\n+++ b/arch/arm/dts/rk3288-u-boot.dtsi\n@@ -68,6 +68,7 @@\n\n &grf {\n \tbootph-all;\n+\t/delete-node/ usbphy;\n };\n\n &pmu {\n@@ -105,3 +106,42 @@\n &xin24m {\n \tbootph-all;\n };\n+\n+/ {\n+\tusbphy: usbphy {\n+\t\tcompatible = \"rockchip,rk3288-usb-phy\";\n+\t\trockchip,grf = <&grf>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tusbphy0: usb-phy@320 {\n+\t\t\t#phy-cells = <0>;\n+\t\t\treg = <0x320>;\n+\t\t\tclocks = <&cru SCLK_OTGPHY0>;\n+\t\t\tclock-names = \"phyclk\";\n+\t\t\t#clock-cells = <0>;\n+\t\t\tresets = <&cru SRST_USBOTG_PHY>;\n+\t\t\treset-names = \"phy-reset\";\n+\t\t};\n+\n+\t\tusbphy1: usb-phy@334 {\n+\t\t\t#phy-cells = <0>;\n+\t\t\treg = <0x334>;\n+\t\t\tclocks = <&cru SCLK_OTGPHY1>;\n+\t\t\tclock-names = \"phyclk\";\n+\t\t\t#clock-cells = <0>;\n+\t\t\tresets = <&cru SRST_USBHOST0_PHY>;\n+\t\t\treset-names = \"phy-reset\";\n+\t\t};\n+\n+\t\tusbphy2: usb-phy@348 {\n+\t\t\t#phy-cells = <0>;\n+\t\t\treg = <0x348>;\n+\t\t\tclocks = <&cru SCLK_OTGPHY2>;\n+\t\t\tclock-names = \"phyclk\";\n+\t\t\t#clock-cells = <0>;\n+\t\t\tresets = <&cru SRST_USBHOST1_PHY>;\n+\t\t\treset-names = \"phy-reset\";\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c\nindex 2e6bb38b9235..1538f4fef081 100644\n--- a/arch/arm/mach-rockchip/board.c\n+++ b/arch/arm/mach-rockchip/board.c\n@@ -269,34 +269,6 @@ int board_usb_init(int index, enum usb_init_type init)\n \t}\n \totg_data.regs_otg = ofnode_get_addr(node);\n\n-#ifdef CONFIG_ROCKCHIP_USB2_PHY\n-\tint ret;\n-\tu32 phandle, offset;\n-\tofnode phy_node;\n-\n-\tret = ofnode_read_u32(node, \"phys\", &phandle);\n-\tif (ret)\n-\t\treturn ret;\n-\n-\tnode = ofnode_get_by_phandle(phandle);\n-\tif (!ofnode_valid(node)) {\n-\t\tdebug(\"Not found usb phy device\\n\");\n-\t\treturn -ENODEV;\n-\t}\n-\n-\tphy_node = ofnode_get_parent(node);\n-\tif (!ofnode_valid(node)) {\n-\t\tdebug(\"Not found usb phy device\\n\");\n-\t\treturn -ENODEV;\n-\t}\n-\n-\totg_data.phy_of_node = phy_node;\n-\tret = ofnode_read_u32(node, \"reg\", &offset);\n-\tif (ret)\n-\t\treturn ret;\n-\totg_data.regs_phy = offset +\n-\t\t(u32)syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n-#endif\n \treturn dwc2_udc_probe(&otg_data);\n }\n\ndiff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig\nindex 60ceae8f1531..b574f8bceebd 100644\n--- a/configs/chromebit_mickey_defconfig\n+++ b/configs/chromebit_mickey_defconfig\n@@ -82,6 +82,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -102,7 +103,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig\nindex 5e89311affe3..9f0d4d94cbca 100644\n--- a/configs/chromebook_jerry_defconfig\n+++ b/configs/chromebook_jerry_defconfig\n@@ -82,6 +82,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -106,7 +107,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig\nindex 6e0158fd4a9e..ae8c1d3fc9a1 100644\n--- a/configs/chromebook_minnie_defconfig\n+++ b/configs/chromebook_minnie_defconfig\n@@ -83,6 +83,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -107,7 +108,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig\nindex 86f1399c0e3c..7b4258f18427 100644\n--- a/configs/chromebook_speedy_defconfig\n+++ b/configs/chromebook_speedy_defconfig\n@@ -83,6 +83,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_SPI_FLASH_GIGADEVICE=y\n CONFIG_SPI_FLASH_WINBOND=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_PINCONF=y\n CONFIG_SPL_PINCTRL=y\n@@ -107,7 +108,6 @@ CONFIG_SYSRESET=y\n CONFIG_USB=y\n # CONFIG_SPL_DM_USB is not set\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_VIDEO=y\n # CONFIG_VIDEO_BPP8 is not set\n CONFIG_CONSOLE_TRUETYPE=y\ndiff --git a/configs/evb-rk3288-rk808_defconfig b/configs/evb-rk3288-rk808_defconfig\nindex 2112e475ad31..5244c42b7b4e 100644\n--- a/configs/evb-rk3288-rk808_defconfig\n+++ b/configs/evb-rk3288-rk808_defconfig\n@@ -71,6 +71,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -85,7 +86,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_DWC2_OTG=y\n CONFIG_VIDEO=y\ndiff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig\nindex 54e3c41f3ccf..0999bf03d60a 100644\n--- a/configs/firefly-rk3288_defconfig\n+++ b/configs/firefly-rk3288_defconfig\n@@ -62,11 +62,12 @@ CONFIG_MISC=y\n CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -82,7 +83,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig\nindex 4cbd4b97172a..827f1ae159e1 100644\n--- a/configs/miqi-rk3288_defconfig\n+++ b/configs/miqi-rk3288_defconfig\n@@ -59,11 +59,12 @@ CONFIG_MISC=y\n CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -79,7 +80,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/mk808_defconfig b/configs/mk808_defconfig\nindex b983128e1def..3b63e5f930bb 100644\n--- a/configs/mk808_defconfig\n+++ b/configs/mk808_defconfig\n@@ -92,6 +92,7 @@ CONFIG_MMC_UHS_SUPPORT=y\n CONFIG_SPL_MMC_UHS_SUPPORT=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_DM_PMIC=y\n # CONFIG_SPL_PMIC_CHILDREN is not set\n@@ -111,7 +112,6 @@ CONFIG_TPL_TIMER=y\n CONFIG_DESIGNWARE_APB_TIMER=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_DWC2_OTG=y\n CONFIG_USB_FUNCTION_ROCKUSB=y\ndiff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig\nindex a374f90982e0..bafe49818637 100644\n--- a/configs/phycore-rk3288_defconfig\n+++ b/configs/phycore-rk3288_defconfig\n@@ -9,6 +9,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3288-phycore-rdk\"\n+CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=614400\n CONFIG_ROCKCHIP_RK3288=y\n CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y\n@@ -68,6 +69,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -82,7 +84,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\n CONFIG_USB_ETHER_SMSC95XX=y\ndiff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig\nindex 52d38f4108c3..a4d0bd705fdf 100644\n--- a/configs/popmetal-rk3288_defconfig\n+++ b/configs/popmetal-rk3288_defconfig\n@@ -9,6 +9,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3288-popmetal\"\n+CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=614400\n CONFIG_ROCKCHIP_RK3288=y\n CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y\n@@ -64,6 +65,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -78,7 +80,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\n CONFIG_USB_ETHER_SMSC95XX=y\ndiff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig\nindex 242aa89bcce0..71749c3b8741 100644\n--- a/configs/rock-pi-n8-rk3288_defconfig\n+++ b/configs/rock-pi-n8-rk3288_defconfig\n@@ -63,6 +63,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -81,7 +82,6 @@ CONFIG_USB=y\n CONFIG_USB_EHCI_HCD=y\n CONFIG_USB_EHCI_GENERIC=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n # CONFIG_USB_KEYBOARD_FN_KEYS is not set\n CONFIG_USB_GADGET=y\ndiff --git a/configs/rock2_defconfig b/configs/rock2_defconfig\nindex 025b55e2171b..6ebda3a36992 100644\n--- a/configs/rock2_defconfig\n+++ b/configs/rock2_defconfig\n@@ -9,6 +9,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3288-rock2-square\"\n+CONFIG_DM_RESET=y\n CONFIG_SYS_MONITOR_LEN=614400\n CONFIG_ROCKCHIP_RK3288=y\n CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y\n@@ -65,6 +66,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -80,7 +82,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_GADGET=y\n CONFIG_USB_GADGET_DWC2_OTG=y\ndiff --git a/configs/rock_defconfig b/configs/rock_defconfig\nindex 71e504713c16..753deb349afd 100644\n--- a/configs/rock_defconfig\n+++ b/configs/rock_defconfig\n@@ -12,6 +12,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000\n CONFIG_SF_DEFAULT_SPEED=20000000\n CONFIG_ENV_OFFSET=0x3F8000\n CONFIG_DEFAULT_DEVICE_TREE=\"rockchip/rk3188-radxarock\"\n+CONFIG_DM_RESET=y\n CONFIG_ROCKCHIP_RK3188=y\n # CONFIG_ROCKCHIP_STIMER is not set\n CONFIG_TARGET_ROCK=y\n@@ -53,6 +54,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y\n CONFIG_LED=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_DM_PMIC=y\n # CONFIG_SPL_PMIC_CHILDREN is not set\n@@ -68,7 +70,6 @@ CONFIG_TIMER=y\n CONFIG_SPL_TIMER=y\n CONFIG_ROCKCHIP_TIMER=y\n CONFIG_USB=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_RANDOM_UUID=y\n CONFIG_SPL_TINY_MEMSET=y\n CONFIG_CMD_DHRYSTONE=y\ndiff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig\nindex 2e701a5ff722..a1d8acc70e3c 100644\n--- a/configs/tinker-rk3288_defconfig\n+++ b/configs/tinker-rk3288_defconfig\n@@ -62,11 +62,12 @@ CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_I2C_EEPROM=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -81,7 +82,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig\nindex 816903c8430e..902742b73bf0 100644\n--- a/configs/tinker-s-rk3288_defconfig\n+++ b/configs/tinker-s-rk3288_defconfig\n@@ -62,11 +62,12 @@ CONFIG_ROCKCHIP_EFUSE=y\n CONFIG_I2C_EEPROM=y\n CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n-CONFIG_PHY_REALTEK=y\n CONFIG_DM_ETH_PHY=y\n CONFIG_PHY_GIGE=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_REALTEK=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -81,7 +82,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig\nindex 1d7e22653608..a0e160e6d70c 100644\n--- a/configs/vyasa-rk3288_defconfig\n+++ b/configs/vyasa-rk3288_defconfig\n@@ -72,6 +72,7 @@ CONFIG_MMC_DW=y\n CONFIG_MMC_DW_ROCKCHIP=y\n CONFIG_ETH_DESIGNWARE=y\n CONFIG_GMAC_ROCKCHIP=y\n+CONFIG_PHY_ROCKCHIP_USB2=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_DM_PMIC=y\n@@ -87,7 +88,6 @@ CONFIG_SYS_NS16550_MEM32=y\n CONFIG_SYSRESET=y\n CONFIG_USB=y\n CONFIG_USB_DWC2=y\n-CONFIG_ROCKCHIP_USB2_PHY=y\n CONFIG_USB_KEYBOARD=y\n CONFIG_USB_HOST_ETHER=y\n CONFIG_USB_ETHER_ASIX=y\ndiff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig\nindex c505862f1e15..9c91f63786ac 100644\n--- a/drivers/usb/phy/Kconfig\n+++ b/drivers/usb/phy/Kconfig\n@@ -7,6 +7,3 @@ comment \"USB Phy\"\n\n config TWL4030_USB\n \tbool \"TWL4030 PHY\"\n-\n-config ROCKCHIP_USB2_PHY\n-\tbool \"Rockchip USB2 PHY\"\ndiff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile\nindex b67a70bbe8ed..cf6109dee610 100644\n--- a/drivers/usb/phy/Makefile\n+++ b/drivers/usb/phy/Makefile\n@@ -4,4 +4,3 @@\n # Tom Rix <Tom.Rix@windriver.com>\n\n obj-$(CONFIG_TWL4030_USB) += twl4030.o\n-obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o\ndiff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c\ndeleted file mode 100644\nindex bdbd0d44813a..000000000000\n--- a/drivers/usb/phy/rockchip_usb2_phy.c\n+++ /dev/null\n@@ -1,113 +0,0 @@\n-// SPDX-License-Identifier: GPL-2.0+\n-/*\n- * Copyright 2016 Rockchip Electronics Co., Ltd\n- */\n-\n-#include <hang.h>\n-#include <log.h>\n-#include <asm/io.h>\n-#include <linux/bitops.h>\n-#include <linux/delay.h>\n-\n-#include \"../gadget/dwc2_udc_otg_priv.h\"\n-\n-#define BIT_WRITEABLE_SHIFT\t16\n-\n-struct usb2phy_reg {\n-\tunsigned int offset;\n-\tunsigned int bitend;\n-\tunsigned int bitstart;\n-\tunsigned int disable;\n-\tunsigned int enable;\n-};\n-\n-/**\n- * struct rockchip_usb2_phy_cfg: usb-phy port configuration\n- * @port_reset: usb otg per-port reset register\n- * @soft_con: software control usb otg register\n- * @suspend: phy suspend register\n- */\n-struct rockchip_usb2_phy_cfg {\n-\tstruct usb2phy_reg port_reset;\n-\tstruct usb2phy_reg soft_con;\n-\tstruct usb2phy_reg suspend;\n-};\n-\n-struct rockchip_usb2_phy_dt_id {\n-\tchar\t\tcompatible[128];\n-\tconst void\t*data;\n-};\n-\n-static const struct rockchip_usb2_phy_cfg rk3066a_pdata = {\n-\t.port_reset\t= {0x00, 12, 12, 0, 1},\n-\t.soft_con\t= {0x08, 2, 2, 0, 1},\n-\t.suspend\t= {0x08, 8, 3, (0x01 << 3), (0x2A << 3)},\n-};\n-\n-static const struct rockchip_usb2_phy_cfg rk3288_pdata = {\n-\t.port_reset = {0x00, 12, 12, 0, 1},\n-\t.soft_con = {0x08, 2, 2, 0, 1},\n-\t.suspend\t= {0x0c, 5, 0, 0x01, 0x2A},\n-};\n-\n-static struct rockchip_usb2_phy_dt_id rockchip_usb2_phy_dt_ids[] = {\n-\t{ .compatible = \"rockchip,rk3066a-usb-phy\", .data = &rk3066a_pdata },\n-\t{ .compatible = \"rockchip,rk3188-usb-phy\", .data = &rk3288_pdata },\n-\t{ .compatible = \"rockchip,rk3288-usb-phy\", .data = &rk3288_pdata },\n-\t{}\n-};\n-\n-static void property_enable(struct dwc2_plat_otg_data *pdata,\n-\t\t\t\t const struct usb2phy_reg *reg, bool en)\n-{\n-\tunsigned int val, mask, tmp;\n-\n-\ttmp = en ? reg->enable : reg->disable;\n-\tmask = GENMASK(reg->bitend, reg->bitstart);\n-\tval = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);\n-\n-\twritel(val, pdata->regs_phy + reg->offset);\n-}\n-\n-void otg_phy_init(struct dwc2_udc *dev)\n-{\n-\tstruct dwc2_plat_otg_data *pdata = dev->pdata;\n-\tstruct rockchip_usb2_phy_cfg *phy_cfg = NULL;\n-\tstruct rockchip_usb2_phy_dt_id *of_id;\n-\tint i;\n-\n-\tfor (i = 0; i < ARRAY_SIZE(rockchip_usb2_phy_dt_ids); i++) {\n-\t\tof_id = &rockchip_usb2_phy_dt_ids[i];\n-\t\tif (ofnode_device_is_compatible(pdata->phy_of_node,\n-\t\t\t\t\t\tof_id->compatible)){\n-\t\t\tphy_cfg = (struct rockchip_usb2_phy_cfg *)of_id->data;\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\tif (!phy_cfg) {\n-\t\tdebug(\"Can't find device platform data\\n\");\n-\n-\t\thang();\n-\t\treturn;\n-\t}\n-\tpdata->priv = phy_cfg;\n-\t/* disable software control */\n-\tproperty_enable(pdata, &phy_cfg->soft_con, false);\n-\n-\t/* reset otg port */\n-\tproperty_enable(pdata, &phy_cfg->port_reset, true);\n-\tmdelay(1);\n-\tproperty_enable(pdata, &phy_cfg->port_reset, false);\n-\tudelay(1);\n-}\n-\n-void otg_phy_off(struct dwc2_udc *dev)\n-{\n-\tstruct dwc2_plat_otg_data *pdata = dev->pdata;\n-\tstruct rockchip_usb2_phy_cfg *phy_cfg = pdata->priv;\n-\n-\t/* enable software control */\n-\tproperty_enable(pdata, &phy_cfg->soft_con, true);\n-\t/* enter suspend */\n-\tproperty_enable(pdata, &phy_cfg->suspend, true);\n-}\ndiff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h\nindex aa37e957b47c..c8610ef8c98a 100644\n--- a/include/usb/dwc2_udc.h\n+++ b/include/usb/dwc2_udc.h\n@@ -15,7 +15,6 @@\n\n struct dwc2_plat_otg_data {\n \tvoid\t\t*priv;\n-\tofnode\t\tphy_of_node;\n \tint\t\t(*phy_control)(int on);\n \tuintptr_t\tregs_phy;\n \tuintptr_t\tregs_otg;\n", "prefixes": [ "RFC", "v1", "2/2" ] }