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GET /api/patches/2218873/?format=api
{ "id": 2218873, "url": "http://patchwork.ozlabs.org/api/patches/2218873/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260401191617.20141-1-marex@nabladev.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260401191617.20141-1-marex@nabladev.com>", "list_archive_url": null, "date": "2026-04-01T19:15:53", "name": "[1/4] arm64: imx8mp: Fold inline ECC into spl.c on DH i.MX8MP DHCOM SoM", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "c56b6d820e93287d9324a3fc40df4caebc8be860", "submitter": { "id": 91452, "url": "http://patchwork.ozlabs.org/api/people/91452/?format=api", "name": "Marek Vasut", "email": "marex@nabladev.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260401191617.20141-1-marex@nabladev.com/mbox/", "series": [ { "id": 498410, "url": "http://patchwork.ozlabs.org/api/series/498410/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=498410", "date": "2026-04-01T19:15:54", "name": "[1/4] arm64: imx8mp: Fold inline ECC into spl.c on DH i.MX8MP DHCOM SoM", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498410/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218873/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218873/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nabladev.com header.i=@nabladev.com header.a=rsa-sha256\n header.s=dkim header.b=EOf5ID9x;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=pass (p=reject dis=none) header.from=nabladev.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nabladev.com header.i=@nabladev.com\n header.b=\"EOf5ID9x\";\n\tdkim-atps=neutral", "phobos.denx.de; dmarc=pass (p=reject dis=none)\n header.from=nabladev.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=marex@nabladev.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fmLgM3JkSz1yGH\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 02 Apr 2026 10:25:03 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 704DE8407E;\n\tThu, 2 Apr 2026 01:24:53 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 9EF3484056; Wed, 1 Apr 2026 21:16:38 +0200 (CEST)", "from mx.nabladev.com (mx.nabladev.com [178.251.229.89])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 8CEAD80517\n for <u-boot@lists.denx.de>; Wed, 1 Apr 2026 21:16:36 +0200 (CEST)", "from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon)\n with ESMTPSA id 5999510DBE8; Wed, 1 Apr 2026 21:16:34 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED,\n SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com;\n s=dkim; t=1775070995; h=from:subject:date:message-id:to:cc:mime-version:\n content-transfer-encoding; bh=Zks0Ywk80WzOc4gTliB85hoAXzm4YrdFfM/d5Y95LK4=;\n b=EOf5ID9xVbjTEZ83CPiUu0TPUenhWo82ry6+7CJPbEGHLY5I5OodRvSQDJTDmgVetRzrTE\n I3BwQ252FWSWx1m+jRbqdKQTYUvzrjyJQ7jTu2x1vccY7EcDf3Y06Aj4DhpPJMO8ik7btC\n pk3VSccvFcvBFLWGVCRhvGkI2dg0FOARgZlFKa06UakLsMgwc7h0oYxPAmWpPw8O5OGESB\n cr5M8Q/oJS5Plxp844TaAUJzgvqBd9wLK0lDqPR/3dLgVUZUJdhkiirt1tjo0kUAEtAGZG\n q97ZI1011jtUe+6YJy9GCQVhF32ySH90P/BzBes2dw2DCEhEWA9LKnrTN2nidQ==", "From": "Marek Vasut <marex@nabladev.com>", "To": "u-boot@lists.denx.de", "Cc": "Marek Vasut <marex@nabladev.com>, Fabio Estevam <festevam@gmail.com>,\n Peng Fan <peng.fan@nxp.com>, Tom Rini <trini@konsulko.com>,\n u-boot@dh-electronics.com", "Subject": "[PATCH 1/4] arm64: imx8mp: Fold inline ECC into spl.c on DH i.MX8MP\n DHCOM SoM", "Date": "Wed, 1 Apr 2026 21:15:53 +0200", "Message-ID": "<20260401191617.20141-1-marex@nabladev.com>", "X-Mailer": "git-send-email 2.53.0", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Last-TLS-Session-Version": "TLSv1.3", "X-Mailman-Approved-At": "Thu, 02 Apr 2026 01:24:51 +0200", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "The inline ECC configuration is identical for 2 GiB DRAM variants\nand 4 GiB DRAM variants of the SoM, no matter the rank count. Fold\nthe ECC configuration directly into spl.c to simplify the upcoming\ndeduplication. No functional change.\n\nSigned-off-by: Marek Vasut <marex@nabladev.com>\n---\nCc: Fabio Estevam <festevam@gmail.com>\nCc: Peng Fan <peng.fan@nxp.com>\nCc: Tom Rini <trini@konsulko.com>\nCc: u-boot@dh-electronics.com\nCc: u-boot@lists.denx.de\n---\n board/dhelectronics/dh_imx8mp/lpddr4_timing.h | 4 ---\n .../dh_imx8mp/lpddr4_timing_2G_32.c | 14 ----------\n .../dh_imx8mp/lpddr4_timing_4G_32.c | 14 ----------\n board/dhelectronics/dh_imx8mp/spl.c | 26 +++++++++++++++++++\n 4 files changed, 26 insertions(+), 32 deletions(-)", "diff": "diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h\nindex c4d51174a33..f8078051f2f 100644\n--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h\n+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h\n@@ -9,10 +9,6 @@\n extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32;\n extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32;\n \n-typedef void (*scrub_func_t)(void);\n-extern void dh_imx8mp_dhcom_dram_scrub_16g_x32(void);\n-extern void dh_imx8mp_dhcom_dram_scrub_32g_x32(void);\n-\n u8 dh_get_memcfg(void);\n \n #define DDRC_ECCCFG0_ECC_MODE_MASK\t0x7\ndiff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c\nindex add7a0bf23b..3cb868311f3 100644\n--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c\n+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c\n@@ -1853,17 +1853,3 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32 = {\n \t.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),\n \t.fsp_table = { 3600, 400, 100, },\n };\n-\n-#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)\n-void dh_imx8mp_dhcom_dram_scrub_16g_x32(void)\n-{\n-\tddrc_inline_ecc_scrub(0x0,0x3ffffff);\n-\tddrc_inline_ecc_scrub(0x4000000,0x7ffffff);\n-\tddrc_inline_ecc_scrub(0x8000000,0xbffffff);\n-\tddrc_inline_ecc_scrub(0xc000000,0xfffffff);\n-\tddrc_inline_ecc_scrub(0x10000000,0x13ffffff);\n-\tddrc_inline_ecc_scrub(0x14000000,0x17ffffff);\n-\tddrc_inline_ecc_scrub(0x18000000,0x1bffffff);\n-\tddrc_inline_ecc_scrub_end(0x0,0x1fffffff);\n-}\n-#endif\ndiff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c\nindex 41b078f6e9f..3a475076e75 100644\n--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c\n+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c\n@@ -1857,17 +1857,3 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32 = {\n \t.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),\n \t.fsp_table = { 3600, 400, 100, },\n };\n-\n-#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)\n-void dh_imx8mp_dhcom_dram_scrub_32g_x32(void)\n-{\n-\tddrc_inline_ecc_scrub(0x0,0x7ffffff);\n-\tddrc_inline_ecc_scrub(0x8000000,0xfffffff);\n-\tddrc_inline_ecc_scrub(0x10000000,0x17ffffff);\n-\tddrc_inline_ecc_scrub(0x18000000,0x1fffffff);\n-\tddrc_inline_ecc_scrub(0x20000000,0x27ffffff);\n-\tddrc_inline_ecc_scrub(0x28000000,0x2fffffff);\n-\tddrc_inline_ecc_scrub(0x30000000,0x37ffffff);\n-\tddrc_inline_ecc_scrub_end(0x0,0x3fffffff);\n-}\n-#endif\ndiff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c\nindex 727e1ff3774..d8a928639b2 100644\n--- a/board/dhelectronics/dh_imx8mp/spl.c\n+++ b/board/dhelectronics/dh_imx8mp/spl.c\n@@ -139,6 +139,32 @@ static void spl_dram_init(void)\n }\n \n #if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)\n+static void dh_imx8mp_dhcom_dram_scrub_16g_x32(void)\n+{\n+\tddrc_inline_ecc_scrub(0x0,0x3ffffff);\n+\tddrc_inline_ecc_scrub(0x4000000,0x7ffffff);\n+\tddrc_inline_ecc_scrub(0x8000000,0xbffffff);\n+\tddrc_inline_ecc_scrub(0xc000000,0xfffffff);\n+\tddrc_inline_ecc_scrub(0x10000000,0x13ffffff);\n+\tddrc_inline_ecc_scrub(0x14000000,0x17ffffff);\n+\tddrc_inline_ecc_scrub(0x18000000,0x1bffffff);\n+\tddrc_inline_ecc_scrub_end(0x0,0x1fffffff);\n+}\n+\n+static void dh_imx8mp_dhcom_dram_scrub_32g_x32(void)\n+{\n+\tddrc_inline_ecc_scrub(0x0,0x7ffffff);\n+\tddrc_inline_ecc_scrub(0x8000000,0xfffffff);\n+\tddrc_inline_ecc_scrub(0x10000000,0x17ffffff);\n+\tddrc_inline_ecc_scrub(0x18000000,0x1fffffff);\n+\tddrc_inline_ecc_scrub(0x20000000,0x27ffffff);\n+\tddrc_inline_ecc_scrub(0x28000000,0x2fffffff);\n+\tddrc_inline_ecc_scrub(0x30000000,0x37ffffff);\n+\tddrc_inline_ecc_scrub_end(0x0,0x3fffffff);\n+}\n+\n+typedef void (*scrub_func_t)(void);\n+\n static const scrub_func_t dram_scrub_fn[8] = {\n \tNULL,\t\t\t\t\t/* 512 MiB */\n \tNULL,\t\t\t\t\t/* 1024 MiB */\n", "prefixes": [ "1/4" ] }