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GET /api/patches/2218770/?format=api
{ "id": 2218770, "url": "http://patchwork.ozlabs.org/api/patches/2218770/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260401-mtk-mt8189-usb-v1-2-a4bf951aa8ad@baylibre.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260401-mtk-mt8189-usb-v1-2-a4bf951aa8ad@baylibre.com>", "list_archive_url": null, "date": "2026-04-01T21:53:46", "name": "[2/3] arm: dts: mediatek: add USB/PHY nodes for Genio 520/720", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e3a7c3fcc2f17855a78eadfcbe15eec66d4c46b8", "submitter": { "id": 87228, "url": "http://patchwork.ozlabs.org/api/people/87228/?format=api", "name": "David Lechner", "email": "dlechner@baylibre.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260401-mtk-mt8189-usb-v1-2-a4bf951aa8ad@baylibre.com/mbox/", "series": [ { "id": 498396, "url": "http://patchwork.ozlabs.org/api/series/498396/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=498396", "date": "2026-04-01T21:53:44", "name": "arm: mediatek: mt8189: enable USB support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498396/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218770/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218770/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20230601.gappssmtp.com\n header.i=@baylibre-com.20230601.gappssmtp.com header.a=rsa-sha256\n header.s=20230601 header.b=mNgvrtt/;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260401-mtk-mt8189-usb-v1-2-a4bf951aa8ad@baylibre.com>", "References": "<20260401-mtk-mt8189-usb-v1-0-a4bf951aa8ad@baylibre.com>", "In-Reply-To": "<20260401-mtk-mt8189-usb-v1-0-a4bf951aa8ad@baylibre.com>", "To": "Tom Rini <trini@konsulko.com>, Ryder Lee <ryder.lee@mediatek.com>,\n Weijie Gao <weijie.gao@mediatek.com>,\n Chunfeng Yun <chunfeng.yun@mediatek.com>,\n Igor Belwon <igor.belwon@mentallysanemainliners.org>,\n GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,\n Macpaul Lin <macpaul.lin@mediatek.com>", "Cc": "Julien Stephan <jstephan@baylibre.com>, u-boot@lists.denx.de,\n David Lechner <dlechner@baylibre.com>", "X-Mailer": "b4 0.16-dev", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=10606;\n i=dlechner@baylibre.com; h=from:subject:message-id;\n bh=wFDvqO94INRvOY6w/VFTGlICghIPP89IJAYu0aFzDEQ=;\n b=owEBhAF7/pANAwAKAcLMIAH/AY/AAcsmYgBpzZP4YJfIqlRhSZv2VFTbfgoqAyGsGpH+KDgyh\n MvXciDnVrKJAUoEAAEKADQWIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCac2T+BYcZGxlY2huZXJA\n YmF5bGlicmUuY29tAAoJEMLMIAH/AY/AAa4H/jFRjZMZH0PAFpQ1MCxLX9oDEErhP0l8PGqwg6f\n fdzIlXcEkzqS+2uxo5ElkWfjX0cmD91PtEnU4xKdwOVUTTq4vM2yio9iCr/aZAmh/nukkFBkig+\n CQff3yWW3aKugEIyvp7rtXLhszz9hT6MdR4LLsMK48ykrMooMf3ZyXHp7jwk908pBLu4h1P3xU4\n Q1czRqsCmLaaG6bw/85iTHXzJqSlm7nUZ03uaYnhTSfNAN+K85FD+z56DD+3hRgH6NYi2kyQ3PW\n e5uxJh83jzjNRD0s6QHVxKX7CjSTpFueDoPcCfHHwQU2SFnURsBpLYpJqyu293Z/ac5TyzKorV6\n oPBY=", "X-Developer-Key": "i=dlechner@baylibre.com; a=openpgp;\n fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add USB and PHY nodes for USB support on Genio 520/720 EVKs.\n\nThe devicetree hasn't been accepted upstream yet, so this comes from the\nlatest submission [1]. Some power domain and reset references have been\nleft out to minimize what we need to add at this time since U-Boot\ndoesn't need them.\n\nLink: https://lore.kernel.org/linux-mediatek/20251111070031.305281-10-jh.hsu@mediatek.com/ [1]\nSigned-off-by: David Lechner <dlechner@baylibre.com>\n---\n arch/arm/dts/mt8189.dtsi | 210 ++++++++++++++++++++++++++++++++++\n arch/arm/dts/mt8371-genio-common.dtsi | 70 ++++++++++++\n 2 files changed, 280 insertions(+)", "diff": "diff --git a/arch/arm/dts/mt8189.dtsi b/arch/arm/dts/mt8189.dtsi\nindex e9fd21ea095..e550745ac5d 100644\n--- a/arch/arm/dts/mt8189.dtsi\n+++ b/arch/arm/dts/mt8189.dtsi\n@@ -7,6 +7,7 @@\n #include <dt-bindings/clock/mediatek,mt8189-clk.h>\n #include <dt-bindings/interrupt-controller/irq.h>\n #include <dt-bindings/interrupt-controller/arm-gic.h>\n+#include <dt-bindings/phy/phy.h>\n #include <dt-bindings/reset/ti-syscon.h>\n \n / {\n@@ -180,6 +181,79 @@\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n+\t\txhci0: usb@11200000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xhci\", \"mediatek,mtk-xhci\";\n+\t\t\treg = <0 0x11200000 0 0x1000>,\n+\t\t\t <0 0x11203e00 0 0x0100>;\n+\t\t\treg-names = \"mac\", \"ippc\";\n+\t\t\tinterrupts-extended = <&gic GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH 0>,\n+\t\t\t\t\t <&pio 207 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"host\",\"wakeup\";\n+\t\t\tphys = <&u2port0 PHY_TYPE_USB2>,\n+\t\t\t <&u3port0 PHY_TYPE_USB3>;\n+\t\t\tclocks = <&pericfg_ao_clk CLK_PERAO_SSUSB0_SYS>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB0_REF>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB0_H>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB0_F>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB0_XHCI>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB0_FRMCNT>;\n+\t\t\tclock-names = \"sys_ck\", \"ref_ck\", \"mcu_ck\",\n+\t\t\t\t \"dma_ck\", \"xhci_ck\", \"frmcnt_ck\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\twakeup-source;\n+\t\t\tmediatek,syscon-wakeup = <&pericfg_ao_clk 0x214 110>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\txhci1: usb@11210000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xhci\", \"mediatek,mtk-xhci\";\n+\t\t\treg = <0 0x11210000 0 0x1000>,\n+\t\t\t <0 0x11213e00 0 0x0100>;\n+\t\t\treg-names = \"mac\", \"ippc\";\n+\t\t\tinterrupts-extended = <&gic GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH 0>,\n+\t\t\t\t\t <&pio 203 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"host\",\"wakeup\";\n+\t\t\tphys = <&u2port1 PHY_TYPE_USB2>;\n+\t\t\tclocks = <&pericfg_ao_clk CLK_PERAO_SSUSB1_SYS>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB1_REF>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB1_H>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB1_F>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB1_XHCI>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB1_FRMCNT>;\n+\t\t\tclock-names = \"sys_ck\", \"ref_ck\",\"mcu_ck\",\n+\t\t\t\t \"dma_ck\", \"xhci_ck\", \"frmcnt_ck\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\twakeup-source;\n+\t\t\tmediatek,syscon-wakeup = <&pericfg_ao_clk 0x21c 110>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\txhci2: usb@11220000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xhci\", \"mediatek,mtk-xhci\";\n+\t\t\treg = <0 0x11220000 0 0x1000>,\n+\t\t\t <0 0x11223e00 0 0x0100>;\n+\t\t\treg-names = \"mac\", \"ippc\";\n+\t\t\tinterrupts-extended = <&gic GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH 0>,\n+\t\t\t\t\t <&pio 193 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"host\",\"wakeup\";\n+\t\t\tphys = <&u2port2 PHY_TYPE_USB2>;\n+\t\t\tclocks = <&pericfg_ao_clk CLK_PERAO_SSUSB2_SYS>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB2_REF>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB2_H>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB2_F>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB2_XHCI>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB2_FRMCNT>;\n+\t\t\tclock-names = \"sys_ck\", \"ref_ck\",\"mcu_ck\",\n+\t\t\t\t \"dma_ck\", \"xhci_ck\", \"frmcnt_ck\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\twakeup-source;\n+\t\t\tmediatek,syscon-wakeup = <&pericfg_ao_clk 0x27c 110>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n \t\tmmc0: mmc@11230000 {\n \t\t\tcompatible = \"mediatek,mt8189-mmc\";\n \t\t\treg = <0 0x11230000 0 0x10000>,\n@@ -204,6 +278,55 @@\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n+\t\txhci3: usb@11260000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xhci\", \"mediatek,mtk-xhci\";\n+\t\t\treg = <0 0x11260000 0 0x2e00>,\n+\t\t\t <0 0x11263e00 0 0x0100>;\n+\t\t\treg-names = \"mac\", \"ippc\";\n+\t\t\tinterrupts-extended = <&gic GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH 0>,\n+\t\t\t\t\t <&pio 188 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"host\",\"wakeup\";\n+\t\t\tphys = <&u2port3 PHY_TYPE_USB2>,\n+\t\t\t <&u3port3 PHY_TYPE_USB3>;\n+\t\t\tclocks = <&pericfg_ao_clk CLK_PERAO_SSUSB3_SYS>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB3_REF>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB3_H>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB3_F>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB3_XHCI>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB3_FRMCNT>;\n+\t\t\tclock-names = \"sys_ck\", \"ref_ck\", \"mcu_ck\",\n+\t\t\t\t \"dma_ck\", \"xhci_ck\", \"frmcnt_ck\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\twakeup-source;\n+\t\t\tmediatek,syscon-wakeup = <&pericfg_ao_clk 0x284 110>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\txhci4: usb@11270000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xhci\", \"mediatek,mtk-xhci\";\n+\t\t\treg = <0 0x11270000 0 0x1000>,\n+\t\t\t <0 0x11273e00 0 0x0100>;\n+\t\t\treg-names = \"mac\", \"ippc\";\n+\t\t\tinterrupts-extended = <&gic GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH 0>,\n+\t\t\t\t\t <&pio 184 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"host\",\"wakeup\";\n+\t\t\tphys = <&u2port4 PHY_TYPE_USB2>;\n+\t\t\tclocks = <&pericfg_ao_clk CLK_PERAO_SSUSB4_SYS>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB4_REF>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB4_H>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB4_F>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB4_XHCI>,\n+\t\t\t\t <&pericfg_ao_clk CLK_PERAO_SSUSB4_FRMCNT>;\n+\t\t\tclock-names = \"sys_ck\", \"ref_ck\", \"mcu_ck\",\n+\t\t\t\t \"dma_ck\", \"xhci_ck\", \"frmcnt_ck\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\twakeup-source;\n+\t\t\tmediatek,syscon-wakeup = <&pericfg_ao_clk 0x28c 110>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n \t\tclock-controller@1000c000 {\n \t\t\tcompatible = \"mediatek,mt8189-apmixedsys\", \"syscon\";\n \t\t\treg = <0 0x1000c000 0 0x1000>;\n@@ -359,6 +482,93 @@\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n+\t\tu3phy3: t-phy@11b00000 {\n+\t\t\tcompatible = \"mediatek,mt8189-tphy\",\n+\t\t\t\t \"mediatek,generic-tphy-v2\";\n+\t\t\treg = <0 0x11b00000 0 0x700>;\n+\t\t\t#address-cells = <2>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\n+\t\t\tu2port3: usb-phy@11b00000 {\n+\t\t\t\treg = <0 0x11b00000 0 0x700>;\n+\t\t\t\tclocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t};\n+\n+\t\t\tu3port3: usb-phy@11b00700 {\n+\t\t\t\treg = <0 0x11b00700 0 0x700>;\n+\t\t\t\tclocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t};\n+\t\t};\n+\n+\t\tu2phy4: xs-phy@11b10000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xsphy\", \"mediatek,xsphy\";\n+\t\t\t#address-cells = <2>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\n+\t\t\tu2port4: usb-phy@11b10000 {\n+\t\t\t\treg = <0 0x11b10000 0 0x700>;\n+\t\t\t\tclocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P4_EN>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t};\n+\t\t};\n+\n+\t\tu3phy0: xs-phy@11e80000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xsphy\", \"mediatek,xsphy\";\n+\t\t\treg = <0 0x11e83000 0 0x200>;\n+\t\t\t#address-cells = <2>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\n+\t\t\tu2port0: usb-phy@11e80000 {\n+\t\t\t\treg = <0 0x11e80000 0 0x700>;\n+\t\t\t\tclocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t};\n+\n+\t\t\tu3port0: usb-phy@11e83000 {\n+\t\t\t\treg = <0 0x11e83400 0 0x500>;\n+\t\t\t\tclocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t};\n+\t\t};\n+\n+\t\tu2phy1: xs-phy@11e90000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xsphy\", \"mediatek,xsphy\";\n+\t\t\t#address-cells = <2>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\n+\t\t\tu2port1: usb-phy@11e90000 {\n+\t\t\t\treg = <0 0x11e90000 0 0x700>;\n+\t\t\t\tclocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P1_EN>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t};\n+\t\t};\n+\n+\t\tu2phy2: xs-phy@11ef0000 {\n+\t\t\tcompatible = \"mediatek,mt8189-xsphy\", \"mediatek,xsphy\";\n+\t\t\t#address-cells = <2>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\n+\t\t\tu2port2: usb-phy@11ef0000 {\n+\t\t\t\treg = <0 0x11ef0000 0 0x700>;\n+\t\t\t\tclocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P2_EN>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\t#phy-cells = <1>;\n+\t\t\t};\n+\t\t};\n+\n \t\tufscfg_ao_reg_clk: syscon@112b8000 {\n \t\t\tcompatible = \"mediatek,mt8189-ufscfg-ao\", \"syscon\", \"simple-mfd\";\n \t\t\treg = <0 0x112b8000 0 0x1000>;\ndiff --git a/arch/arm/dts/mt8371-genio-common.dtsi b/arch/arm/dts/mt8371-genio-common.dtsi\nindex 58322193aef..046e9d57752 100644\n--- a/arch/arm/dts/mt8371-genio-common.dtsi\n+++ b/arch/arm/dts/mt8371-genio-common.dtsi\n@@ -19,6 +19,51 @@\n \t\tstdout-path = \"serial0:921600n8\";\n \t};\n \n+\tusb_p0_vbus: regulator@0 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"p0_vbus\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tgpio = <&pio 82 0>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tusb_p1_vbus: regulator@1 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"p1_vbus\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tgpio = <&pio 84 0>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tusb_p2_vbus: regulator@2 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"p2_vbus\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tgpio = <&pio 85 0>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tusb_p3_vbus: regulator@3 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"p3_vbus\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tgpio = <&pio 86 0>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tusb_p4_vbus: regulator@4 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"p4_vbus\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\t\tgpio = <&pio 87 0>;\n+\t\tenable-active-high;\n+\t};\n+\n \tfirmware {\n \t\toptee {\n \t\t\tcompatible = \"linaro,optee-tz\";\n@@ -241,3 +286,28 @@\n &pmic {\n \tinterrupts-extended = <&pio 194 IRQ_TYPE_LEVEL_HIGH>;\n };\n+\n+&xhci0{\n+\tvbus-supply = <&usb_p0_vbus>;\n+\tstatus = \"okay\";\n+};\n+\n+&xhci1{\n+\tvbus-supply = <&usb_p1_vbus>;\n+\tstatus = \"okay\";\n+};\n+\n+&xhci2{\n+\tvbus-supply = <&usb_p2_vbus>;\n+\tstatus = \"okay\";\n+};\n+\n+&xhci3{\n+\tvbus-supply = <&usb_p3_vbus>;\n+\tstatus = \"okay\";\n+};\n+\n+&xhci4{\n+\tvbus-supply = <&usb_p4_vbus>;\n+\tstatus = \"okay\";\n+};\n", "prefixes": [ "2/3" ] }