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GET /api/patches/2218626/?format=api
{ "id": 2218626, "url": "http://patchwork.ozlabs.org/api/patches/2218626/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260401152657.314902-27-brian.cain@oss.qualcomm.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260401152657.314902-27-brian.cain@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-04-01T15:26:46", "name": "[v6,26/37] target/hexagon: Add TCG overrides for int handler insts", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "120ac506ddbff26760adc0fd55c67051a2d77a79", "submitter": { "id": 89839, "url": "http://patchwork.ozlabs.org/api/people/89839/?format=api", "name": "Brian Cain", "email": "brian.cain@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260401152657.314902-27-brian.cain@oss.qualcomm.com/mbox/", "series": [ { "id": 498350, "url": "http://patchwork.ozlabs.org/api/series/498350/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498350", "date": "2026-04-01T15:26:45", "name": "Hexagon system emulation - Part 1/3", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498350/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218626/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218626/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=h1dplIUk;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=Jn38wb2Y;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDAxMDE0NCBTYWx0ZWRfX72S6MQo/4vbz\n RaTQ8hHnrw1k4NtOUCCOe3DMkKqMfqLGBPQqPb2FhsiH3MrnITN+gleUL7yB+Twv5R+pPe3HLwH\n hcwszkaV9gcunJmoE9qq+xuQ6zfb6CFkXZMTqI69Z4pwdtRT0hZMVbhvXCPTYKJZDXHbhz67Q78\n eU+UwiqHgQn6oDw6+NjI/thN5a/GaTSuKbzrJX1dMoqlezI34xdo6erQw/YRGuUlKZO3I2Ahblm\n bI8BNNqmN2mIQiViutNp1axwjBT1EJl64PzzJdygu0KJsPBtvZJFK0+EYkoEA7VZ/VHT4d5X01i\n 43pgjGlHN7ALsTzkiBZTsr+MdiYoLSY82a8PWAPBfJ3zyUpeqMSN30VXj9IDFQJ3G5odWkr5biA\n BKfTBFPuz1H5Sueva396Sqq/u01GPAqo6/BK0wf42m6YDBAM8mdpWJwn+tqQ82vvbSkV3iD4LFg\n IGmOEeAu5CLQQ8oc7AQ==", "X-Authority-Analysis": "v=2.4 cv=QJJlhwLL c=1 sm=1 tr=0 ts=69cd39b7 cx=c_pps\n a=Uww141gWH0fZj/3QKPojxA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22\n a=COk6AnOGAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=ncxFUDX8U6Z2rYVbhVQA:9\n a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 a=TjNXssC_j7lpFel5tvFf:22", "X-Proofpoint-GUID": "_SLViY58_0czVrAgzu58ePQElksmhlBC", "X-Proofpoint-ORIG-GUID": "_SLViY58_0czVrAgzu58ePQElksmhlBC", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-01_04,2026-04-01_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 impostorscore=0 clxscore=1015 bulkscore=0 priorityscore=1501\n phishscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 spamscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010144", "Received-SPF": "pass client-ip=205.220.168.131;\n envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com", "X-Spam_score_int": "-7", "X-Spam_score": "-0.8", "X-Spam_bar": "/", "X-Spam_report": "(-0.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=1, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Brian Cain <bcain@quicinc.com>\n\nDefine TCG overrides for {c,}swi {c,s}iad, iassign{r,w}, {s,g}etimask\ninstructions.\n\nReviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>\nSigned-off-by: Brian Cain <brian.cain@oss.qualcomm.com>\n---\n target/hexagon/gen_tcg_sys.h | 25 ++++++++++++++++++++++\n target/hexagon/helper.h | 8 ++++++++\n target/hexagon/op_helper.c | 40 ++++++++++++++++++++++++++++++++++++\n 3 files changed, 73 insertions(+)", "diff": "diff --git a/target/hexagon/gen_tcg_sys.h b/target/hexagon/gen_tcg_sys.h\nindex 04549831ea5..cc72ca86db8 100644\n--- a/target/hexagon/gen_tcg_sys.h\n+++ b/target/hexagon/gen_tcg_sys.h\n@@ -7,6 +7,31 @@\n #ifndef HEXAGON_GEN_TCG_SYS_H\n #define HEXAGON_GEN_TCG_SYS_H\n \n+/* System mode instructions */\n+#define fGEN_TCG_Y2_swi(SHORTCODE) \\\n+ gen_helper_swi(tcg_env, RsV)\n+\n+#define fGEN_TCG_Y2_cswi(SHORTCODE) \\\n+ gen_helper_cswi(tcg_env, RsV)\n+\n+#define fGEN_TCG_Y2_ciad(SHORTCODE) \\\n+ gen_helper_ciad(tcg_env, RsV)\n+\n+#define fGEN_TCG_Y4_siad(SHORTCODE) \\\n+ gen_helper_siad(tcg_env, RsV)\n+\n+#define fGEN_TCG_Y2_iassignw(SHORTCODE) \\\n+ gen_helper_iassignw(tcg_env, RsV)\n+\n+#define fGEN_TCG_Y2_iassignr(SHORTCODE) \\\n+ gen_helper_iassignr(RdV, tcg_env, RsV)\n+\n+#define fGEN_TCG_Y2_getimask(SHORTCODE) \\\n+ gen_helper_getimask(RdV, tcg_env, RsV)\n+\n+#define fGEN_TCG_Y2_setimask(SHORTCODE) \\\n+ gen_helper_setimask(tcg_env, PtV, RsV)\n+\n #define fGEN_TCG_Y2_setprio(SHORTCODE) \\\n gen_helper_setprio(tcg_env, PtV, RsV)\n \ndiff --git a/target/hexagon/helper.h b/target/hexagon/helper.h\nindex 5405342f798..955287133e4 100644\n--- a/target/hexagon/helper.h\n+++ b/target/hexagon/helper.h\n@@ -109,6 +109,14 @@ DEF_HELPER_2(probe_hvx_stores, void, env, int)\n DEF_HELPER_2(probe_pkt_scalar_hvx_stores, void, env, int)\n \n #if !defined(CONFIG_USER_ONLY)\n+DEF_HELPER_2(swi, void, env, i32)\n+DEF_HELPER_2(cswi, void, env, i32)\n+DEF_HELPER_2(ciad, void, env, i32)\n+DEF_HELPER_2(siad, void, env, i32)\n+DEF_HELPER_2(iassignw, void, env, i32)\n+DEF_HELPER_2(iassignr, i32, env, i32)\n+DEF_HELPER_2(getimask, i32, env, i32)\n+DEF_HELPER_3(setimask, void, env, i32, i32)\n DEF_HELPER_2(sreg_read, i32, env, i32)\n DEF_HELPER_2(sreg_read_pair, i64, env, i32)\n DEF_HELPER_2(greg_read, i32, env, i32)\ndiff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c\nindex ed43258cd91..ee282e66e86 100644\n--- a/target/hexagon/op_helper.c\n+++ b/target/hexagon/op_helper.c\n@@ -1389,6 +1389,46 @@ void HELPER(vwhist128qm)(CPUHexagonState *env, int32_t uiV)\n }\n \n #ifndef CONFIG_USER_ONLY\n+void HELPER(ciad)(CPUHexagonState *env, uint32_t mask)\n+{\n+ g_assert_not_reached();\n+}\n+\n+void HELPER(siad)(CPUHexagonState *env, uint32_t mask)\n+{\n+ g_assert_not_reached();\n+}\n+\n+void HELPER(swi)(CPUHexagonState *env, uint32_t mask)\n+{\n+ g_assert_not_reached();\n+}\n+\n+void HELPER(cswi)(CPUHexagonState *env, uint32_t mask)\n+{\n+ g_assert_not_reached();\n+}\n+\n+void HELPER(iassignw)(CPUHexagonState *env, uint32_t src)\n+{\n+ g_assert_not_reached();\n+}\n+\n+uint32_t HELPER(iassignr)(CPUHexagonState *env, uint32_t src)\n+{\n+ g_assert_not_reached();\n+}\n+\n+uint32_t HELPER(getimask)(CPUHexagonState *env, uint32_t tid)\n+{\n+ g_assert_not_reached();\n+}\n+\n+void HELPER(setimask)(CPUHexagonState *env, uint32_t tid, uint32_t imask)\n+{\n+ g_assert_not_reached();\n+}\n+\n void HELPER(sreg_write_masked)(CPUHexagonState *env, uint32_t reg, uint32_t val)\n {\n g_assert_not_reached();\n", "prefixes": [ "v6", "26/37" ] }