Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2218504/?format=api
{ "id": 2218504, "url": "http://patchwork.ozlabs.org/api/patches/2218504/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260401101352.4065798-1-aniket.randive@oss.qualcomm.com/", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260401101352.4065798-1-aniket.randive@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-04-01T10:13:52", "name": "[V2] i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f9b2290e28ece9db5f78e12d2406d1fef01de33c", "submitter": { "id": 92974, "url": "http://patchwork.ozlabs.org/api/people/92974/?format=api", "name": "Aniket Randive", "email": "aniket.randive@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260401101352.4065798-1-aniket.randive@oss.qualcomm.com/mbox/", "series": [ { "id": 498310, "url": "http://patchwork.ozlabs.org/api/series/498310/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=498310", "date": "2026-04-01T10:13:52", "name": "[V2] i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/498310/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218504/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218504/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-i2c+bounces-16902-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-i2c@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=EcQjUpHd;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=E5dUNcsw;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-i2c+bounces-16902-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"EcQjUpHd\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"E5dUNcsw\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.180.131", "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fm17P2S79z1yGH\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 01 Apr 2026 21:14:41 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id F1233305AD49\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 1 Apr 2026 10:14:11 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6F83D3E1220;\n\tWed, 1 Apr 2026 10:14:06 +0000 (UTC)", "from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id CA02E3E0C62\n\tfor <linux-i2c@vger.kernel.org>; Wed, 1 Apr 2026 10:14:04 +0000 (UTC)", "from pps.filterd (m0279868.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 6317AVOG1578381\n\tfor <linux-i2c@vger.kernel.org>; Wed, 1 Apr 2026 10:14:04 GMT", "from mail-pl1-f198.google.com (mail-pl1-f198.google.com\n [209.85.214.198])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d8k6kuh0j-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor <linux-i2c@vger.kernel.org>; Wed, 01 Apr 2026 10:14:03 +0000 (GMT)", "by mail-pl1-f198.google.com with SMTP id\n d9443c01a7336-2b2489af602so8914995ad.1\n for <linux-i2c@vger.kernel.org>; Wed, 01 Apr 2026 03:14:03 -0700 (PDT)", "from hu-arandive-hyd.qualcomm.com ([202.46.22.19])\n by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b2427c5f5bsm148503885ad.82.2026.04.01.03.13.57\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 01 Apr 2026 03:14:01 -0700 (PDT)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775038446; cv=none;\n b=IFLC33ItPB9lE+EXIA1JRITMLJ1kxZnxhgfYlZ7X1xxVXWB3Hee/akO4kUkqO/a95WQtEurG4AuLa+nDxTLLIkv69QSFKl4F6iqcKhFAXjwvzn5VxEmDIwQbP0c1myXhjwQwDZMbG8BrhOZ9gk2pt2B1r+2SWg3cylxjs7kYPfE=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775038446; c=relaxed/simple;\n\tbh=EEswu+6fbqBa08SHQjIIuTp3bMH1hK4CRlphTe6mLzA=;\n\th=From:To:Cc:Subject:Date:Message-Id:MIME-Version;\n b=t6cCPqDxYQEhuTwFy1bzOy20qrXt8f56OwMHaMt1qOPII8DNIf1g8m+jeyO5mxLBOxKLy1Ompytu4tWYqJNG1ztALWKwJlsQJScyp9P40yMa8cWYa7XQLqUDyRbfSYI6ldCcgOi/1mt77I3p70vN7ao+Uyw5D6tZu3Xu/qqPtvU=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=oss.qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=EcQjUpHd;\n dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=E5dUNcsw; arc=none smtp.client-ip=205.220.180.131", "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:date:from:message-id:mime-version\n\t:subject:to; s=qcppdkim1; bh=EnaTxDzY/SHS22gfoLDFYPunIIYegtMK3o1\n\tQ5/kWemM=; b=EcQjUpHdFbEXKNQ/vGfUKZ1KOJKi+aE+2oC3k1CVSMeewo+2ORy\n\t20/hBfCvCAR0AsJf1BRHeHHeyU/6Q9FkUxS48BKl3Gs4WWFNeQDrUxbWyLeOjTjm\n\tw3GNLs5dSUtyNn66o4BOGO32CjS47lJQMZhphely4uU79bVwKxqy773iaqCSNrbv\n\toIw1OVk5qLJlYrj29TXp9TvseLr5eAZvZYHpadqwpDeWOhM90dzssrl/BOxgrMbw\n\t8RLFkyR+p/KOuPkU29cD+zUzT891yXFOMeHS1iY56enkVPWOHJ8MpnHrbUgeNPaJ\n\tlZ7XG9Cgj7puJExfi8mPEhT8nibUZDvbeIQ==", "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=oss.qualcomm.com; s=google; t=1775038443; x=1775643243;\n darn=vger.kernel.org;\n h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n :to:from:from:to:cc:subject:date:message-id:reply-to;\n bh=EnaTxDzY/SHS22gfoLDFYPunIIYegtMK3o1Q5/kWemM=;\n b=E5dUNcswB0gDiEpgmyNjJPMO+QjCBuOy77C+HvV+uVIiHo9j8CFVBtqT559ztykr0F\n /h0CcKkn5Q0p2YwrCFfbyzwWdtc2saFt8CBea9XOBBtOg2UyQS0wQmXHzoo5la5E/NUt\n zBZpKeEKkokGMID4dcKgFX+M+XX4eEEPNOsbPXBVx7in0TJTdiTdM6gOXqmb3m5+rrXP\n WkDk5Do1vUmKurQPT9A7Oa3uxy8/mRYjURTkoMNkCdE3U7w6MKtTmwsNKbB12kbwW50x\n ZpYjpSheAUc27m5EG5MsV5wB7VdNSs1sNPHg6jl1z1Dov1iJX1x2i5vv68O1krOAKI+O\n owiQ==" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1775038443; x=1775643243;\n h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date\n :message-id:reply-to;\n bh=EnaTxDzY/SHS22gfoLDFYPunIIYegtMK3o1Q5/kWemM=;\n b=ijjeF6l9E/vsh1eK9Cf8Kvi4wo13h2pw+KQJvlu8H/CZCkp0Zra6ftCw+zR+qmAAaF\n S6ucOhAMn3N7VRaMnvl9wOsNIFk6abSyugWsx1E4S+74GcO7+DO5v2lLHeOcjIQ+kAl8\n KQ1nY6O0MJdT7dPVe6oLONm6uAtYWXLa+TOSESJfqBBGQzmsqFlDXXcoI+3n7bJ9KzKl\n AsKRLbDl7TF04oEBwppzZdEFX9nmhtZCUPpjgQBA+YffrPU4A1y6ZktF7LA/gOuPH1oJ\n VBpX7/mfl5vC0W4ew0gzaDhbaRZTuoJZfLkeuJlhBg+C4vtjrBh9jMpwci3g5gBWAwVw\n LQSg==", "X-Gm-Message-State": "AOJu0Yweu4kqzDlB6eMcVqKFzI/w9UBdD9ab6+3oHOOVlbP5iQK3TiBp\n\tvsMpreq1QKjIFYhYJIqtPhDWmqZqb9y49AaoTSMrb6w4lxGVXUuHhtdSM6yNORy5N8gpjgZGFkJ\n\tCtA4gVCHcIv2GJ9bCsi92+wFTTUs2UKkfMKrW6tK1NIGdSnCyolD3WeoQHTZkhtE=", "X-Gm-Gg": "ATEYQzx0msv+zbI/NNjIhUt3Cj5k8o0+ypdXdBYtsu/Wz4FAlyTcTEfT7L1iP+EsAa9\n\tRP8WPaUCTkRyxZCeaHLbgBU81e3qUy6WOXxSYyFVkL++Wc6+lWHB+DSDzO7FjlROh4XzZwX+SNj\n\tYHrDk0sSVupSafRBbQb2hod7pFbI/iILEYSXVO7Jpz67UP4KjDxOfxQymR592yVvcC2i/dLnlxP\n\tFc7QoucTdiVuO7lfOVa/mshZL+M0RNHajQhRBr5C8pml7CLWsr4SOWOFrRDKjiJyXJ79d4+euvx\n\tVXK8mPDd7TtRPOPVCJYdMRnWAZSKbJy+aiytg7CPiIPxceoLNRH4BH3QTqETtXlfBEQ5JM66ijS\n\ttgBdR863QdThjDBlfFLRWWJgYl+m5rX8oX+hGyZcHwC589letzshgSrWP", "X-Received": [ "by 2002:a17:903:1b6b:b0:2ae:5346:d4e6 with SMTP id\n d9443c01a7336-2b25efabff3mr60943195ad.28.1775038442608;\n Wed, 01 Apr 2026 03:14:02 -0700 (PDT)", "by 2002:a17:903:1b6b:b0:2ae:5346:d4e6 with SMTP id\n d9443c01a7336-2b25efabff3mr60942995ad.28.1775038442085;\n Wed, 01 Apr 2026 03:14:02 -0700 (PDT)" ], "From": "Aniket Randive <aniket.randive@oss.qualcomm.com>", "To": "mukesh.savaliya@oss.qualcomm.com, viken.dadhaniya@oss.qualcomm.com,\n andi.shyti@kernel.org, sumit.semwal@linaro.org,\n christian.koenig@amd.com", "Cc": "linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,\n dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org,\n naresh.maramaina@oss.qualcomm.com, aniket.randive@oss.qualcomm.com", "Subject": "[PATCH V2] i2c: qcom-geni: Avoid extra TX DMA TRE for single read\n message in GPI mode", "Date": "Wed, 1 Apr 2026 15:43:52 +0530", "Message-Id": "<20260401101352.4065798-1-aniket.randive@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.34.1", "Precedence": "bulk", "X-Mailing-List": "linux-i2c@vger.kernel.org", "List-Id": "<linux-i2c.vger.kernel.org>", "List-Subscribe": "<mailto:linux-i2c+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-i2c+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Authority-Analysis": "v=2.4 cv=bfJmkePB c=1 sm=1 tr=0 ts=69ccefeb cx=c_pps\n a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17\n a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8\n a=qPv6kJ6rrmvbaMxWJaQA:9 a=GvdueXVYPmCkWapjIL-Q:22", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDAxMDA5MiBTYWx0ZWRfX1gi/ipkGGhzW\n sgDTFSZUSIIOBxwAC5rAG8WpXiabJ/WLMwD9J/kOGJ2uJwkVH3UDYddM/qBKzp0up32sOb37WDX\n KkS8ftR/OinGUbwqptiemIzMTazly3f0LV1gs3OY6S8X0j1ZBdn3YMm9i/gfSi7icoRnCV1CpcC\n 1JWYD29YbDunuSxbgUOedbnm4XfxAs7Q48FJ8NFp0qVDItT14LeZUbjeq6eSxa7VvW2HHxRdarZ\n q/9hwI/arKYe73VUVUickCXbBgWdm/5GUoJ3sxF9bujpS6Ybig02mE7vvmE9Ktf+VKzp4qRe2uE\n DmNFT4m2Cr4WHNYcMfUI4WCzak/Gc4HF71bRM/h6sFiRUDzSMD4O3MKuobTTuWiTmL62qyUOALU\n noSvJWhdDeTjn8yi34Zw4cjqw/DNqWRs7jiwPjUb74XzzFcI//85gNKRWQL871Tqpv4LSvnXJxg\n oLReWCS6VjE6OT/5jjw==", "X-Proofpoint-GUID": "S9mF1jKoG8Uq_9nV0lF8jpTeh--yefHY", "X-Proofpoint-ORIG-GUID": "S9mF1jKoG8Uq_9nV0lF8jpTeh--yefHY", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-01_03,2026-04-01_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n malwarescore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 suspectscore=0\n impostorscore=0 phishscore=0 bulkscore=0 priorityscore=1501 spamscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010092" }, "content": "In GPI mode, the I2C GENI driver programs an extra TX DMA transfer\ndescriptor (TRE) on the TX channel when handling a single read message.\nThis results in an unintended write phase being issued on the I2C bus,\neven though a read transaction does not require any TX data.\n\nFor a single-byte read, the correct hardware sequence consists of the\nCONFIG and GO commands followed by a single RX DMA TRE. Programming an\nadditional TX DMA TRE is redundant, causes unnecessary DMA buffer\nmapping on the TX channel, and may lead to incorrect bus behavior.\n\nUpdate the transfer logic to avoid programming a TX DMA TRE for single\nread messages in GPI mode.\n\nCo-developed-by: Maramaina Naresh <naresh.maramaina@oss.qualcomm.com>\nSigned-off-by: Maramaina Naresh <naresh.maramaina@oss.qualcomm.com>\nSigned-off-by: Aniket Randive <aniket.randive@oss.qualcomm.com>\n---\n\nChanges in v2:\n - Updated the commit message.\n\n drivers/i2c/busses/i2c-qcom-geni.c | 18 +++++++++++++-----\n 1 file changed, 13 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c\nindex a4acb78fafb6..2706309bbebb 100644\n--- a/drivers/i2c/busses/i2c-qcom-geni.c\n+++ b/drivers/i2c/busses/i2c-qcom-geni.c\n@@ -625,8 +625,8 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n {\n \tstruct gpi_i2c_config *peripheral;\n \tunsigned int flags;\n-\tvoid *dma_buf;\n-\tdma_addr_t addr;\n+\tvoid *dma_buf = NULL;\n+\tdma_addr_t addr = 0;\n \tenum dma_data_direction map_dirn;\n \tenum dma_transfer_direction dma_dirn;\n \tstruct dma_async_tx_descriptor *desc;\n@@ -639,6 +639,11 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n \tgi2c_gpi_xfer = &gi2c->i2c_multi_desc_config;\n \tmsg_idx = gi2c_gpi_xfer->msg_idx_cnt;\n \n+\tif (op == I2C_WRITE && msgs[msg_idx].flags & I2C_M_RD) {\n+\t\tperipheral->multi_msg = true;\n+\t\tgoto skip_dma;\n+\t}\n+\n \tdma_buf = i2c_get_dma_safe_msg_buf(&msgs[msg_idx], 1);\n \tif (!dma_buf) {\n \t\tret = -ENOMEM;\n@@ -668,6 +673,7 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n \t\tflags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK;\n \t}\n \n+skip_dma:\n \t/* set the length as message for rx txn */\n \tperipheral->rx_len = msgs[msg_idx].len;\n \tperipheral->op = op;\n@@ -740,9 +746,11 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],\n \treturn 0;\n \n err_config:\n-\tdma_unmap_single(gi2c->se.dev->parent, addr,\n-\t\t\t msgs[msg_idx].len, map_dirn);\n-\ti2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false);\n+\tif (op == I2C_WRITE && (msgs[msg_idx].flags & I2C_M_RD)) {\n+\t\tdma_unmap_single(gi2c->se.dev->parent, addr,\n+\t\t\t\t msgs[msg_idx].len, map_dirn);\n+\t\ti2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false);\n+\t}\n \n out:\n \tgi2c->err = ret;\n", "prefixes": [ "V2" ] }