Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2218430/?format=api
{ "id": 2218430, "url": "http://patchwork.ozlabs.org/api/patches/2218430/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260401080354.1347212-1-zhenzhong.duan@intel.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260401080354.1347212-1-zhenzhong.duan@intel.com>", "list_archive_url": null, "date": "2026-04-01T08:03:53", "name": "iommufd: Rename all the idev and idevc variables to hiod and hiodc", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "c6bbd65cae27bf49e3b6ec392f94302434f23350", "submitter": { "id": 81636, "url": "http://patchwork.ozlabs.org/api/people/81636/?format=api", "name": "Duan, Zhenzhong", "email": "zhenzhong.duan@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260401080354.1347212-1-zhenzhong.duan@intel.com/mbox/", "series": [ { "id": 498289, "url": "http://patchwork.ozlabs.org/api/series/498289/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498289", "date": "2026-04-01T08:03:53", "name": "iommufd: Rename all the idev and idevc variables to hiod and hiodc", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498289/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218430/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218430/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=MfaQ41Uv;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4flyGG2VQVz1yGH\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 01 Apr 2026 19:05:24 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w7qYl-0000Y5-Mg; Wed, 01 Apr 2026 04:04:19 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w7qYj-0000XD-2K; Wed, 01 Apr 2026 04:04:17 -0400", "from mgamail.intel.com ([198.175.65.13])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w7qYd-000436-AA; Wed, 01 Apr 2026 04:04:16 -0400", "from fmviesa008.fm.intel.com ([10.60.135.148])\n by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Apr 2026 01:04:05 -0700", "from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Apr 2026 01:04:00 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775030652; x=1806566652;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=4l4y4LlFEhKjXWkq3k86xtA6HKJV+oSTE6YEEsl87FE=;\n b=MfaQ41UvNSttbk4jSftRIbgnLEgluellGn/Pamn2D0BVPQavGGKkgtPV\n FeOERBrxYVBnMocZoPqM67y98qbYDogjT4cy3Q6CbxUJsx0HAlfH7mftb\n ldIKAdZA/Diq1M3gW4Wh6oXcduL4ObNuDh+5THay0U+6RP0Djrc5ErUZR\n /ta2wVrzM4vP3xoP6kAEzqGwcIV4C6gRd6EAo3Lya14NqeU1SpTAhXNuG\n zuL4Da14ZovEkdcCTLqiV41qZSkxzP4+0kjnBXM0WJDgGg+dvlsXBgE6a\n Cg1Lj2jxD1CFg4D9VZgukMiG1Q8t596SNOwctkKXMGMGdXNrz7GIaxPaY w==;", "X-CSE-ConnectionGUID": [ "lrSV2vB/QS2rBrjrCrS3RQ==", "0rePtZusRd69nY61sHxvWA==" ], "X-CSE-MsgGUID": [ "mAknkGBrTEyF/On9fnxtVQ==", "JDW1E45pQX+lOsM6Ikw5eQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11745\"; a=\"87136640\"", "E=Sophos;i=\"6.23,153,1770624000\"; d=\"scan'208\";a=\"87136640\"", "E=Sophos;i=\"6.23,153,1770624000\"; d=\"scan'208\";a=\"223727290\"" ], "X-ExtLoop1": "1", "From": "Zhenzhong Duan <zhenzhong.duan@intel.com>", "To": "qemu-devel@nongnu.org", "Cc": "alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, yi.l.liu@intel.com,\n Zhenzhong Duan <zhenzhong.duan@intel.com>, qemu-arm@nongnu.org", "Subject": "[PATCH] iommufd: Rename all the idev and idevc variables to hiod and\n hiodc", "Date": "Wed, 1 Apr 2026 04:03:53 -0400", "Message-ID": "<20260401080354.1347212-1-zhenzhong.duan@intel.com>", "X-Mailer": "git-send-email 2.47.3", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=198.175.65.13;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com", "X-Spam_score_int": "-28", "X-Spam_score": "-2.9", "X-Spam_bar": "--", "X-Spam_report": "(-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=1, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "We used idev and idevc naming for HostIOMMUDeviceIOMMUFD and corresponding\nclass variables which followed the iommufd_device naming in linux kernel.\n\nThis is mixed with the hiod naming for base type HostIOMMUDevice. Rename\nHostIOMMUDeviceIOMMUFD* to hiodi* for consistency in QEMU.\n\nNo functional change intended.\n\nSuggested-by: Cédric Le Goater <clg@redhat.com>\nSigned-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\n---\n hw/arm/smmuv3-accel.h | 2 +-\n include/system/iommufd.h | 12 ++---\n backends/iommufd.c | 26 +++++------\n hw/arm/smmuv3-accel.c | 93 +++++++++++++++++++------------------\n hw/i386/intel_iommu_accel.c | 44 +++++++++---------\n hw/vfio/container-legacy.c | 10 ++--\n hw/vfio/iommufd.c | 24 +++++-----\n 7 files changed, 107 insertions(+), 104 deletions(-)", "diff": "diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h\nindex dba6c71de5..908a13cbcc 100644\n--- a/hw/arm/smmuv3-accel.h\n+++ b/hw/arm/smmuv3-accel.h\n@@ -34,7 +34,7 @@ typedef struct SMMUS1Hwpt {\n \n typedef struct SMMUv3AccelDevice {\n SMMUDevice sdev;\n- HostIOMMUDeviceIOMMUFD *idev;\n+ HostIOMMUDeviceIOMMUFD *hiodi;\n SMMUS1Hwpt *s1_hwpt;\n IOMMUFDVdev *vdev;\n QLIST_ENTRY(SMMUv3AccelDevice) next;\ndiff --git a/include/system/iommufd.h b/include/system/iommufd.h\nindex 7062944fe6..2925d116ac 100644\n--- a/include/system/iommufd.h\n+++ b/include/system/iommufd.h\n@@ -136,7 +136,7 @@ struct HostIOMMUDeviceIOMMUFDClass {\n *\n * Mandatory callback.\n *\n- * @idev: host IOMMU device backed by IOMMUFD backend.\n+ * @hiodi: host IOMMU device backed by IOMMUFD backend.\n *\n * @hwpt_id: ID of IOMMUFD hardware page table.\n *\n@@ -144,7 +144,7 @@ struct HostIOMMUDeviceIOMMUFDClass {\n *\n * Returns: true on success, false on failure.\n */\n- bool (*attach_hwpt)(HostIOMMUDeviceIOMMUFD *idev, uint32_t hwpt_id,\n+ bool (*attach_hwpt)(HostIOMMUDeviceIOMMUFD *hiodi, uint32_t hwpt_id,\n Error **errp);\n /**\n * @detach_hwpt: detach host IOMMU device from IOMMUFD hardware page table.\n@@ -152,17 +152,17 @@ struct HostIOMMUDeviceIOMMUFDClass {\n *\n * Mandatory callback.\n *\n- * @idev: host IOMMU device backed by IOMMUFD backend.\n+ * @hiodi: host IOMMU device backed by IOMMUFD backend.\n *\n * @errp: pass an Error out when attachment fails.\n *\n * Returns: true on success, false on failure.\n */\n- bool (*detach_hwpt)(HostIOMMUDeviceIOMMUFD *idev, Error **errp);\n+ bool (*detach_hwpt)(HostIOMMUDeviceIOMMUFD *hiodi, Error **errp);\n };\n \n-bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n uint32_t hwpt_id, Error **errp);\n-bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n Error **errp);\n #endif\ndiff --git a/backends/iommufd.c b/backends/iommufd.c\nindex e1fee16acf..410b044370 100644\n--- a/backends/iommufd.c\n+++ b/backends/iommufd.c\n@@ -538,24 +538,24 @@ bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id,\n return true;\n }\n \n-bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n uint32_t hwpt_id, Error **errp)\n {\n- HostIOMMUDeviceIOMMUFDClass *idevc =\n- HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(idev);\n+ HostIOMMUDeviceIOMMUFDClass *hiodic =\n+ HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(hiodi);\n \n- g_assert(idevc->attach_hwpt);\n- return idevc->attach_hwpt(idev, hwpt_id, errp);\n+ g_assert(hiodic->attach_hwpt);\n+ return hiodic->attach_hwpt(hiodi, hwpt_id, errp);\n }\n \n-bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n Error **errp)\n {\n- HostIOMMUDeviceIOMMUFDClass *idevc =\n- HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(idev);\n+ HostIOMMUDeviceIOMMUFDClass *hiodic =\n+ HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(hiodi);\n \n- g_assert(idevc->detach_hwpt);\n- return idevc->detach_hwpt(idev, errp);\n+ g_assert(hiodic->detach_hwpt);\n+ return hiodic->detach_hwpt(hiodi, errp);\n }\n \n static int hiod_iommufd_get_cap(HostIOMMUDevice *hiod, int cap, Error **errp)\n@@ -591,10 +591,10 @@ static bool hiod_iommufd_get_pasid_info(HostIOMMUDevice *hiod,\n \n static void hiod_iommufd_class_init(ObjectClass *oc, const void *data)\n {\n- HostIOMMUDeviceClass *hioc = HOST_IOMMU_DEVICE_CLASS(oc);\n+ HostIOMMUDeviceClass *hiodc = HOST_IOMMU_DEVICE_CLASS(oc);\n \n- hioc->get_cap = hiod_iommufd_get_cap;\n- hioc->get_pasid_info = hiod_iommufd_get_pasid_info;\n+ hiodc->get_cap = hiod_iommufd_get_cap;\n+ hiodc->get_pasid_info = hiod_iommufd_get_pasid_info;\n };\n \n static const TypeInfo types[] = {\ndiff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c\nindex 65c2f44880..3630078751 100644\n--- a/hw/arm/smmuv3-accel.c\n+++ b/hw/arm/smmuv3-accel.c\n@@ -129,16 +129,16 @@ smmuv3_accel_check_hw_compatible(SMMUv3State *s,\n }\n \n static bool\n-smmuv3_accel_hw_compatible(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,\n+smmuv3_accel_hw_compatible(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *hiodi,\n Error **errp)\n {\n struct iommu_hw_info_arm_smmuv3 info;\n uint32_t data_type;\n uint64_t caps;\n \n- if (!iommufd_backend_get_device_info(idev->iommufd, idev->devid, &data_type,\n- &info, sizeof(info), &caps, NULL,\n- errp)) {\n+ if (!iommufd_backend_get_device_info(hiodi->iommufd, hiodi->devid,\n+ &data_type, &info, sizeof(info), &caps,\n+ NULL, errp)) {\n return false;\n }\n \n@@ -182,15 +182,15 @@ static bool\n smmuv3_accel_alloc_vdev(SMMUv3AccelDevice *accel_dev, int sid, Error **errp)\n {\n SMMUv3AccelState *accel = accel_dev->s_accel;\n- HostIOMMUDeviceIOMMUFD *idev = accel_dev->idev;\n+ HostIOMMUDeviceIOMMUFD *hiodi = accel_dev->hiodi;\n IOMMUFDVdev *vdev = accel_dev->vdev;\n uint32_t vdevice_id;\n \n- if (!idev || vdev) {\n+ if (!hiodi || vdev) {\n return true;\n }\n \n- if (!iommufd_backend_alloc_vdev(idev->iommufd, idev->devid,\n+ if (!iommufd_backend_alloc_vdev(hiodi->iommufd, hiodi->devid,\n accel->viommu->viommu_id, sid,\n &vdevice_id, errp)) {\n return false;\n@@ -209,7 +209,7 @@ smmuv3_accel_dev_alloc_translate(SMMUv3AccelDevice *accel_dev, STE *ste,\n {\n uint64_t ste_0 = (uint64_t)ste->word[0] | (uint64_t)ste->word[1] << 32;\n uint64_t ste_1 = (uint64_t)ste->word[2] | (uint64_t)ste->word[3] << 32;\n- HostIOMMUDeviceIOMMUFD *idev = accel_dev->idev;\n+ HostIOMMUDeviceIOMMUFD *hiodi = accel_dev->hiodi;\n SMMUv3AccelState *accel = accel_dev->s_accel;\n struct iommu_hwpt_arm_smmuv3 nested_data = {\n .ste = {\n@@ -220,7 +220,7 @@ smmuv3_accel_dev_alloc_translate(SMMUv3AccelDevice *accel_dev, STE *ste,\n uint32_t hwpt_id = 0, flags = 0;\n SMMUS1Hwpt *s1_hwpt;\n \n- if (!iommufd_backend_alloc_hwpt(idev->iommufd, idev->devid,\n+ if (!iommufd_backend_alloc_hwpt(hiodi->iommufd, hiodi->devid,\n accel->viommu->viommu_id, flags,\n IOMMU_HWPT_DATA_ARM_SMMUV3,\n sizeof(nested_data), &nested_data,\n@@ -242,7 +242,7 @@ bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n .inval_ste_allowed = true};\n SMMUv3AccelState *accel = s->s_accel;\n SMMUv3AccelDevice *accel_dev;\n- HostIOMMUDeviceIOMMUFD *idev;\n+ HostIOMMUDeviceIOMMUFD *hiodi;\n uint32_t config, hwpt_id = 0;\n SMMUS1Hwpt *s1_hwpt = NULL;\n const char *type;\n@@ -257,7 +257,7 @@ bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n return true;\n }\n \n- idev = accel_dev->idev;\n+ hiodi = accel_dev->hiodi;\n if (!smmuv3_accel_alloc_vdev(accel_dev, sid, errp)) {\n return false;\n }\n@@ -300,9 +300,9 @@ bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n return false;\n }\n \n- if (!host_iommu_device_iommufd_attach_hwpt(idev, hwpt_id, errp)) {\n+ if (!host_iommu_device_iommufd_attach_hwpt(hiodi, hwpt_id, errp)) {\n if (s1_hwpt) {\n- iommufd_backend_free_id(idev->iommufd, s1_hwpt->hwpt_id);\n+ iommufd_backend_free_id(hiodi->iommufd, s1_hwpt->hwpt_id);\n g_free(s1_hwpt);\n }\n return false;\n@@ -310,7 +310,7 @@ bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n \n /* Free the previous s1_hwpt */\n if (accel_dev->s1_hwpt) {\n- iommufd_backend_free_id(idev->iommufd, accel_dev->s1_hwpt->hwpt_id);\n+ iommufd_backend_free_id(hiodi->iommufd, accel_dev->s1_hwpt->hwpt_id);\n g_free(accel_dev->s1_hwpt);\n }\n \n@@ -524,7 +524,7 @@ free_veventq:\n }\n \n static bool\n-smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,\n+smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *hiodi,\n Error **errp)\n {\n SMMUv3AccelState *accel = s->s_accel;\n@@ -534,11 +534,11 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,\n struct iommu_hwpt_arm_smmuv3 abort_data = {\n .ste = { SMMU_STE_VALID, 0x0ULL },\n };\n- uint32_t s2_hwpt_id = idev->hwpt_id;\n+ uint32_t s2_hwpt_id = hiodi->hwpt_id;\n uint32_t viommu_id, hwpt_id;\n IOMMUFDViommu *viommu;\n \n- if (!iommufd_backend_alloc_viommu(idev->iommufd, idev->devid,\n+ if (!iommufd_backend_alloc_viommu(hiodi->iommufd, hiodi->devid,\n IOMMU_VIOMMU_TYPE_ARM_SMMUV3,\n s2_hwpt_id, &viommu_id, errp)) {\n return false;\n@@ -547,21 +547,21 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,\n viommu = g_new0(IOMMUFDViommu, 1);\n viommu->viommu_id = viommu_id;\n viommu->s2_hwpt_id = s2_hwpt_id;\n- viommu->iommufd = idev->iommufd;\n+ viommu->iommufd = hiodi->iommufd;\n accel->viommu = viommu;\n \n /*\n * Pre-allocate HWPTs for S1 bypass and abort cases. These will be attached\n * later for guest STEs or GBPAs that require bypass or abort configuration.\n */\n- if (!iommufd_backend_alloc_hwpt(idev->iommufd, idev->devid, viommu_id,\n+ if (!iommufd_backend_alloc_hwpt(hiodi->iommufd, hiodi->devid, viommu_id,\n 0, IOMMU_HWPT_DATA_ARM_SMMUV3,\n sizeof(abort_data), &abort_data,\n &accel->abort_hwpt_id, errp)) {\n goto free_viommu;\n }\n \n- if (!iommufd_backend_alloc_hwpt(idev->iommufd, idev->devid, viommu_id,\n+ if (!iommufd_backend_alloc_hwpt(hiodi->iommufd, hiodi->devid, viommu_id,\n 0, IOMMU_HWPT_DATA_ARM_SMMUV3,\n sizeof(bypass_data), &bypass_data,\n &accel->bypass_hwpt_id, errp)) {\n@@ -575,7 +575,7 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,\n \n /* Attach a HWPT based on SMMUv3 GBPA.ABORT value */\n hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel);\n- if (!host_iommu_device_iommufd_attach_hwpt(idev, hwpt_id, errp)) {\n+ if (!host_iommu_device_iommufd_attach_hwpt(hiodi, hwpt_id, errp)) {\n goto free_veventq;\n }\n return true;\n@@ -583,11 +583,11 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev,\n free_veventq:\n smmuv3_accel_free_veventq(accel);\n free_bypass_hwpt:\n- iommufd_backend_free_id(idev->iommufd, accel->bypass_hwpt_id);\n+ iommufd_backend_free_id(hiodi->iommufd, accel->bypass_hwpt_id);\n free_abort_hwpt:\n- iommufd_backend_free_id(idev->iommufd, accel->abort_hwpt_id);\n+ iommufd_backend_free_id(hiodi->iommufd, accel->abort_hwpt_id);\n free_viommu:\n- iommufd_backend_free_id(idev->iommufd, viommu->viommu_id);\n+ iommufd_backend_free_id(hiodi->iommufd, viommu->viommu_id);\n g_free(viommu);\n accel->viommu = NULL;\n return false;\n@@ -596,20 +596,20 @@ free_viommu:\n static bool smmuv3_accel_set_iommu_device(PCIBus *bus, void *opaque, int devfn,\n HostIOMMUDevice *hiod, Error **errp)\n {\n- HostIOMMUDeviceIOMMUFD *idev = HOST_IOMMU_DEVICE_IOMMUFD(hiod);\n+ HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(hiod);\n SMMUState *bs = opaque;\n SMMUv3State *s = ARM_SMMUV3(bs);\n SMMUPciBus *sbus = smmu_get_sbus(bs, bus);\n SMMUv3AccelDevice *accel_dev = smmuv3_accel_get_dev(bs, sbus, bus, devfn);\n \n- if (!idev) {\n+ if (!hiodi) {\n return true;\n }\n \n- if (accel_dev->idev) {\n- if (accel_dev->idev != idev) {\n- error_setg(errp, \"Device already has an associated idev 0x%x\",\n- idev->devid);\n+ if (accel_dev->hiodi) {\n+ if (accel_dev->hiodi != hiodi) {\n+ error_setg(errp, \"Device already has an associated hiodi 0x%x\",\n+ hiodi->devid);\n return false;\n }\n return true;\n@@ -619,7 +619,7 @@ static bool smmuv3_accel_set_iommu_device(PCIBus *bus, void *opaque, int devfn,\n * Check the host SMMUv3 associated with the dev is compatible with the\n * QEMU SMMUv3 accel.\n */\n- if (!smmuv3_accel_hw_compatible(s, idev, errp)) {\n+ if (!smmuv3_accel_hw_compatible(s, hiodi, errp)) {\n return false;\n }\n \n@@ -627,17 +627,17 @@ static bool smmuv3_accel_set_iommu_device(PCIBus *bus, void *opaque, int devfn,\n goto done;\n }\n \n- if (!smmuv3_accel_alloc_viommu(s, idev, errp)) {\n- error_append_hint(errp, \"Unable to alloc vIOMMU: idev devid 0x%x: \",\n- idev->devid);\n+ if (!smmuv3_accel_alloc_viommu(s, hiodi, errp)) {\n+ error_append_hint(errp, \"Unable to alloc vIOMMU: hiodi devid 0x%x: \",\n+ hiodi->devid);\n return false;\n }\n \n done:\n- accel_dev->idev = idev;\n+ accel_dev->hiodi = hiodi;\n accel_dev->s_accel = s->s_accel;\n QLIST_INSERT_HEAD(&s->s_accel->device_list, accel_dev, next);\n- trace_smmuv3_accel_set_iommu_device(devfn, idev->devid);\n+ trace_smmuv3_accel_set_iommu_device(devfn, hiodi->devid);\n return true;\n }\n \n@@ -646,7 +646,7 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque,\n {\n SMMUState *bs = opaque;\n SMMUPciBus *sbus = g_hash_table_lookup(bs->smmu_pcibus_by_busptr, bus);\n- HostIOMMUDeviceIOMMUFD *idev;\n+ HostIOMMUDeviceIOMMUFD *hiodi;\n SMMUv3AccelDevice *accel_dev;\n SMMUv3AccelState *accel;\n IOMMUFDVdev *vdev;\n@@ -662,16 +662,16 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque,\n }\n \n accel_dev = container_of(sdev, SMMUv3AccelDevice, sdev);\n- idev = accel_dev->idev;\n+ hiodi = accel_dev->hiodi;\n accel = accel_dev->s_accel;\n /* Re-attach the default s2 hwpt id */\n- if (!host_iommu_device_iommufd_attach_hwpt(idev, idev->hwpt_id, NULL)) {\n- error_report(\"Unable to attach the default HW pagetable: idev devid \"\n- \"0x%x\", idev->devid);\n+ if (!host_iommu_device_iommufd_attach_hwpt(hiodi, hiodi->hwpt_id, NULL)) {\n+ error_report(\"Unable to attach the default HW pagetable: hiodi devid \"\n+ \"0x%x\", hiodi->devid);\n }\n \n if (accel_dev->s1_hwpt) {\n- iommufd_backend_free_id(accel_dev->idev->iommufd,\n+ iommufd_backend_free_id(accel_dev->hiodi->iommufd,\n accel_dev->s1_hwpt->hwpt_id);\n g_free(accel_dev->s1_hwpt);\n accel_dev->s1_hwpt = NULL;\n@@ -684,10 +684,10 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque,\n accel_dev->vdev = NULL;\n }\n \n- accel_dev->idev = NULL;\n+ accel_dev->hiodi = NULL;\n accel_dev->s_accel = NULL;\n QLIST_REMOVE(accel_dev, next);\n- trace_smmuv3_accel_unset_iommu_device(devfn, idev->devid);\n+ trace_smmuv3_accel_unset_iommu_device(devfn, hiodi->devid);\n \n if (QLIST_EMPTY(&accel->device_list)) {\n smmuv3_accel_free_viommu(accel);\n@@ -879,10 +879,11 @@ bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)\n \n hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel);\n QLIST_FOREACH(accel_dev, &accel->device_list, next) {\n- if (!host_iommu_device_iommufd_attach_hwpt(accel_dev->idev, hwpt_id,\n+ if (!host_iommu_device_iommufd_attach_hwpt(accel_dev->hiodi, hwpt_id,\n &local_err)) {\n error_append_hint(&local_err, \"Failed to attach GBPA hwpt %u for \"\n- \"idev devid %u\", hwpt_id, accel_dev->idev->devid);\n+ \"hiodi devid %u\", hwpt_id,\n+ accel_dev->hiodi->devid);\n error_report_err(local_err);\n local_err = NULL;\n all_ok = false;\ndiff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex 67d54849f2..ed3793602b 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -69,7 +69,7 @@ VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as)\n return NULL;\n }\n \n-static bool vtd_create_fs_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+static bool vtd_create_fs_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n VTDPASIDEntry *pe, uint32_t *fs_hwpt_id,\n Error **errp)\n {\n@@ -81,27 +81,27 @@ static bool vtd_create_fs_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n vtd.addr_width = vtd_pe_get_fs_aw(pe);\n vtd.pgtbl_addr = (uint64_t)vtd_pe_get_fspt_base(pe);\n \n- return iommufd_backend_alloc_hwpt(idev->iommufd, idev->devid, idev->hwpt_id,\n- 0, IOMMU_HWPT_DATA_VTD_S1, sizeof(vtd),\n- &vtd, fs_hwpt_id, errp);\n+ return iommufd_backend_alloc_hwpt(hiodi->iommufd, hiodi->devid,\n+ hiodi->hwpt_id, 0, IOMMU_HWPT_DATA_VTD_S1,\n+ sizeof(vtd), &vtd, fs_hwpt_id, errp);\n }\n \n-static void vtd_destroy_old_fs_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+static void vtd_destroy_old_fs_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n VTDAddressSpace *vtd_as)\n {\n if (!vtd_as->fs_hwpt_id) {\n return;\n }\n- iommufd_backend_free_id(idev->iommufd, vtd_as->fs_hwpt_id);\n+ iommufd_backend_free_id(hiodi->iommufd, vtd_as->fs_hwpt_id);\n vtd_as->fs_hwpt_id = 0;\n }\n \n static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n VTDAddressSpace *vtd_as, Error **errp)\n {\n- HostIOMMUDeviceIOMMUFD *idev = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n+ HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n VTDPASIDEntry *pe = &vtd_as->pasid_cache_entry.pasid_entry;\n- uint32_t hwpt_id = idev->hwpt_id;\n+ uint32_t hwpt_id = hiodi->hwpt_id;\n bool ret;\n \n /*\n@@ -116,21 +116,21 @@ static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n }\n \n if (vtd_pe_pgtt_is_fst(pe)) {\n- if (!vtd_create_fs_hwpt(idev, pe, &hwpt_id, errp)) {\n+ if (!vtd_create_fs_hwpt(hiodi, pe, &hwpt_id, errp)) {\n return false;\n }\n }\n \n- ret = host_iommu_device_iommufd_attach_hwpt(idev, hwpt_id, errp);\n- trace_vtd_device_attach_hwpt(idev->devid, vtd_as->pasid, hwpt_id, ret);\n+ ret = host_iommu_device_iommufd_attach_hwpt(hiodi, hwpt_id, errp);\n+ trace_vtd_device_attach_hwpt(hiodi->devid, vtd_as->pasid, hwpt_id, ret);\n if (ret) {\n /* Destroy old fs_hwpt if it's a replacement */\n- vtd_destroy_old_fs_hwpt(idev, vtd_as);\n+ vtd_destroy_old_fs_hwpt(hiodi, vtd_as);\n if (vtd_pe_pgtt_is_fst(pe)) {\n vtd_as->fs_hwpt_id = hwpt_id;\n }\n } else if (vtd_pe_pgtt_is_fst(pe)) {\n- iommufd_backend_free_id(idev->iommufd, hwpt_id);\n+ iommufd_backend_free_id(hiodi->iommufd, hwpt_id);\n }\n \n return ret;\n@@ -139,27 +139,28 @@ static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n static bool vtd_device_detach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n VTDAddressSpace *vtd_as, Error **errp)\n {\n- HostIOMMUDeviceIOMMUFD *idev = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n+ HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n IntelIOMMUState *s = vtd_as->iommu_state;\n uint32_t pasid = vtd_as->pasid;\n bool ret;\n \n if (s->dmar_enabled && s->root_scalable) {\n- ret = host_iommu_device_iommufd_detach_hwpt(idev, errp);\n- trace_vtd_device_detach_hwpt(idev->devid, pasid, ret);\n+ ret = host_iommu_device_iommufd_detach_hwpt(hiodi, errp);\n+ trace_vtd_device_detach_hwpt(hiodi->devid, pasid, ret);\n } else {\n /*\n * If DMAR remapping is disabled or guest switches to legacy mode,\n * we fallback to the default HWPT which contains shadow page table.\n * So guest DMA could still work.\n */\n- ret = host_iommu_device_iommufd_attach_hwpt(idev, idev->hwpt_id, errp);\n- trace_vtd_device_reattach_def_hwpt(idev->devid, pasid, idev->hwpt_id,\n+ ret = host_iommu_device_iommufd_attach_hwpt(hiodi, hiodi->hwpt_id,\n+ errp);\n+ trace_vtd_device_reattach_def_hwpt(hiodi->devid, pasid, hiodi->hwpt_id,\n ret);\n }\n \n if (ret) {\n- vtd_destroy_old_fs_hwpt(idev, vtd_as);\n+ vtd_destroy_old_fs_hwpt(hiodi, vtd_as);\n }\n \n return ret;\n@@ -211,13 +212,14 @@ static void vtd_flush_host_piotlb_locked(gpointer key, gpointer value,\n did = VTD_SM_PASID_ENTRY_DID(&pc_entry->pasid_entry);\n \n if (piotlb_info->domain_id == did && piotlb_info->pasid == PASID_0) {\n- HostIOMMUDeviceIOMMUFD *idev =\n+ HostIOMMUDeviceIOMMUFD *hiodi =\n HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n uint32_t entry_num = 1; /* Only implement one request for simplicity */\n Error *local_err = NULL;\n struct iommu_hwpt_vtd_s1_invalidate *cache = piotlb_info->inv_data;\n \n- if (!iommufd_backend_invalidate_cache(idev->iommufd, vtd_as->fs_hwpt_id,\n+ if (!iommufd_backend_invalidate_cache(hiodi->iommufd,\n+ vtd_as->fs_hwpt_id,\n IOMMU_HWPT_INVALIDATE_DATA_VTD_S1,\n sizeof(*cache), &entry_num, cache,\n &local_err)) {\ndiff --git a/hw/vfio/container-legacy.c b/hw/vfio/container-legacy.c\nindex 625f151364..d301b27aa6 100644\n--- a/hw/vfio/container-legacy.c\n+++ b/hw/vfio/container-legacy.c\n@@ -1244,12 +1244,12 @@ static void vfio_iommu_legacy_instance_init(Object *obj)\n \n static void hiod_legacy_vfio_class_init(ObjectClass *oc, const void *data)\n {\n- HostIOMMUDeviceClass *hioc = HOST_IOMMU_DEVICE_CLASS(oc);\n+ HostIOMMUDeviceClass *hiodc = HOST_IOMMU_DEVICE_CLASS(oc);\n \n- hioc->realize = hiod_legacy_vfio_realize;\n- hioc->get_cap = hiod_legacy_vfio_get_cap;\n- hioc->get_iova_ranges = hiod_legacy_vfio_get_iova_ranges;\n- hioc->get_page_size_mask = hiod_legacy_vfio_get_page_size_mask;\n+ hiodc->realize = hiod_legacy_vfio_realize;\n+ hiodc->get_cap = hiod_legacy_vfio_get_cap;\n+ hiodc->get_iova_ranges = hiod_legacy_vfio_get_iova_ranges;\n+ hiodc->get_page_size_mask = hiod_legacy_vfio_get_page_size_mask;\n };\n \n static const TypeInfo types[] = {\ndiff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c\nindex 3e33dfbb35..399b36aa75 100644\n--- a/hw/vfio/iommufd.c\n+++ b/hw/vfio/iommufd.c\n@@ -917,19 +917,19 @@ static void vfio_iommu_iommufd_class_init(ObjectClass *klass, const void *data)\n };\n \n static bool\n-host_iommu_device_iommufd_vfio_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+host_iommu_device_iommufd_vfio_attach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n uint32_t hwpt_id, Error **errp)\n {\n- VFIODevice *vbasedev = HOST_IOMMU_DEVICE(idev)->agent;\n+ VFIODevice *vbasedev = HOST_IOMMU_DEVICE(hiodi)->agent;\n \n return !iommufd_cdev_attach_ioas_hwpt(vbasedev, hwpt_id, errp);\n }\n \n static bool\n-host_iommu_device_iommufd_vfio_detach_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n+host_iommu_device_iommufd_vfio_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n Error **errp)\n {\n- VFIODevice *vbasedev = HOST_IOMMU_DEVICE(idev)->agent;\n+ VFIODevice *vbasedev = HOST_IOMMU_DEVICE(hiodi)->agent;\n \n return iommufd_cdev_detach_ioas_hwpt(vbasedev, errp);\n }\n@@ -938,7 +938,7 @@ static bool hiod_iommufd_vfio_realize(HostIOMMUDevice *hiod, void *opaque,\n Error **errp)\n {\n VFIODevice *vdev = opaque;\n- HostIOMMUDeviceIOMMUFD *idev;\n+ HostIOMMUDeviceIOMMUFD *hiodi;\n HostIOMMUDeviceCaps *caps = &hiod->caps;\n VendorCaps *vendor_caps = &caps->vendor_caps;\n enum iommu_hw_info_type type;\n@@ -958,10 +958,10 @@ static bool hiod_iommufd_vfio_realize(HostIOMMUDevice *hiod, void *opaque,\n caps->hw_caps = hw_caps;\n caps->max_pasid_log2 = max_pasid_log2;\n \n- idev = HOST_IOMMU_DEVICE_IOMMUFD(hiod);\n- idev->iommufd = vdev->iommufd;\n- idev->devid = vdev->devid;\n- idev->hwpt_id = vdev->hwpt->hwpt_id;\n+ hiodi = HOST_IOMMU_DEVICE_IOMMUFD(hiod);\n+ hiodi->iommufd = vdev->iommufd;\n+ hiodi->devid = vdev->devid;\n+ hiodi->hwpt_id = vdev->hwpt->hwpt_id;\n \n return true;\n }\n@@ -988,14 +988,14 @@ hiod_iommufd_vfio_get_page_size_mask(HostIOMMUDevice *hiod)\n static void hiod_iommufd_vfio_class_init(ObjectClass *oc, const void *data)\n {\n HostIOMMUDeviceClass *hiodc = HOST_IOMMU_DEVICE_CLASS(oc);\n- HostIOMMUDeviceIOMMUFDClass *idevc = HOST_IOMMU_DEVICE_IOMMUFD_CLASS(oc);\n+ HostIOMMUDeviceIOMMUFDClass *hiodic = HOST_IOMMU_DEVICE_IOMMUFD_CLASS(oc);\n \n hiodc->realize = hiod_iommufd_vfio_realize;\n hiodc->get_iova_ranges = hiod_iommufd_vfio_get_iova_ranges;\n hiodc->get_page_size_mask = hiod_iommufd_vfio_get_page_size_mask;\n \n- idevc->attach_hwpt = host_iommu_device_iommufd_vfio_attach_hwpt;\n- idevc->detach_hwpt = host_iommu_device_iommufd_vfio_detach_hwpt;\n+ hiodic->attach_hwpt = host_iommu_device_iommufd_vfio_attach_hwpt;\n+ hiodic->detach_hwpt = host_iommu_device_iommufd_vfio_detach_hwpt;\n };\n \n static const TypeInfo types[] = {\n", "prefixes": [] }