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GET /api/patches/2218341/?format=api
{ "id": 2218341, "url": "http://patchwork.ozlabs.org/api/patches/2218341/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260401031917.9108-1-jian.yang@mediatek.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260401031917.9108-1-jian.yang@mediatek.com>", "list_archive_url": null, "date": "2026-04-01T03:16:42", "name": "[v1] PCI: mediatek-gen3: Align PERST# sequence with PCIe CEM specification", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2d158a8b50e4febc44ee81450591aea2e7a3033e", "submitter": { "id": 85572, "url": "http://patchwork.ozlabs.org/api/people/85572/?format=api", "name": "Jian Yang", "email": "jian.yang@mediatek.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260401031917.9108-1-jian.yang@mediatek.com/mbox/", "series": [ { "id": 498270, "url": "http://patchwork.ozlabs.org/api/series/498270/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=498270", "date": "2026-04-01T03:16:42", "name": "[v1] PCI: mediatek-gen3: Align PERST# sequence with PCIe CEM specification", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498270/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218341/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218341/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51636-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256\n header.s=dk header.b=TE27jW/I;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n d=mediatek.com; s=dk;\n\th=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From;\n bh=fJgKS+xYGiuhM4C+jM+iQKuLmgPvl+plPrkSGwo6cRo=;\n\tb=TE27jW/I0mntBGLlvtKAZeX3Ckx1mUHM+lg3X91qfTDpC0FAJjxeWoPCHJfXVm1o7C+uP8XpGESNc1zeGjACth6CHzNpsSS4mKLSsbmGnqbZaD4EmRjWwZG4wXXR6ZLPMMQNL6MMhoaxDeMy94Esx9tZ6I09JcIRTKqYdHq7hxo=;", "X-CID-P-RULE": "Release_Ham", "X-CID-O-INFO": "VERSION:1.3.12,REQID:550ac3da-97e9-4342-84cb-8b997c2ef74d,IP:0,U\n\tRL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO\n\tN:release,TS:-25", "X-CID-META": "VersionHash:e7bac3a,CLOUDID:7c2a75a7-e101-400a-acb5-0dbb5a913469,B\n\tulkID:nil,BulkQuantity:0,Recheck:0,SF:102|836|888|898,TC:-5,Content:0|15|5\n\t0,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0,OSA\n\t:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0", "X-CID-BVR": "2,SSN|SDN", "X-CID-BAS": "2,SSN|SDN,0,_", "X-CID-FACTOR": "TF_CID_SPAM_SNR", "X-CID-RHF": "D41D8CD98F00B204E9800998ECF8427E", "From": "Jian Yang <jian.yang@mediatek.com>", "To": "Matthias Brugger <matthias.bgg@gmail.com>,\n AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,\n Ryder Lee <ryder.lee@mediatek.com>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>", "CC": "<linux-pci@vger.kernel.org>, <linux-mediatek@lists.infradead.org>,\n\t<linux-kernel@vger.kernel.org>,\n\t<Project_Global_Chrome_Upstream_Group@mediatek.com>,\n\t<jian.yang@mediatek.com>, <chuanjia.liu@mediatek.com>,\n\t<yonglong.wu@mediatek.com>", "Subject": "[PATCH v1] PCI: mediatek-gen3: Align PERST# sequence with PCIe CEM\n specification", "Date": "Wed, 1 Apr 2026 11:16:42 +0800", "Message-ID": "<20260401031917.9108-1-jian.yang@mediatek.com>", "X-Mailer": "git-send-email 2.46.0", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain" }, "content": "Fix the control sequence of PERST# during system bootup/shutdown to\nmeet the requirement from PCIe CEM specification. There are two major\nchanges in this patch:\n\n1. Some of MediaTek's chip will stop generating REFCLK if the\nPCIE_PHY_RSTB signal of PCIe controller is asserted. We have to\nadjust the startup sequence as follows to ensure that PERST# will be\nde-asserted after the REFCLK is stable:\nAssert PHY reset and PERST# -> delay 10ms -> De-assert PHY reset ->\ndelay 100ms -> De-assert PERST#\n\n2. Add 'shutdown' callback to control the timing of PERST# and power\nduring the system shutdown phase, ensuring that PERST# is active\nbefore the power on connector is removed.\n\nSigned-off-by: Jian Yang <jian.yang@mediatek.com>\n---\n drivers/pci/controller/pcie-mediatek-gen3.c | 39 +++++++++++++++++++--\n 1 file changed, 36 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c\nindex a94fdbaf47fe..66d177918565 100644\n--- a/drivers/pci/controller/pcie-mediatek-gen3.c\n+++ b/drivers/pci/controller/pcie-mediatek-gen3.c\n@@ -62,6 +62,7 @@\n #define PCIE_PHY_RSTB\t\t\tBIT(1)\n #define PCIE_BRG_RSTB\t\t\tBIT(2)\n #define PCIE_PE_RSTB\t\t\tBIT(3)\n+#define PCIE_BRG_RST_RDY_MS\t\t10\n \n #define PCIE_LTSSM_STATUS_REG\t\t0x150\n #define PCIE_LTSSM_STATE_MASK\t\tGENMASK(28, 24)\n@@ -133,6 +134,7 @@\n #define MAX_NUM_PHY_RESETS\t\t3\n \n #define PCIE_MTK_RESET_TIME_US\t\t10\n+#define PCIE_MTK_PDN_PERST_TIME_MS\t5\n \n /* Time in ms needed to complete PCIe reset on EN7581 SoC */\n #define PCIE_EN7581_RESET_TIME_MS\t100\n@@ -430,6 +432,21 @@ static int mtk_pcie_devices_power_up(struct mtk_gen3_pcie *pcie)\n \t\treturn err;\n \t}\n \n+\t/*\n+\t * Some of MediaTek's chips won't output REFCLK when PCIE_PHY_RSTB is\n+\t * asserted, we have to de-assert MAC & PHY & BRG reset signals first\n+\t * to allow the REFCLK to be stable. While PCIE_BRG_RSTB is asserted,\n+\t * there is a short period during which the PCIe internal register\n+\t * cannot be accessed, so we need to wait 10ms here.\n+\t */\n+\tmsleep(PCIE_BRG_RST_RDY_MS);\n+\n+\tif (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {\n+\t\t/* De-assert MAC, PHY and BRG reset signals */\n+\t\tval &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB);\n+\t\twritel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);\n+\t}\n+\n \t/*\n \t * Described in PCIe CEM specification revision 6.0.\n \t *\n@@ -439,9 +456,8 @@ static int mtk_pcie_devices_power_up(struct mtk_gen3_pcie *pcie)\n \tmsleep(PCIE_T_PVPERL_MS);\n \n \tif (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {\n-\t\t/* De-assert reset signals */\n-\t\tval &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB |\n-\t\t\t PCIE_PE_RSTB);\n+\t\t/* De-assert PERST# signal */\n+\t\tval &= ~PCIE_PE_RSTB;\n \t\twritel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);\n \t}\n \n@@ -459,6 +475,14 @@ static void mtk_pcie_devices_power_down(struct mtk_gen3_pcie *pcie)\n \t\twritel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);\n \t}\n \n+\t/*\n+\t * Described in PCIe CEM specification revision 6.0.\n+\t *\n+\t * The PERST# gose active before the power on the connector is removed.\n+\t * Wait a while to ensure the voltage transition of PERST# is completed.\n+\t */\n+\tmsleep(PCIE_MTK_PDN_PERST_TIME_MS);\n+\n \tpci_pwrctrl_power_off_devices(pcie->dev);\n }\n \n@@ -1266,6 +1290,14 @@ static void mtk_pcie_remove(struct platform_device *pdev)\n \tmtk_pcie_irq_teardown(pcie);\n }\n \n+static void mtk_pcie_shutdown(struct platform_device *pdev)\n+{\n+\tstruct mtk_gen3_pcie *pcie = platform_get_drvdata(pdev);\n+\n+\tmtk_pcie_devices_power_down(pcie);\n+\tmtk_pcie_power_down(pcie);\n+}\n+\n static void mtk_pcie_irq_save(struct mtk_gen3_pcie *pcie)\n {\n \tint i;\n@@ -1404,6 +1436,7 @@ MODULE_DEVICE_TABLE(of, mtk_pcie_of_match);\n static struct platform_driver mtk_pcie_driver = {\n \t.probe = mtk_pcie_probe,\n \t.remove = mtk_pcie_remove,\n+\t.shutdown = mtk_pcie_shutdown,\n \t.driver = {\n \t\t.name = \"mtk-pcie-gen3\",\n \t\t.of_match_table = mtk_pcie_of_match,\n", "prefixes": [ "v1" ] }