get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/2218270/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2218270,
    "url": "http://patchwork.ozlabs.org/api/patches/2218270/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260331200658.1306-5-mailingradian@gmail.com/",
    "project": {
        "id": 42,
        "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api",
        "name": "Linux GPIO development",
        "link_name": "linux-gpio",
        "list_id": "linux-gpio.vger.kernel.org",
        "list_email": "linux-gpio@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260331200658.1306-5-mailingradian@gmail.com>",
    "list_archive_url": null,
    "date": "2026-03-31T20:06:58",
    "name": "[v5,4/4] arm64: dts: qcom: sdm670: add lpi pinctrl",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "c4e1c318d4fedaa9888865b97b7940def3f5de87",
    "submitter": {
        "id": 84825,
        "url": "http://patchwork.ozlabs.org/api/people/84825/?format=api",
        "name": "Richard Acayan",
        "email": "mailingradian@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260331200658.1306-5-mailingradian@gmail.com/mbox/",
    "series": [
        {
            "id": 498247,
            "url": "http://patchwork.ozlabs.org/api/series/498247/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=498247",
            "date": "2026-03-31T20:06:55",
            "name": "SDM670 LPASS LPI pin controller support",
            "version": 5,
            "mbox": "http://patchwork.ozlabs.org/series/498247/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2218270/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2218270/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "\n <linux-gpio+bounces-34509-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-gpio@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=H/8XDrzE;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34509-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"H/8XDrzE\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.222.177",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4flfPR402hz1yCp\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 01 Apr 2026 07:10:35 +1100 (AEDT)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id DD8A5309401D\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 31 Mar 2026 20:06:43 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 47E0C3CEB88;\n\tTue, 31 Mar 2026 20:06:36 +0000 (UTC)",
            "from mail-qk1-f177.google.com (mail-qk1-f177.google.com\n [209.85.222.177])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id F0E3C3CE4BB\n\tfor <linux-gpio@vger.kernel.org>; Tue, 31 Mar 2026 20:06:32 +0000 (UTC)",
            "by mail-qk1-f177.google.com with SMTP id\n af79cd13be357-8d0288d24f6so49201785a.0\n        for <linux-gpio@vger.kernel.org>;\n Tue, 31 Mar 2026 13:06:32 -0700 (PDT)",
            "from localhost ([199.7.157.124])\n        by smtp.gmail.com with ESMTPSA id\n af79cd13be357-8d0280428d1sm961054385a.25.2026.03.31.13.06.30\n        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n        Tue, 31 Mar 2026 13:06:30 -0700 (PDT)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774987595; cv=none;\n b=hhLnDy4Zk4pMNJp1+jANDpxBbMTz4ONcam/IqVXgYi0F6HdTxULVvgDOQ4BqFnFYgAIGZHggQxnYCcfbUIXQEcmVYyXwaiKfWECaBjF/MpHrgg2hElBBAsT8phWxJ3M6HVCcXo/WheumoK4cXxB+6yQGs+m4cvDWuTlqoIfA3wM=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774987595; c=relaxed/simple;\n\tbh=Jsw2LZX+24ad49I5ppoLXlXypBhq0fgDlxTOnH7YRDM=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=fy9PIj7V6avfwY2NNl+wBhb+pClEikJ6b5lDe/7UDPjY1VufzQe9GD4ovH0llJ4Xq5IsQy+NXaeINfQ/x/WmzbSBCOfSkSmbMZZPRqHWmRF2IyeAF3xyh4XBin/nmUJNILER9/S/cEPN7TR5YASYIJZ5rVgBkGHgpLY72jWNRSA=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=H/8XDrzE; arc=none smtp.client-ip=209.85.222.177",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=gmail.com; s=20251104; t=1774987591; x=1775592391;\n darn=vger.kernel.org;\n        h=content-transfer-encoding:mime-version:references:in-reply-to\n         :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=mvo58vQkpYun2pER1aP/8VK1/EjAtCoPrLClSYN1Vl0=;\n        b=H/8XDrzEjnkTZX0j3TkbF4zrSP79umb61uRp3hLK8f52G+O2gqx1/LJ4UTDWL5Rech\n         Jgz171iUsGK4cojfYMHtJugESICe5/wAdUNwz7NsV6SOjyOdOjtR4JCxLAo87robJu6D\n         7qR2JcUeAVvPCrwM3kvuPWmPwlT9ebMP6EVrmGF04DhMSvJLD5THRc1+7q9tvd07O5b7\n         nh8zim3mugahkJEV1nn6eVs3cBw4zQle3LYlZeIbkP5/Ptpc9arHOdGLlWaCN7OKUoEk\n         I0xn/8D0ATlr4sZnifHluJdq0/MPJvUQVgKqw680VXxKBgyJogGuUQGqPWkggJGGlLUH\n         Vg4g==",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20251104; t=1774987591; x=1775592391;\n        h=content-transfer-encoding:mime-version:references:in-reply-to\n         :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n         :to:cc:subject:date:message-id:reply-to;\n        bh=mvo58vQkpYun2pER1aP/8VK1/EjAtCoPrLClSYN1Vl0=;\n        b=XqAuzwWnHI9wpaGRD4HncNXcZM5M/8Spn6fwxxSPVQ8JcxGHenBRypCP5NyTOAcAww\n         fSqraf73aZTmMEeDjOhU8mzZWZWF4p3Ny6YGkAXsiOCuqSeJY4t8BLy35tFT4ZU5gW1w\n         /86VwTWeI8mGoRV6VVbkYhDOI19Oby+gt1CJM3T0FVj1jPjTPXci6tla0bT8Ftk9FZ02\n         rNoWgGNtnMSSCu8n9ZJkIiFLnZwQdzcqqg8YER4zO5xoZMC60qAEY4jh4bCUzQnekLPg\n         VqZznws9rHATf0v+bEmsHZ46jeYkAhSd6D7zkSiUCaADjozwIBneB2YhVDEaNZpCAiK2\n         j/kg==",
        "X-Forwarded-Encrypted": "i=1;\n AJvYcCUnck8L8b2mT8g7cXA7rIB/4rQv2tc4K7cV2d0FoCimBcOoML6/cwYVYnuWDzz19Fb8bTqvR5QxywEa@vger.kernel.org",
        "X-Gm-Message-State": "AOJu0YxVLltK5KSyEXlQmtExQP2Y84m46GB+jFU1NTcEck7hJCs1sAXT\n\t9APmDI/DK7x0xIc8pIloNbSSKv4pVto8WG8HFdRzA9ljK1tNqnq+YS1l",
        "X-Gm-Gg": "ATEYQzyNnxL0q9Kfy+B/hcUXc3Gup5HPVYhbICgEHZDj7XUXLaSbfo51M/k1CkbuJMu\n\tmAug4bQlyZeiAbnfATzdwxtsTabS1P8vlq2CPM81kNtaNMuq1STm7mICDjuGkPh2V5NCT+/q106\n\tbL5SfYjijdsjoHgyKMXZ0yOQ6cZ+M85C0lTQ9hDwxJ1S0KvGYvds+IwxsXk+sJqZu8xF7uY04Pr\n\tmrckWEaIQ9EuXt0cnt3Eqx56s2p5R23d3Z7DNiVqL70dGgfJQcC92M13r6KRn0L7zJQCug2BaaG\n\tXWXLlwI09rKJv/GbppYylSg7EQ24btM3KEQ3x26B29lL2mIYW+4KE7ByK6gVyeZCVmh9ChwOLoA\n\t7modODV2AerVrD3mCHghlML32Z3VNTbZddLVUGA25SVvVQNBo3QVhIDecprhu4xkHDzTtE4r3fz\n\tSNNbw9CNIq8dAY3GkAQijsGxsid0dHwnP0vlw=",
        "X-Received": "by 2002:a05:620a:28ca:b0:8cf:dbf0:502b with SMTP id\n af79cd13be357-8d1b642e06emr97471985a.31.1774987591205;\n        Tue, 31 Mar 2026 13:06:31 -0700 (PDT)",
        "From": "Richard Acayan <mailingradian@gmail.com>",
        "To": "Bjorn Andersson <andersson@kernel.org>,\n\tLinus Walleij <linusw@kernel.org>,\n\tRob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tKonrad Dybcio <konradybcio@kernel.org>,\n\tSrinivas Kandagatla <srini@kernel.org>,\n\tlinux-arm-msm@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tdevicetree@vger.kernel.org",
        "Cc": "Richard Acayan <mailingradian@gmail.com>",
        "Subject": "[PATCH v5 4/4] arm64: dts: qcom: sdm670: add lpi pinctrl",
        "Date": "Tue, 31 Mar 2026 16:06:58 -0400",
        "Message-ID": "<20260331200658.1306-5-mailingradian@gmail.com>",
        "X-Mailer": "git-send-email 2.53.0",
        "In-Reply-To": "<20260331200658.1306-1-mailingradian@gmail.com>",
        "References": "<20260331200658.1306-1-mailingradian@gmail.com>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-gpio@vger.kernel.org",
        "List-Id": "<linux-gpio.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit"
    },
    "content": "The Snapdragon 670 has a separate TLMM for audio pins. Add the device\nnode for it.\n\nAlso add reserved GPIOs for the Pixel 3a, which blocks access to the\nsensor GPIOs.\n\nSigned-off-by: Richard Acayan <mailingradian@gmail.com>\nReviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>\n---\n .../boot/dts/qcom/sdm670-google-common.dtsi   |  5 ++\n arch/arm64/boot/dts/qcom/sdm670.dtsi          | 73 +++++++++++++++++++\n 2 files changed, 78 insertions(+)",
    "diff": "diff --git a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi b/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi\nindex 0f57b915186b..b4854801a5f5 100644\n--- a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi\n+++ b/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi\n@@ -522,6 +522,11 @@ rmi4_f12: rmi4-f12@12 {\n \t};\n };\n \n+&lpi_tlmm {\n+\t/* sensor gpios are protected */\n+\tgpio-reserved-ranges = <0 8>, <12 6>;\n+};\n+\n &mdss {\n \tstatus = \"okay\";\n };\ndiff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi\nindex 5b41f8bac7bc..2d5728c75a93 100644\n--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi\n+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi\n@@ -2346,6 +2346,79 @@ lmh_cluster0: lmh@17d78800 {\n \t\t\tinterrupt-controller;\n \t\t\t#interrupt-cells = <1>;\n \t\t};\n+\n+\t\tlpi_tlmm: pinctrl@62b40000 {\n+\t\t\tcompatible = \"qcom,sdm670-lpass-lpi-pinctrl\";\n+\t\t\treg = <0 0x62b40000 0 0x20000>;\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\tgpio-ranges = <&lpi_tlmm 0 0 32>;\n+\n+\t\t\tcdc_pdm_default: cdc-pdm-default-state {\n+\t\t\t\tclk-pins {\n+\t\t\t\t\tpins = \"gpio18\";\n+\t\t\t\t\tfunction = \"slimbus_clk\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\n+\t\t\t\tsync-pins {\n+\t\t\t\t\tpins = \"gpio19\";\n+\t\t\t\t\tfunction = \"pdm_sync\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\n+\t\t\t\ttx-pins {\n+\t\t\t\t\tpins = \"gpio20\";\n+\t\t\t\t\tfunction = \"pdm_tx\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t};\n+\n+\t\t\t\trx-pins {\n+\t\t\t\t\tpins = \"gpio21\", \"gpio23\", \"gpio25\";\n+\t\t\t\t\tfunction = \"pdm_rx\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tcdc_comp_default: cdc-comp-default-state {\n+\t\t\t\tpins = \"gpio22\", \"gpio24\";\n+\t\t\t\tfunction = \"comp_rx\";\n+\t\t\t\tdrive-strength = <4>;\n+\t\t\t};\n+\n+\t\t\tcdc_dmic_default: cdc-dmic-default-state {\n+\t\t\t\tclk1-pins {\n+\t\t\t\t\tpins = \"gpio26\";\n+\t\t\t\t\tfunction = \"dmic1_clk\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\toutput-high;\n+\t\t\t\t};\n+\n+\t\t\t\tclk2-pins {\n+\t\t\t\t\tpins = \"gpio28\";\n+\t\t\t\t\tfunction = \"dmic2_clk\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\toutput-high;\n+\t\t\t\t};\n+\n+\t\t\t\tdata1-pins {\n+\t\t\t\t\tpins = \"gpio27\";\n+\t\t\t\t\tfunction = \"dmic1_data\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\tinput-enable;\n+\t\t\t\t};\n+\n+\t\t\t\tdata2-pins {\n+\t\t\t\t\tpins = \"gpio29\";\n+\t\t\t\t\tfunction = \"dmic2_data\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\tinput-enable;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n \t};\n \n \tthermal-zones {\n",
    "prefixes": [
        "v5",
        "4/4"
    ]
}