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GET /api/patches/2218245/?format=api
{ "id": 2218245, "url": "http://patchwork.ozlabs.org/api/patches/2218245/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260331185219.12187-7-deller@kernel.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260331185219.12187-7-deller@kernel.org>", "list_archive_url": null, "date": "2026-03-31T18:52:17", "name": "[PULL,6/8] target/hppa: Fix TOC handler for 64-bit CPUs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5aff104dc03dee99f78eb221339d52934ddaafb0", "submitter": { "id": 87076, "url": "http://patchwork.ozlabs.org/api/people/87076/?format=api", "name": "Helge Deller", "email": "deller@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260331185219.12187-7-deller@kernel.org/mbox/", "series": [ { "id": 498241, "url": "http://patchwork.ozlabs.org/api/series/498241/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498241", "date": "2026-03-31T18:52:18", "name": "[PULL,1/8] hw/pci-host/astro: Make astro address arrays accessible for other users", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498241/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218245/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218245/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=ItZebtgI;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4flchq3qd9z1yGH\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 01 Apr 2026 05:53:47 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w7eCY-0000DG-I6; Tue, 31 Mar 2026 14:52:34 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <deller@kernel.org>) id 1w7eCX-0000D5-3E\n for qemu-devel@nongnu.org; Tue, 31 Mar 2026 14:52:33 -0400", "from sea.source.kernel.org ([172.234.252.31])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <deller@kernel.org>) id 1w7eCV-0001Xt-Q2\n for qemu-devel@nongnu.org; Tue, 31 Mar 2026 14:52:32 -0400", "from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58])\n by sea.source.kernel.org (Postfix) with ESMTP id E496F41529;\n Tue, 31 Mar 2026 18:52:30 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id DD51DC19423;\n Tue, 31 Mar 2026 18:52:29 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n s=k20201202; t=1774983150;\n bh=iI1d5bFylepSOxI2yENVX+NCRKlOf8n+vgOxjT9JKDI=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=ItZebtgIdgDxFKHRwHsgek1DvBvp1y0Ad2PVpgFGA1dHurMMWh2pN1a6rvAszq9jY\n SEH5/+JB+ERV7yd2h8LojwXuFpIyGdy6DKtxbLdqgyq7FTAtDTzBm33qWQgssTa7mJ\n KGooUHe5JugStdZm1vQwVUngEaWIavzs7k0zUzp2NlOthCLDJJveOIsucWBfhTpVAO\n Gp/o9K+uH+1UHbBpGCIWqbuo+IcqsuiBp1x1+F0IAjynVEzyhm2uBLwak9XLCLubOv\n IxNaEBZ672aBQMsbvVaDJvtLQkbWruKpiJe5KV7lqUwevkvVx8n+JbzhCOs1l00+mT\n nzNR3etVGhusQ==", "From": "Helge Deller <deller@kernel.org>", "To": "qemu-devel@nongnu.org", "Cc": "Helge Deller <deller@gmx.de>,\n Richard Henderson <richard.henderson@linaro.org>", "Subject": "[PULL 6/8] target/hppa: Fix TOC handler for 64-bit CPUs", "Date": "Tue, 31 Mar 2026 20:52:17 +0200", "Message-ID": "<20260331185219.12187-7-deller@kernel.org>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260331185219.12187-1-deller@kernel.org>", "References": "<20260331185219.12187-1-deller@kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=172.234.252.31; envelope-from=deller@kernel.org;\n helo=sea.source.kernel.org", "X-Spam_score_int": "-5", "X-Spam_score": "-0.6", "X-Spam_bar": "/", "X-Spam_report": "(-0.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1, RCVD_IN_VALIDITY_RPBL_BLOCKED=1,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Helge Deller <deller@gmx.de>\n\nWhen the TOC handler is triggered, e.g. by using the \"NMI\" command\nin the QEMU monitor, make sure to call the full 64-bit TOC handler\naddress in SeaBIOS-hppa firmware.\nThis fixes the TOC handler on 64-bit CPUs (and 64-bit SeaBIOS).\n\nSigned-off-by: Helge Deller <deller@gmx.de>\n---\n target/hppa/int_helper.c | 7 ++++++-\n 1 file changed, 6 insertions(+), 1 deletion(-)", "diff": "diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c\nindex d5a20cd549..3e87b9a001 100644\n--- a/target/hppa/int_helper.c\n+++ b/target/hppa/int_helper.c\n@@ -203,7 +203,12 @@ void hppa_cpu_do_interrupt(CPUState *cs)\n \n /* step 7 */\n if (i == EXCP_TOC) {\n- env->iaoq_f = hppa_form_gva(env, 0, FIRMWARE_START);\n+ hwaddr pdc_toc_addr = FIRMWARE_START;\n+\n+ /* for 64-bit include the high bits of PDC */\n+ pdc_toc_addr |= ((uint64_t) FIRMWARE_HIGH) << 32;\n+ env->iaoq_f = hppa_form_gva(env, 0, pdc_toc_addr);\n+\n /* help SeaBIOS and provide iaoq_b and iasq_back in shadow regs */\n env->gr[24] = env->cr_back[0];\n env->gr[25] = env->cr_back[1];\n", "prefixes": [ "PULL", "6/8" ] }