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GET /api/patches/2218107/?format=api
{ "id": 2218107, "url": "http://patchwork.ozlabs.org/api/patches/2218107/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260331114742.2896317-4-mukesh.savaliya@oss.qualcomm.com/", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260331114742.2896317-4-mukesh.savaliya@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-03-31T11:47:41", "name": "[v6,3/4] soc: qcom: geni-se: Keep pinctrl active for multi-owner controllers", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "87aa898fdc8015857e7b75a65be72d8bf1e00884", "submitter": { "id": 91179, "url": "http://patchwork.ozlabs.org/api/people/91179/?format=api", "name": "Mukesh Kumar Savaliya", "email": "mukesh.savaliya@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260331114742.2896317-4-mukesh.savaliya@oss.qualcomm.com/mbox/", "series": [ { "id": 498183, "url": "http://patchwork.ozlabs.org/api/series/498183/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=498183", "date": "2026-03-31T11:47:38", "name": "Enable multi-owner I2C support for QCOM GENI controllers", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498183/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218107/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218107/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-i2c+bounces-16896-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", 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b=egId9djYJVL9rooq8JKFmoG7C+d\n\tD5uNEVBbGMbS87Cyum0FP3egYhyHbxgN6n57q0PyfiXJefEt8EyxOM44YdiKjHmM\n\t163qY7gysysEfsC7ahSwqhV+trLY+v2/H1lQNM66nDsj3NpMOYL+SIeTZ7o8gIHL\n\t0VWXrE6rdKLQYtBvn/YI4yMMtik1mB36xErmMNHZrIuwR8EoW3N6bAsL+Qd+h2J4\n\tgps8v+TchD5Dr8aftZr8S48O4LXU9YKbp4enw1lpGzojStOxkAzThWRe95MeBRaL\n\t1enGYqfoMxFj82W/O78MuaH90+mmCDoO7GyTUQxK9X6gQm5161BVGcCfvcQ==", "From": "Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>", "To": "viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, robh@kernel.org,\n krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org,\n Frank.Li@kernel.org, andersson@kernel.org, konradybcio@kernel.org,\n dmitry.baryshkov@oss.qualcomm.com, linmq006@gmail.com,\n quic_jseerapu@quicinc.com, agross@kernel.org,\n linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n dmaengine@vger.kernel.org", "Cc": "krzysztof.kozlowski@oss.qualcomm.com,\n bartosz.golaszewski@oss.qualcomm.com,\n bjorn.andersson@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com,\n Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>", "Subject": "[PATCH v6 3/4] soc: qcom: geni-se: Keep pinctrl active for\n multi-owner controllers", "Date": "Tue, 31 Mar 2026 17:17:41 +0530", "Message-Id": "<20260331114742.2896317-4-mukesh.savaliya@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com>", "References": "<20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com>", "Precedence": "bulk", "X-Mailing-List": "linux-i2c@vger.kernel.org", "List-Id": "<linux-i2c.vger.kernel.org>", "List-Subscribe": "<mailto:linux-i2c+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-i2c+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-QCInternal": [ "smtphost", "smtphost" ], "X-Authority-Analysis": "v=2.4 cv=INwPywvG c=1 sm=1 tr=0 ts=69cbb48e cx=c_pps\n a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22\n a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=AU6ItHRBSQEJJjuWNb0A:9", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMzMxMDExNCBTYWx0ZWRfX2MUnKFwp3h2K\n ioOSvONYa3VhgpT8hkmiPRdGUkVeS4IuKJhHZIbR67vZOuHsk8ZQ6GqCMi2AfC2ORi6JuHXCWzC\n wt+ekvdzP3YzN0GXTGeoPgtIbOFlR8lmMzW8GB6GERI7vmco1ts+wPlU8E8wDit0RCynI2K2unP\n Py1IxN0Rm8wFfuRmjR5lYic0p5FpYeJMbggxIMbCbwr3p8R6g2Z2TJrKauRlsgnWg3PyjX3qyre\n G6ldJ/ngJglDgbKuA/qRJIX7G5PUWcPlzL5CE/Sp4+XdjRlGTQujmRkj2TyEmpb3FSLk+R3Rj1W\n +SaVKG5KWAZsfwdaG4PpHmxunVgX3yU36oT/ntrPGLNaH8nlTbDuW5GRSWVfgtKJ7tdNEcffwVP\n AZNyv+BoNSc0TblMqci0rA2rVyAJnRv9FZ7VPqSDN5McUEFim1gmzFbRNDajo+dUw8ErXlGT5oy\n xBbDcFdiuHaY/UX5wiQ==", "X-Proofpoint-GUID": "7I1ywzjntiRF6E20hKN866Nyo8r-C712", "X-Proofpoint-ORIG-GUID": "7I1ywzjntiRF6E20hKN866Nyo8r-C712", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-03-31_02,2026-03-31_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n suspectscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0\n impostorscore=0 adultscore=0 phishscore=0 priorityscore=1501 spamscore=0\n bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound\n adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001\n definitions=main-2603310114" }, "content": "On platforms where a GENI Serial Engine is shared with another system\nprocessor, selecting the \"sleep\" pinctrl state can disrupt ongoing\ntransfers initiated by the other processor.\n\nTeach geni_se_resources_off() to skip selecting the pinctrl sleep state\nwhen the Serial Engine is marked as shared, while still allowing the\nrest of the resource shutdown sequence to proceed.\n\nThis is required for multi-owner configurations (described via DeviceTree\nwith qcom,qup-multi-owner on the protocol controller node).\n\nSigned-off-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>\n---\n drivers/soc/qcom/qcom-geni-se.c | 15 +++++++++++----\n include/linux/soc/qcom/geni-se.h | 2 ++\n 2 files changed, 13 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c\nindex cd1779b6a91a..1a60832ace16 100644\n--- a/drivers/soc/qcom/qcom-geni-se.c\n+++ b/drivers/soc/qcom/qcom-geni-se.c\n@@ -597,10 +597,17 @@ int geni_se_resources_off(struct geni_se *se)\n \n \tif (has_acpi_companion(se->dev))\n \t\treturn 0;\n-\n-\tret = pinctrl_pm_select_sleep_state(se->dev);\n-\tif (ret)\n-\t\treturn ret;\n+\t/*\n+\t * Select the \"sleep\" pinctrl state only when the serial engine is\n+\t * exclusively owned by this system processor. For shared controller\n+\t * configurations, another system processor may still be using the pins,\n+\t * and switching them to \"sleep\" can disrupt ongoing transfers.\n+\t */\n+\tif (!se->multi_owner) {\n+\t\tret = pinctrl_pm_select_sleep_state(se->dev);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n \n \tgeni_se_clks_off(se);\n \treturn 0;\ndiff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h\nindex 0a984e2579fe..326744e311ce 100644\n--- a/include/linux/soc/qcom/geni-se.h\n+++ b/include/linux/soc/qcom/geni-se.h\n@@ -63,6 +63,7 @@ struct geni_icc_path {\n * @num_clk_levels:\tNumber of valid clock levels in clk_perf_tbl\n * @clk_perf_tbl:\tTable of clock frequency input to serial engine clock\n * @icc_paths:\t\tArray of ICC paths for SE\n+ * @multi_owner:\tTrue if SE is shared between multiprocessors.\n */\n struct geni_se {\n \tvoid __iomem *base;\n@@ -72,6 +73,7 @@ struct geni_se {\n \tunsigned int num_clk_levels;\n \tunsigned long *clk_perf_tbl;\n \tstruct geni_icc_path icc_paths[3];\n+\tbool multi_owner;\n };\n \n /* Common SE registers */\n", "prefixes": [ "v6", "3/4" ] }