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GET /api/patches/2218085/?format=api
{ "id": 2218085, "url": "http://patchwork.ozlabs.org/api/patches/2218085/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260331113025.1566878-3-wei.fang@nxp.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20260331113025.1566878-3-wei.fang@nxp.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20260331113025.1566878-3-wei.fang@nxp.com/", "date": "2026-03-31T11:30:13", "name": "[v4,net-next,02/14] dt-bindings: net: dsa: add NETC switch", "commit_ref": null, "pull_url": null, "state": "handled-elsewhere", "archived": false, "hash": "073a83a8d86c3b82c6c3eea46d5dc31d8d2c4718", "submitter": { "id": 84380, "url": "http://patchwork.ozlabs.org/api/people/84380/?format=api", "name": "Wei Fang", "email": "wei.fang@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260331113025.1566878-3-wei.fang@nxp.com/mbox/", "series": [ { "id": 498181, "url": "http://patchwork.ozlabs.org/api/series/498181/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=498181", "date": "2026-03-31T11:30:11", "name": "Add preliminary NETC switch support for i.MX94", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/498181/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218085/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218085/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linuxppc-dev+bounces-19067-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n header.s=selector1 header.b=UghncXF/;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; helo=lists.ozlabs.org;\n envelope-from=linuxppc-dev+bounces-19067-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)", "lists.ozlabs.org;\n arc=pass smtp.remote-ip=\"2a01:111:f403:c201::3\" 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envelope-from=wei.fang@nxp.com;\n receiver=lists.ozlabs.org) smtp.mailfrom=nxp.com", "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass\n header.d=nxp.com; arc=none" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=wObqie/YDWtvO5YnynND+nUbxUgSABloC8mbIsWMtlU=;\n b=UghncXF/7efn3jf5Xt92lmc3cF3c2eEplxh4D+dLp7siYjLfOUujz16EJKFeVnp3xwdgueKzFSBlgb95vdCgszYlun3rWY5c+xiW201wdoT9lXFnH945X1Blq8VRWa+tTzCsqY+pzEvPDGatAPM/MovbmIFGOdXxp0OvaGVaPSfFSp5HTPv74UsQLqPCvcDy9cwAEkCPWku1uNVoGPPc4nm+9YWClhDQvyTr+auNQDbbd55/L4GFxhscNttySQ98BmujWCiZOaF7YrhnJSnA0vyWHPYDBETWUlDGg2Fag4dDTV8hG8R8CMTHAy5fejPnfdd6hceAR+m8ibi7qzV7TQ==", "From": "Wei Fang <wei.fang@nxp.com>", "To": "claudiu.manoil@nxp.com,\n\tvladimir.oltean@nxp.com,\n\txiaoning.wang@nxp.com,\n\tandrew+netdev@lunn.ch,\n\tdavem@davemloft.net,\n\tedumazet@google.com,\n\tkuba@kernel.org,\n\tpabeni@redhat.com,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tf.fainelli@gmail.com,\n\tfrank.li@nxp.com,\n\tchleroy@kernel.org,\n\thorms@kernel.org,\n\tlinux@armlinux.org.uk,\n\tandrew@lunn.ch", "Cc": "netdev@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinuxppc-dev@lists.ozlabs.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\timx@lists.linux.dev", "Subject": "[PATCH v4 net-next 02/14] dt-bindings: net: dsa: add NETC switch", "Date": "Tue, 31 Mar 2026 19:30:13 +0800", "Message-Id": "<20260331113025.1566878-3-wei.fang@nxp.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260331113025.1566878-1-wei.fang@nxp.com>", "References": "<20260331113025.1566878-1-wei.fang@nxp.com>", "Content-Transfer-Encoding": "8bit", "Content-Type": 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(2024-03-25) on lists.ozlabs.org" }, "content": "Add bindings for NETC switch. This switch is a PCIe function of NETC IP,\nit supports advanced QoS with 8 traffic classes and 4 drop resilience\nlevels, and a full range of TSN standards capabilities. The switch CPU\nport connects to an internal ENETC port, which is also a PCIe function\nof NETC IP. So these two ports use a light-weight \"pseudo MAC\" instead\nof a back-to-back MAC, because the \"pseudo MAC\" provides the delineation\nbetween switch and ENETC, this translates to lower power (less logic and\nmemory) and lower delay (as there is no serialization delay across this\nlink).\n\nSigned-off-by: Wei Fang <wei.fang@nxp.com>\nReviewed-by: Frank Li <Frank.Li@nxp.com>\n---\n .../bindings/net/dsa/nxp,netc-switch.yaml | 130 ++++++++++++++++++\n 1 file changed, 130 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml", "diff": "diff --git a/Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml b/Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml\nnew file mode 100644\nindex 000000000000..5577f3ef987f\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml\n@@ -0,0 +1,130 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/net/dsa/nxp,netc-switch.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: NETC Switch family\n+\n+description: >\n+ The NETC presents itself as a multi-function PCIe Root Complex Integrated\n+ Endpoint (RCiEP) and provides full 802.1Q Ethernet switch functionality,\n+ advanced QoS with 8 traffic classes and 4 drop resilience levels, and a\n+ full range of TSN standards capabilities.\n+\n+ The CPU port of the switch connects to an internal ENETC. The switch and\n+ the internal ENETC are fully integrated into the NETC IP, a back-to-back\n+ MAC is not required. Instead, a light-weight \"pseudo MAC\" provides the\n+ delineation between the switch and ENETC. This translates to lower power\n+ (less logic and memory) and lower delay (as there is no serialization\n+ delay across this link).\n+\n+maintainers:\n+ - Wei Fang <wei.fang@nxp.com>\n+\n+properties:\n+ compatible:\n+ enum:\n+ - pci1131,eef2\n+\n+ reg:\n+ maxItems: 1\n+\n+ dsa,member:\n+ description: >\n+ The property indicates DSA cluster and switch index. For NETC switch,\n+ the valid range of the switch index is 1 ~ 7, the index is reflected\n+ in the switch tag as an indication of the switch ID where the frame\n+ originated. The value 0 is reserved for ENETC VEPA switch, whose ID\n+ is hardwired to zero.\n+\n+$ref: dsa.yaml#\n+\n+patternProperties:\n+ \"^(ethernet-)?ports$\":\n+ type: object\n+ additionalProperties: true\n+ patternProperties:\n+ \"^(ethernet-)?port@[0-9a-f]$\":\n+ type: object\n+\n+ $ref: dsa-port.yaml#\n+\n+ properties:\n+ clocks:\n+ items:\n+ - description: MAC transmit/receive reference clock.\n+\n+ clock-names:\n+ items:\n+ - const: ref\n+\n+ mdio:\n+ $ref: /schemas/net/mdio.yaml#\n+ unevaluatedProperties: false\n+ description:\n+ Optional child node for switch port, otherwise use NETC EMDIO.\n+\n+ unevaluatedProperties: false\n+\n+required:\n+ - compatible\n+ - reg\n+ - dsa,member\n+\n+allOf:\n+ - $ref: /schemas/pci/pci-device.yaml\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ pcie {\n+ #address-cells = <3>;\n+ #size-cells = <2>;\n+\n+ ethernet-switch@0,2 {\n+ compatible = \"pci1131,eef2\";\n+ reg = <0x200 0 0 0 0>;\n+ dsa,member = <0 1>;\n+ pinctrl-names = \"default\";\n+ pinctrl-0 = <&pinctrl_switch>;\n+\n+ ports {\n+ #address-cells = <1>;\n+ #size-cells = <0>;\n+\n+ port@0 {\n+ reg = <0>;\n+ phy-handle = <ðphy0>;\n+ phy-mode = \"mii\";\n+ };\n+\n+ port@1 {\n+ reg = <1>;\n+ phy-handle = <ðphy1>;\n+ phy-mode = \"mii\";\n+ };\n+\n+ port@2 {\n+ reg = <2>;\n+ clocks = <&scmi_clk 103>;\n+ clock-names = \"ref\";\n+ phy-handle = <ðphy2>;\n+ phy-mode = \"rgmii-id\";\n+ };\n+\n+ port@3 {\n+ reg = <3>;\n+ ethernet = <&enetc3>;\n+ phy-mode = \"internal\";\n+\n+ fixed-link {\n+ speed = <2500>;\n+ full-duplex;\n+ pause;\n+ };\n+ };\n+ };\n+ };\n+ };\n", "prefixes": [ "v4", "net-next", "02/14" ] }