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GET /api/patches/2218064/?format=api
{ "id": 2218064, "url": "http://patchwork.ozlabs.org/api/patches/2218064/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260331102303.33181-8-akhilrajeev@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260331102303.33181-8-akhilrajeev@nvidia.com>", "list_archive_url": null, "date": "2026-03-31T10:23:00", "name": "[v6,07/10] dmaengine: tegra: Use managed DMA controller registration", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "30a688feb458a9f4b52761b7bff0e88e97ef08a4", "submitter": { "id": 81965, "url": "http://patchwork.ozlabs.org/api/people/81965/?format=api", "name": "Akhil R", "email": "akhilrajeev@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260331102303.33181-8-akhilrajeev@nvidia.com/mbox/", "series": [ { "id": 498169, "url": "http://patchwork.ozlabs.org/api/series/498169/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=498169", "date": "2026-03-31T10:22:54", "name": "Add GPCDMA support in Tegra264", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498169/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2218064/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2218064/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-tegra+bounces-13478-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=KjXhkZJO;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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pr=C", "From": "Akhil R <akhilrajeev@nvidia.com>", "To": "Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>, Rob Herring\n\t<robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley\n\t<conor+dt@kernel.org>, Thierry Reding <thierry.reding@gmail.com>, \"Jonathan\n Hunter\" <jonathanh@nvidia.com>, Laxman Dewangan <ldewangan@nvidia.com>,\n\tPhilipp Zabel <p.zabel@pengutronix.de>, <dmaengine@vger.kernel.org>,\n\t<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>", "CC": "Akhil R <akhilrajeev@nvidia.com>, Frank Li <frank.li@nxp.com>", "Subject": "[PATCH v6 07/10] dmaengine: tegra: Use managed DMA controller\n registration", "Date": "Tue, 31 Mar 2026 15:53:00 +0530", "Message-ID": "<20260331102303.33181-8-akhilrajeev@nvidia.com>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260331102303.33181-1-akhilrajeev@nvidia.com>", "References": "<20260331102303.33181-1-akhilrajeev@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-NVConfidentiality": "public", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL6PEPF0001AB75:EE_|CH3PR12MB9220:EE_", "X-MS-Office365-Filtering-Correlation-Id": "3ab5a669-c60f-4c30-0bde-08de8f0fbec8", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|36860700016|376014|7416014|1800799024|82310400026|56012099003|18002099003|22082099003|921020;", "X-Microsoft-Antispam-Message-Info": "\n\tPIJJYZpzUD75YynEwB+E51LTAevFtQ9kFPy4ypeYAzvXNMj2aNmeTaZDoweP3/CeDCjyGtqBTecRBkdX+kAtn3xWfNICc3cfJJwA5DUPcVdHG4fnwo9Z+YmVaDwCiLme7lzwq2eCXcnsPU27xUG6wCeq5nFbkBJqsB4SkLiEKYEk2eI/Z5eyXx4LkqT4lMHz4fVSQdNh2lABC4aZoxEzV/+iYPt69foTOXhWX23tPp4iqSZuZEkFERodT1i5gWvNqO6dvVM560xyK3RB+G4a8vF503O5VoBBvaf7tbzMHpfoG+NTgwZWtghxMpfIRW33Bhmzs9WxO0JqzA4yz7BNRAa2v+F4BoQ7tq4kCFQoc7Hxa4bGIaRp7aauYMwV0KxuWrEGoXuuR1C4WxtN/toujHvOLi5j7W5DkaYyXesyLbCauoWxie/v0vBPrfOJxC8oR+yofz8ZPVCW3JfxrobBj9OeHTgRM+YcPu0hxoTY76WnOuA605ZIGIKLVGX3wxDqE7jaJOSbRoWFFWwSYWm/VW3n9x2LgZdzCmjTEufCoBQHmhgNXJvUfxfPN9wRGGeG+1h/5RV2r2slvnTboKm0rp19r0ZZRjCYmqOQB8egC8xhPX1TTt6vSGfuMugN1AKQ6rlGHOM5cKSilPdsW72U2dku+x+8pJtN+o9oqWwpD7GQFxnL1fZUHjuO6Yvb53AzqDXaEw4m3EUBEzbcHNyRiSNDP5GkI7hu8v2e8j6I5ywOGaWzHnulKon2+3w/l1FnnnUt14GO9P9gjmIWBBxGGPnHo5cv/aPwc/dEMDA+WPWKI9v9UKXYB5SzAIn3XDDo", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(376014)(7416014)(1800799024)(82310400026)(56012099003)(18002099003)(22082099003)(921020);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tJtjNktPlyvUtD0RapRQQ3Ah3+7LxTJdk4jeuGgmelt3cbc4Dbv2MmiypIgGdLAloDlidFMcwAWbs+Pxt37TJIP6fl5s9hEMurj8DNaF3ATDxBLbdSzcdY+x2saocU2r1vF82H0fHK+eWsYCgusR6qopq2vOdupqrqbC4lWXQ9WaQvGEVuV0linqWtyC8mNlalbK5dc9X0ENXGqlfCt2UX+s43eXNMj6i9EkEo421vkjoXeehkfjxAGmkDWORFEXulA8oL2NRPokTw/r4k67aBXopDLfA+YrtphRNmET/spQaH9G22DEJMOcy8mP44sjZiwMspH3TP9yBFiaX5Qmv9Ety5unPrCh7JCSopyR41wvaq2L87P5RixKRSUpJIhTnd5+YIgGdK50sMqbitLb2QQY0YDWMuRrFwAQIItxCnL60zeZ6HUcJc+JSeWZAdQCC", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "31 Mar 2026 10:24:51.9218\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 3ab5a669-c60f-4c30-0bde-08de8f0fbec8", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tBL6PEPF0001AB75.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH3PR12MB9220" }, "content": "Switch to managed registration in probe. This simplifies the error\npaths in the probe and also removes the requirement of the driver\nremove function.\n\nSigned-off-by: Akhil R <akhilrajeev@nvidia.com>\nSuggested-by: Frank Li <frank.li@nxp.com>\n---\n drivers/dma/tegra186-gpc-dma.c | 19 ++++---------------\n 1 file changed, 4 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c\nindex 3ac43ad19ed6..9bea2ffb3b9e 100644\n--- a/drivers/dma/tegra186-gpc-dma.c\n+++ b/drivers/dma/tegra186-gpc-dma.c\n@@ -1483,37 +1483,27 @@ static int tegra_dma_probe(struct platform_device *pdev)\n \ttdma->dma_dev.device_synchronize = tegra_dma_chan_synchronize;\n \ttdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;\n \n-\tret = dma_async_device_register(&tdma->dma_dev);\n+\tret = dmaenginem_async_device_register(&tdma->dma_dev);\n \tif (ret < 0) {\n \t\tdev_err_probe(&pdev->dev, ret,\n \t\t\t \"GPC DMA driver registration failed\\n\");\n \t\treturn ret;\n \t}\n \n-\tret = of_dma_controller_register(pdev->dev.of_node,\n-\t\t\t\t\t tegra_dma_of_xlate, tdma);\n+\tret = devm_of_dma_controller_register(&pdev->dev, pdev->dev.of_node,\n+\t\t\t\t\t tegra_dma_of_xlate, tdma);\n \tif (ret < 0) {\n \t\tdev_err_probe(&pdev->dev, ret,\n \t\t\t \"GPC DMA OF registration failed\\n\");\n-\n-\t\tdma_async_device_unregister(&tdma->dma_dev);\n \t\treturn ret;\n \t}\n \n-\tdev_info(&pdev->dev, \"GPC DMA driver register %lu channels\\n\",\n+\tdev_info(&pdev->dev, \"GPC DMA driver registered %lu channels\\n\",\n \t\t hweight_long(tdma->chan_mask));\n \n \treturn 0;\n }\n \n-static void tegra_dma_remove(struct platform_device *pdev)\n-{\n-\tstruct tegra_dma *tdma = platform_get_drvdata(pdev);\n-\n-\tof_dma_controller_free(pdev->dev.of_node);\n-\tdma_async_device_unregister(&tdma->dma_dev);\n-}\n-\n static int __maybe_unused tegra_dma_pm_suspend(struct device *dev)\n {\n \tstruct tegra_dma *tdma = dev_get_drvdata(dev);\n@@ -1564,7 +1554,6 @@ static struct platform_driver tegra_dma_driver = {\n \t\t.of_match_table = tegra_dma_of_match,\n \t},\n \t.probe\t\t= tegra_dma_probe,\n-\t.remove\t\t= tegra_dma_remove,\n };\n \n module_platform_driver(tegra_dma_driver);\n", "prefixes": [ "v6", "07/10" ] }