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GET /api/patches/2217957/?format=api
HTTP 200 OK
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{
    "id": 2217957,
    "url": "http://patchwork.ozlabs.org/api/patches/2217957/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260331055858.305207-4-dave.patel@riscstar.com/",
    "project": {
        "id": 67,
        "url": "http://patchwork.ozlabs.org/api/projects/67/?format=api",
        "name": "OpenSBI development",
        "link_name": "opensbi",
        "list_id": "opensbi.lists.infradead.org",
        "list_email": "opensbi@lists.infradead.org",
        "web_url": "https://github.com/riscv/opensbi",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": "https://github.com/riscv/opensbi/commit/{}"
    },
    "msgid": "<20260331055858.305207-4-dave.patel@riscstar.com>",
    "list_archive_url": null,
    "date": "2026-03-31T05:58:57",
    "name": "[v3,3/3] lib: sbi: domain FP/Vector context support for context switch",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "9fc9f9014894b8d6623be6318166f2ac87784c8a",
    "submitter": {
        "id": 92617,
        "url": "http://patchwork.ozlabs.org/api/people/92617/?format=api",
        "name": "Dave Patel",
        "email": "dave.patel@riscstar.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260331055858.305207-4-dave.patel@riscstar.com/mbox/",
    "series": [
        {
            "id": 498123,
            "url": "http://patchwork.ozlabs.org/api/series/498123/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=498123",
            "date": "2026-03-31T05:58:55",
            "name": "Add eager FP and RISC-V vector context switching support",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/498123/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2217957/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2217957/checks/",
    "tags": {},
    "related": [],
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        "From": "dave.patel@riscstar.com",
        "To": "Samuel Holland <samuel.holland@sifive.com>",
        "Cc": "Scott Bambrough <scott@riscstar.com>,\n\tRobin Randhawa <robin.randhawa@sifive.com>,\n\tAnup Patel <anup.patel@qti.qualcomm.com>,\n\tDave Patel <dave.patel@riscstar.com>,\n\tRay Mao <raymond.mao@riscstar.com>,\n\tAnup Patel <anuppate@qti.qualcomm.com>,\n\tDhaval <dhaval@rivosinc.com>,\n\tPeter Lin <peter.lin@sifive.com>,\n\topensbi@lists.infradead.org",
        "Subject": "[PATCH v3 3/3] lib: sbi: domain FP/Vector context support for context\n switch",
        "Date": "Tue, 31 Mar 2026 06:58:57 +0100",
        "Message-ID": "<20260331055858.305207-4-dave.patel@riscstar.com>",
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        "References": "<20260331055858.305207-1-dave.patel@riscstar.com>",
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        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20260330_225906_255137_C55B3ADC ",
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    },
    "content": "From: Dave Patel <dave.patel@riscstar.com>\n\nThis patch adds proper support for per-domain floating-point (FP) and\nvector (V) contexts in the domain context switch logic. Each domain\nnow maintains its own FP and vector state, which is saved and restored\nduring domain switches.\n\nChanges include:\n\n- Added `fp_ctx` and `vec_ctx` members to `struct sbi_domain`.\n- Introduced `sbi_vector_domain_init` for vlen check\n  to allocate and free per-domain FP and vector context.\n- Modified `sbi_domain_register()` to initialize FP/Vector context per domain.\n- Updated `switch_to_next_domain_context()` to save/restore FP and vector\n  contexts safely:\n    - Ensures FS/VS fields in `mstatus` are enabled (set to Initial) only if Off.\n    - Restores original FS/VS bits after context switch.\n    - Adds NULL checks to handle domains without FP or Vector extensions.\n- Updated domain context deinit to free FP and vector contexts per domain.\n- Added runtime checks for FP and vector extensions where needed.\n- Corrected handling of MSTATUS FS/VS bits to avoid unsafe full-bit writes.\n\nThis improves support for multi-domain systems with FP and Vector\nextensions, and prevents corruption of FP/Vector state during domain\nswitches.\n\nSigned-off-by: Dave Patel <dave.patel@riscstar.com>\n---\n include/sbi/sbi_domain.h     |  6 +++++\n include/sbi/sbi_fp.h         | 13 +----------\n include/sbi/sbi_vector.h     |  4 ++++\n lib/sbi/sbi_domain.c         |  6 +++++\n lib/sbi/sbi_domain_context.c | 12 ++++++++++\n lib/sbi/sbi_fp.c             |  6 +++++\n lib/sbi/sbi_vector.c         | 43 ++++++++++++++++++++++++++----------\n 7 files changed, 66 insertions(+), 24 deletions(-)\n\n--\n2.43.0",
    "diff": "diff --git a/include/sbi/sbi_domain.h b/include/sbi/sbi_domain.h\nindex 882b62c2..318d3a9a 100644\n--- a/include/sbi/sbi_domain.h\n+++ b/include/sbi/sbi_domain.h\n@@ -16,6 +16,8 @@\n #include <sbi/sbi_hartmask.h>\n #include <sbi/sbi_domain_context.h>\n #include <sbi/sbi_domain_data.h>\n+#include <sbi/sbi_vector.h>\n+#include <sbi/sbi_fp.h>\n\n struct sbi_scratch;\n\n@@ -217,6 +219,10 @@ struct sbi_domain {\n \tbool fw_region_inited;\n \t/** per-domain wired-IRQ courier state */\n \tvoid *virq_priv;\n+\t/** per-domain float context state */\n+\tstruct sbi_fp_context fp_ctx;\n+\t/** per-domain vector context state */\n+\tstruct sbi_vector_context vec_ctx;\n };\n\n /** The root domain instance */\ndiff --git a/include/sbi/sbi_fp.h b/include/sbi/sbi_fp.h\nindex 8079bb3b..962150a3 100644\n--- a/include/sbi/sbi_fp.h\n+++ b/include/sbi/sbi_fp.h\n@@ -8,13 +8,8 @@\n #ifndef __SBI_FP_H__\n #define __SBI_FP_H__\n\n-#include <sbi/riscv_encoding.h>\n #include <sbi/sbi_types.h>\n\n-#if defined(__riscv_f) || defined(__riscv_d)\n-\n-#include <stdint.h>\n-\n struct sbi_fp_context {\n #if __riscv_d\n \tuint64_t f[32];\n@@ -22,13 +17,7 @@ struct sbi_fp_context {\n \tuint32_t f[32];\n #endif\n \tuint32_t fcsr;\n-} __aligned(16);\n-\n-#else /* No FP (e.g., Zve32x) */\n-\n-struct sbi_fp_context { };\n-\n-#endif //defined(__riscv_f) || defined(__riscv_d)\n+};\n\n void sbi_fp_save(struct sbi_fp_context *dst);\n void sbi_fp_restore(const struct sbi_fp_context *src);\ndiff --git a/include/sbi/sbi_vector.h b/include/sbi/sbi_vector.h\nindex 4ecfaa0b..9ae76b00 100644\n--- a/include/sbi/sbi_vector.h\n+++ b/include/sbi/sbi_vector.h\n@@ -10,6 +10,9 @@\n #define __SBI_VECTOR_H__\n\n #include <sbi/sbi_types.h>\n+#include <sbi/sbi_domain.h>\n+#include <sbi/sbi_error.h>\n+#include <sbi/sbi_console.h>\n\n #define SBI_MAX_VLENB CONFIG_SBI_MAX_VLENB\n\n@@ -25,6 +28,7 @@ struct sbi_vector_context {\n\n void sbi_vector_save(struct sbi_vector_context *dst);\n void sbi_vector_restore(const struct sbi_vector_context *src);\n+int sbi_vector_domain_init(void);\n\n #endif //__SBI_VECTOR_H__\n\ndiff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c\nindex 498a1d56..424204eb 100644\n--- a/lib/sbi/sbi_domain.c\n+++ b/lib/sbi/sbi_domain.c\n@@ -19,6 +19,8 @@\n #include <sbi/sbi_scratch.h>\n #include <sbi/sbi_string.h>\n #include <sbi/sbi_virq.h>\n+#include <sbi/sbi_vector.h>\n+#include <sbi/sbi_fp.h>\n\n SBI_LIST_HEAD(domain_list);\n\n@@ -1007,6 +1009,10 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)\n \tif (rc)\n \t\tgoto fail_free_root_hmask;\n\n+\trc = sbi_vector_domain_init();\n+\tif (rc)\n+\t\tgoto fail_free_root_hmask;\n+\n \treturn 0;\n\n fail_free_root_hmask:\ndiff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c\nindex 158f4990..f646c7d4 100644\n--- a/lib/sbi/sbi_domain_context.c\n+++ b/lib/sbi/sbi_domain_context.c\n@@ -18,6 +18,9 @@\n #include <sbi/sbi_domain_context.h>\n #include <sbi/sbi_platform.h>\n #include <sbi/sbi_trap.h>\n+#include <sbi/sbi_vector.h>\n+#include <sbi/sbi_fp.h>\n+\n\n /** Context representation for a hart within a domain */\n struct hart_context {\n@@ -143,6 +146,15 @@ static int switch_to_next_domain_context(struct hart_context *ctx,\n \tif (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSQOSID))\n \t\tctx->srmcfg\t= csr_swap(CSR_SRMCFG, dom_ctx->srmcfg);\n\n+\t/* Make sure FS and VS is on before context switch */\n+\tcsr_set(CSR_MSTATUS, MSTATUS_FS | MSTATUS_VS);\n+\n+\t/* Eager context switch F and V */\n+\tsbi_fp_save(&current_dom->fp_ctx);\n+\tsbi_fp_restore(&target_dom->fp_ctx);\n+\tsbi_vector_save(&current_dom->vec_ctx);\n+\tsbi_vector_restore(&target_dom->vec_ctx);\n+\n \t/* Save current trap state and restore target domain's trap state */\n \ttrap_ctx = sbi_trap_get_context(scratch);\n \tsbi_memcpy(&ctx->trap_ctx, trap_ctx, sizeof(*trap_ctx));\ndiff --git a/lib/sbi/sbi_fp.c b/lib/sbi/sbi_fp.c\nindex 5d72b72e..9772d359 100644\n--- a/lib/sbi/sbi_fp.c\n+++ b/lib/sbi/sbi_fp.c\n@@ -7,8 +7,11 @@\n  */\n\n #include <sbi/riscv_asm.h>\n+#include <sbi/sbi_heap.h>\n #include <sbi/riscv_encoding.h>\n #include <sbi/sbi_fp.h>\n+#include <sbi/sbi_error.h>\n+#include <sbi/sbi_console.h>\n\n #if defined(__riscv_f) || defined(__riscv_d)\n\n@@ -185,7 +188,10 @@ void sbi_fp_restore(const struct sbi_fp_context *src)\n\n \tcsr_write(CSR_FCSR, src->fcsr);\n }\n+\n #else\n+\n void sbi_fp_save(struct sbi_fp_context *dst) {}\n void sbi_fp_restore(const struct sbi_fp_context *src) {}\n+\n #endif // FP present\ndiff --git a/lib/sbi/sbi_vector.c b/lib/sbi/sbi_vector.c\nindex 5a3f34d7..5877c373 100644\n--- a/lib/sbi/sbi_vector.c\n+++ b/lib/sbi/sbi_vector.c\n@@ -12,21 +12,23 @@\n #include <sbi/sbi_vector.h>\n #include <sbi/sbi_types.h>\n #include <sbi/sbi_hart.h>\n+#include <sbi/sbi_heap.h>\n\n #ifdef OPENSBI_CC_SUPPORT_VECTOR\n+#define VLEN_MAX 65536\n\n static inline void vsetvl(ulong vl, ulong vtype)\n {\n-    ulong tmp;\n-\n-    asm volatile(\n-\t\".option push\\n\\t\"\n-\t\".option arch, +v\\n\\t\"\n-\t\"vsetvl %0, %1, %2\\n\\t\"\n-\t\".option pop\\n\\t\"\n-\t: \"=r\"(tmp)\n-\t: \"r\"(vl), \"r\"(vtype)\n-\t: \"memory\");\n+\tulong tmp;\n+\n+\tasm volatile(\n+\t\t\".option push\\n\\t\"\n+\t\t\".option arch, +v\\n\\t\"\n+\t\t\"vsetvl %0, %1, %2\\n\\t\"\n+\t\t\".option pop\\n\\t\"\n+\t\t: \"=r\"(tmp)\n+\t\t: \"r\"(vl), \"r\"(vtype)\n+\t\t: \"memory\");\n }\n\n static inline unsigned long vector_vlenb(void)\n@@ -64,7 +66,7 @@ void sbi_vector_save(struct sbi_vector_context *dst)\n\n \t/* Step 1: Save CSRs */\n \tREAD_CSR(dst->vtype,  vtype);\n-\tREAD_CSR(dst->vl,     vl);\n+\tREAD_CSR(dst->vl,\t  vl);\n \tREAD_CSR(dst->vcsr,   vcsr);\n \tREAD_CSR(dst->vstart, vstart);\n\n@@ -194,12 +196,24 @@ void sbi_vector_restore(const struct sbi_vector_context *src)\n\n \t/* Restore CSRs first */\n \tWRITE_CSR(vtype,  src->vtype);\n-\tWRITE_CSR(vl,     src->vl);\n+\tWRITE_CSR(vl,\t  src->vl);\n \tWRITE_CSR(vcsr,   src->vcsr);\n \tWRITE_CSR(vstart, src->vstart);\n #undef WRITE_CSR\n }\n\n+int sbi_vector_domain_init(void)\n+{\n+\tulong vlenb = vector_vlenb();\n+\n+\tif (vlenb > SBI_MAX_VLENB) {\n+\t\tsbi_printf(\"[Vector ERR:] vlenb range error\\n\");\n+\t\treturn SBI_ERR_BAD_RANGE;\n+\t}\n+\n+\treturn SBI_OK;\n+}\n+\n #else\n\n void sbi_vector_save(struct sbi_vector_context *dst)\n@@ -212,4 +226,9 @@ void sbi_vector_restore(const struct sbi_vector_context *src)\n \treturn;\n }\n\n+int sbi_vector_domain_init(void)\n+{\n+\treturn SBI_OK;\n+\n #endif /* OPENSBI_CC_SUPPORT_VECTOR */\n+\n",
    "prefixes": [
        "v3",
        "3/3"
    ]
}