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GET /api/patches/2217901/?format=api
{ "id": 2217901, "url": "http://patchwork.ozlabs.org/api/patches/2217901/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260330211859.19317-6-deller@kernel.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260330211859.19317-6-deller@kernel.org>", "list_archive_url": null, "date": "2026-03-30T21:18:52", "name": "[05/11] hw/pci-host/astro: Implement LMMIO registers", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "be99227520a874273b8500f5a6d069a9d0194d85", "submitter": { "id": 87076, "url": "http://patchwork.ozlabs.org/api/people/87076/?format=api", "name": "Helge Deller", "email": "deller@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260330211859.19317-6-deller@kernel.org/mbox/", "series": [ { "id": 498097, "url": "http://patchwork.ozlabs.org/api/series/498097/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498097", "date": "2026-03-30T21:18:54", "name": "HPPA Patches for qemu-v11", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498097/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217901/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217901/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=BCoAS3W6;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fl41S69gXz1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 31 Mar 2026 08:21:16 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w7K0u-0000o7-Ap; Mon, 30 Mar 2026 17:19:12 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <deller@kernel.org>) id 1w7K0s-0000nL-Tj\n for qemu-devel@nongnu.org; Mon, 30 Mar 2026 17:19:10 -0400", "from tor.source.kernel.org ([172.105.4.254])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <deller@kernel.org>) id 1w7K0r-0003kP-9e\n for qemu-devel@nongnu.org; Mon, 30 Mar 2026 17:19:10 -0400", "from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58])\n by tor.source.kernel.org (Postfix) with ESMTP id B19BC6013C;\n Mon, 30 Mar 2026 21:19:08 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPSA id 89053C2BCB0;\n Mon, 30 Mar 2026 21:19:07 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n s=k20201202; t=1774905548;\n bh=zAa11ZFgSx+DUq09y122Xryo9i20PCt3LH07vapF8iI=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=BCoAS3W6k1RCebEL+pBV3zoz3EakVrmXSAOYZtSPWM3iYwZTSczJd2+N8GErAfvFL\n 9DoTyHsPGrjSecTcIfY/XXu5w9brWl5MagwSTBVZM4W0ity5vG/6xi4Lyz117ydnx1\n 3Pbmt48PEg7zAHP613rQsI9+kIaAUuiom3kA2taFYKtzvRO1jBd76+ZQE33HDPU56/\n br+8FUH1yEzRZzsU+GL2lvpjXRQWMP/l6IE7UqsOYnqWjoRcQvSawH+Az6ZxnyNrFG\n Dxs+hTLC893WaqjgWaMaFbGMJ/HeTa7BdU7C52Uo2qC6S3/8y28FkuubaKVpuk9dxo\n kOZG3HK8M9lUQ==", "From": "Helge Deller <deller@kernel.org>", "To": "qemu-devel@nongnu.org", "Cc": "deller@gmx.de,\n\tRichard Henderson <richard.henderson@linaro.org>", "Subject": "[PATCH 05/11] hw/pci-host/astro: Implement LMMIO registers", "Date": "Mon, 30 Mar 2026 23:18:52 +0200", "Message-ID": "<20260330211859.19317-6-deller@kernel.org>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260330211859.19317-1-deller@kernel.org>", "References": "<20260330211859.19317-1-deller@kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=172.105.4.254; envelope-from=deller@kernel.org;\n helo=tor.source.kernel.org", "X-Spam_score_int": "-5", "X-Spam_score": "-0.6", "X-Spam_bar": "/", "X-Spam_report": "(-0.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1, RCVD_IN_VALIDITY_RPBL_BLOCKED=1,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Helge Deller <deller@gmx.de>\n\nAdd code to adjust the memory mapping windows according to the LMMIO registers\nin Astro. This allows SeaBIOS-hppa to configure Astro depending on existing\nPCI cards, and especially makes it possible to enable a VGA PCI card.\n\nSigned-off-by: Helge Deller <deller@gmx.de>\n---\n hw/pci-host/astro.c | 84 +++++++++++++++++++++++++++++++++----\n include/hw/pci-host/astro.h | 8 +++-\n 2 files changed, 81 insertions(+), 11 deletions(-)", "diff": "diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c\nindex 87bc98f553..4af35ea92f 100644\n--- a/hw/pci-host/astro.c\n+++ b/hw/pci-host/astro.c\n@@ -530,6 +530,78 @@ static ElroyState *elroy_init(int num)\n * Astro Runway chip.\n */\n \n+static void adjust_LMMIO_mapping(AstroState *s)\n+{\n+ MemoryRegion *lmmio;\n+ uint64_t map_addr, map_size, align_mask;\n+ uint32_t map_route, map_enabled, i;\n+\n+ lmmio = &s->lmmio;\n+\n+ /* read LMMIO distributed route and calculate size */\n+ map_route = s->ioc_ranges[(0x370 - 0x300) / 8] >> 58;\n+ map_route = MIN(MAX(map_route, 20), 23);\n+\n+ /* calculate size of each mapping, sum of all is 8-64 MB */\n+ map_size = 1ULL << map_route;\n+ align_mask = ~(map_size - 1);\n+\n+ /* read LMMIO_DIST_BASE for mapping address */\n+ map_addr = s->ioc_ranges[(0x360 - 0x300) / 8];\n+ map_enabled = map_addr & 1;\n+ map_addr &= MAKE_64BIT_MASK(24, 5);\n+ map_addr |= MAKE_64BIT_MASK(29, 36);\n+ map_addr &= align_mask;\n+ s->ioc_ranges[(0x360 - 0x300) / 8] = map_addr | map_enabled;\n+\n+ /* make sure the lmmio region is initially turned off */\n+ if (lmmio->enabled) {\n+ memory_region_set_enabled(lmmio, false);\n+ }\n+\n+ /* exit if range is not enabled */\n+ if (!map_enabled) {\n+ return;\n+ }\n+\n+ if (!lmmio->name) {\n+ memory_region_init_io(lmmio, OBJECT(s), &unassigned_io_ops, s,\n+ \"LMMIO\", ROPES_PER_IOC * map_size);\n+ memory_region_add_subregion_overlap(get_system_memory(),\n+ map_addr, lmmio, 1);\n+ }\n+\n+ memory_region_set_address(lmmio, map_addr);\n+ memory_region_set_size(lmmio, ROPES_PER_IOC * map_size);\n+ memory_region_set_enabled(lmmio, true);\n+\n+ for (i = 0; i < ELROY_NUM; i++) {\n+ MemoryRegion *alias;\n+ ElroyState *elroy;\n+ int rope;\n+\n+ elroy = s->elroy[i];\n+ alias = &elroy->lmmio_alias;\n+ rope = elroy_rope_nr[i];\n+ if (alias->enabled) {\n+ memory_region_set_enabled(alias, false);\n+ }\n+\n+ if (!alias->name) {\n+ memory_region_init_alias(alias, OBJECT(elroy),\n+ \"lmmio-alias\", &elroy->pci_mmio, 0, map_size);\n+ memory_region_add_subregion_overlap(lmmio, rope * map_size,\n+ alias, 2);\n+ }\n+\n+ memory_region_set_address(alias, rope * map_size);\n+ memory_region_set_alias_offset(alias,\n+ (uint32_t) (map_addr + rope * map_size));\n+ memory_region_set_size(alias, map_size);\n+ memory_region_set_enabled(alias, true);\n+ }\n+}\n+\n static void adjust_LMMIO_DIRECT_mapping(AstroState *s, unsigned int reg_index)\n {\n MemoryRegion *lmmio_alias;\n@@ -689,6 +761,9 @@ static MemTxResult astro_chip_write_with_attrs(void *opaque, hwaddr addr,\n if (index < LMMIO_DIRECT_RANGES * 3) {\n adjust_LMMIO_DIRECT_mapping(s, index);\n }\n+ if (addr >= 0x360 && addr <= 0x370 + 7) {\n+ adjust_LMMIO_mapping(s);\n+ }\n break;\n case 0x10200:\n case 0x10220:\n@@ -892,15 +967,6 @@ static void astro_realize(DeviceState *obj, Error **errp)\n elroy->mmio_base[(0x0240 - 0x200) / 8] = rope * map_size | 0x01;\n elroy->mmio_base[(0x0248 - 0x200) / 8] = 0x0000e000;\n \n- /* map elroys mmio */\n- map_size = LMMIO_DIST_BASE_SIZE / ROPES_PER_IOC;\n- map_addr = F_EXTEND(LMMIO_DIST_BASE_ADDR + rope * map_size);\n- memory_region_init_alias(&elroy->pci_mmio_alias, OBJECT(elroy),\n- \"pci-mmio-alias\",\n- &elroy->pci_mmio, (uint32_t) map_addr, map_size);\n- memory_region_add_subregion(get_system_memory(), map_addr,\n- &elroy->pci_mmio_alias);\n-\n /* map elroys io */\n map_size = IOS_DIST_BASE_SIZE / ROPES_PER_IOC;\n map_addr = F_EXTEND(IOS_DIST_BASE_ADDR + rope * map_size);\ndiff --git a/include/hw/pci-host/astro.h b/include/hw/pci-host/astro.h\nindex 5eb1fa57c1..0cd384bceb 100644\n--- a/include/hw/pci-host/astro.h\n+++ b/include/hw/pci-host/astro.h\n@@ -61,9 +61,10 @@ struct ElroyState {\n MemoryRegion this_mem;\n \n MemoryRegion pci_mmio;\n- MemoryRegion pci_mmio_alias;\n- MemoryRegion pci_hole;\n MemoryRegion pci_io;\n+\n+ MemoryRegion gmmio_alias;\n+ MemoryRegion lmmio_alias;\n };\n \n struct AstroState {\n@@ -89,6 +90,9 @@ struct AstroState {\n MemoryRegion this_mem;\n MemoryRegion lmmio_direct[LMMIO_DIRECT_RANGES];\n \n+ MemoryRegion lmmio;\n+ MemoryRegion gmmio;\n+\n IOMMUMemoryRegion iommu;\n AddressSpace iommu_as;\n };\n", "prefixes": [ "05/11" ] }