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GET /api/patches/2217759/?format=api
{ "id": 2217759, "url": "http://patchwork.ozlabs.org/api/patches/2217759/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260330140655.31EC55968DE@zero.eik.bme.hu/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260330140655.31EC55968DE@zero.eik.bme.hu>", "list_archive_url": null, "date": "2026-03-30T14:06:55", "name": "[RFC] cirrus-vga: Add property to set frame buffer endianness and make it default to little endian", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5db33061de6572df381e373f1da0c9b7d1b4a48b", "submitter": { "id": 16148, "url": "http://patchwork.ozlabs.org/api/people/16148/?format=api", "name": "BALATON Zoltan", "email": "balaton@eik.bme.hu" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260330140655.31EC55968DE@zero.eik.bme.hu/mbox/", "series": [ { "id": 498036, "url": "http://patchwork.ozlabs.org/api/series/498036/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498036", "date": "2026-03-30T14:06:55", "name": "[RFC] cirrus-vga: Add property to set frame buffer endianness and make it default to little endian", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498036/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217759/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217759/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)", "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fktPS6XXjz1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 31 Mar 2026 01:07:56 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w7DH2-000153-K5; Mon, 30 Mar 2026 10:07:26 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <balaton@eik.bme.hu>)\n id 1w7DGj-000117-DF\n for qemu-devel@nongnu.org; Mon, 30 Mar 2026 10:07:05 -0400", "from zero.eik.bme.hu ([152.66.115.2])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <balaton@eik.bme.hu>)\n id 1w7DGe-0005uA-Kr\n for qemu-devel@nongnu.org; Mon, 30 Mar 2026 10:07:02 -0400", "from localhost (localhost [127.0.0.1])\n by zero.eik.bme.hu (Postfix) with ESMTP id 3F7DB5969F3;\n Mon, 30 Mar 2026 16:06:57 +0200 (CEST)", "from zero.eik.bme.hu ([127.0.0.1])\n by localhost (zero.eik.bme.hu [127.0.0.1]) (amavis, port 10028) with ESMTP\n id 3L3Pt2g-NIfL; Mon, 30 Mar 2026 16:06:55 +0200 (CEST)", "by zero.eik.bme.hu (Postfix, from userid 432)\n id 31EC55968DE; Mon, 30 Mar 2026 16:06:55 +0200 (CEST)" ], "X-Virus-Scanned": "amavis at eik.bme.hu", "From": "BALATON Zoltan <balaton@eik.bme.hu>", "Subject": "[RFC PATCH] cirrus-vga: Add property to set frame buffer endianness\n and make it default to little endian", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "To": "qemu-devel@nongnu.org", "Cc": "Gerd Hoffmann <kraxel@redhat.com>, marcandre.lureau@redhat.com,\n Thomas Huth <thuth@redhat.com>, Peter Xu <peterx@redhat.com>,\n Fabiano Rosas <farosas@suse.de>,\n =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>", "Message-Id": "<20260330140655.31EC55968DE@zero.eik.bme.hu>", "Date": "Mon, 30 Mar 2026 16:06:55 +0200 (CEST)", "Received-SPF": "pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu;\n helo=zero.eik.bme.hu", "X-Spam_score_int": "1", "X-Spam_score": "0.1", "X-Spam_bar": "/", "X-Spam_report": "(0.1 / 5.0 requ) BAYES_00=-1.9,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=1, RCVD_IN_VALIDITY_RPBL_BLOCKED=1,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "I've tried this but it does not seem to work and leaves default to\nauto. Could somebody tell how this should work?\n\nSigned-off-by: BALATON Zoltan <balaton@eik.bme.hu>\n---\n hw/core/machine.c | 2 ++\n hw/display/cirrus_vga.c | 6 ++++++\n hw/display/cirrus_vga_internal.h | 2 ++\n hw/display/cirrus_vga_isa.c | 2 ++\n 4 files changed, 12 insertions(+)", "diff": "diff --git a/hw/core/machine.c b/hw/core/machine.c\nindex 0aa77a57e9..e573ef46bc 100644\n--- a/hw/core/machine.c\n+++ b/hw/core/machine.c\n@@ -41,6 +41,8 @@\n GlobalProperty hw_compat_10_2[] = {\n { \"scsi-block\", \"migrate-pr\", \"off\" },\n { \"isa-cirrus-vga\", \"global-vmstate\", \"true\" },\n+ { \"isa-cirrus-vga\", \"x-big-endian-fb\", \"off\" },\n+ { \"cirrus-vga\", \"x-big-endian-fb\", \"off\" },\n };\n const size_t hw_compat_10_2_len = G_N_ELEMENTS(hw_compat_10_2);\n \ndiff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c\nindex 629b34fc68..e379f125ae 100644\n--- a/hw/display/cirrus_vga.c\n+++ b/hw/display/cirrus_vga.c\n@@ -2930,6 +2930,10 @@ void cirrus_init_common(CirrusVGAState *s, Object *owner,\n s->vga.cursor_invalidate = cirrus_cursor_invalidate;\n s->vga.cursor_draw_line = cirrus_cursor_draw_line;\n \n+ if (s->big_endian_fb != ON_OFF_AUTO_AUTO) {\n+ s->vga.big_endian_fb = (s->big_endian_fb == ON_OFF_AUTO_ON);\n+ }\n+\n qemu_register_reset(cirrus_reset, s);\n }\n \n@@ -2987,6 +2991,8 @@ static const Property pci_vga_cirrus_properties[] = {\n cirrus_vga.vga.vram_size_mb, 4),\n DEFINE_PROP_BOOL(\"blitter\", struct PCICirrusVGAState,\n cirrus_vga.enable_blitter, true),\n+ DEFINE_PROP_ON_OFF_AUTO(\"x-big-endian-fb\", struct PCICirrusVGAState,\n+ cirrus_vga.big_endian_fb, ON_OFF_AUTO_AUTO),\n };\n \n static void cirrus_vga_class_init(ObjectClass *klass, const void *data)\ndiff --git a/hw/display/cirrus_vga_internal.h b/hw/display/cirrus_vga_internal.h\nindex a78ebbd920..7c07201f18 100644\n--- a/hw/display/cirrus_vga_internal.h\n+++ b/hw/display/cirrus_vga_internal.h\n@@ -26,6 +26,7 @@\n #ifndef CIRRUS_VGA_INTERNAL_H\n #define CIRRUS_VGA_INTERNAL_H\n \n+#include \"hw/core/qdev-properties.h\"\n #include \"vga_int.h\"\n \n /* IDs */\n@@ -94,6 +95,7 @@ typedef struct CirrusVGAState {\n int real_vram_size; /* XXX: suppress that */\n int device_id;\n int bustype;\n+ OnOffAuto big_endian_fb;\n } CirrusVGAState;\n \n void cirrus_init_common(CirrusVGAState *s, Object *owner,\ndiff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c\nindex 76034a8860..c2b0b61476 100644\n--- a/hw/display/cirrus_vga_isa.c\n+++ b/hw/display/cirrus_vga_isa.c\n@@ -75,6 +75,8 @@ static const Property isa_cirrus_vga_properties[] = {\n cirrus_vga.enable_blitter, true),\n DEFINE_PROP_BOOL(\"global-vmstate\", struct ISACirrusVGAState,\n cirrus_vga.vga.global_vmstate, false),\n+ DEFINE_PROP_ON_OFF_AUTO(\"x-big-endian-fb\", struct PCICirrusVGAState,\n+ cirrus_vga.big_endian_fb, ON_OFF_AUTO_AUTO),\n };\n \n static void isa_cirrus_vga_class_init(ObjectClass *klass, const void *data)\n", "prefixes": [ "RFC" ] }