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GET /api/patches/2217733/?format=api
{ "id": 2217733, "url": "http://patchwork.ozlabs.org/api/patches/2217733/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260330-power-legacy-v2-1-47dde3182a2c@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260330-power-legacy-v2-1-47dde3182a2c@nxp.com>", "list_archive_url": null, "date": "2026-03-30T14:04:03", "name": "[v2,1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "14aa68cb8a3eab86efeb59bc2cbf56e2b36f9179", "submitter": { "id": 80723, "url": "http://patchwork.ozlabs.org/api/people/80723/?format=api", "name": "Peng Fan (OSS)", "email": "peng.fan@oss.nxp.com" }, "delegate": { "id": 151988, "url": "http://patchwork.ozlabs.org/api/users/151988/?format=api", "username": "festevam", "first_name": "Fabio", "last_name": "Estevam", "email": "festevam@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260330-power-legacy-v2-1-47dde3182a2c@nxp.com/mbox/", "series": [ { "id": 498022, "url": "http://patchwork.ozlabs.org/api/series/498022/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=498022", "date": "2026-03-30T14:04:03", "name": "i.MX8MP: Convert to DM_PMIC for a few boards", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/498022/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217733/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217733/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": 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b=EfxQLp1z5TehziHzZikUd+arns2ebaSMgdhqvafwpDvcv4yadzrjPWcuyhiM3+9qTR1bshJk/3kBarrv2bMBsKy3aTYreOQHFStJr2+6TeX6sC5af5cQbKMyKnsgAP7t8jtecDfcdKdCj7D2DLHMwxTFWkJRCMTzcYZsdAcsGyEEPH3dQi101WaklTQOyFewIMDvqwYU1nHd+ELWvMi26AyyF7RBlzg5xQ2d4fwxQbnNI7iPAq1PlCSvPNY8VozkSDxtYSJy4Cq3EziIKPnwTleCFMXiW4QtniUIoKX0WWxkJWxVVa3QB8bWuZUL3aPjGzzbgko5gBuwMtDN+ngRsQ==", "From": "\"Peng Fan (OSS)\" <peng.fan@oss.nxp.com>", "Date": "Mon, 30 Mar 2026 22:04:03 +0800", "Subject": "[PATCH v2 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260330-power-legacy-v2-1-47dde3182a2c@nxp.com>", "References": "<20260330-power-legacy-v2-0-47dde3182a2c@nxp.com>", "In-Reply-To": "<20260330-power-legacy-v2-0-47dde3182a2c@nxp.com>", "To": "\"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>, upstream@lists.phytec.de,\n u-boot@lists.denx.de, Stefano Babic <sbabic@nabladev.com>,\n Fabio Estevam <festevam@gmail.com>, Tom Rini <trini@konsulko.com>", "Cc": "Teresa Remmet <t.remmet@phytec.de>, Benjamin Hahn <B.Hahn@phytec.de>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>,\n Leonard Anderweit <l.anderweit@phytec.de>, Yannic Moog <y.moog@phytec.de>,\n Francesco Dolcini <francesco.dolcini@toradex.com>,\n Emanuele Ghidoli <emanuele.ghidoli@toradex.com>,\n Manoj Sai <abbaraju.manojsai@amarulasolutions.com>,\n Matteo Lisi <matteo.lisi@engicam.com>, Peng Fan <peng.fan@nxp.com>", "X-Mailer": "b4 0.14.3", "X-ClientProxiedBy": "MA5PR01CA0031.INDPRD01.PROD.OUTLOOK.COM\n (2603:1096:a01:178::16) To PAXPR04MB8459.eurprd04.prod.outlook.com\n (2603:10a6:102:1da::15)", "MIME-Version": "1.0", "X-MS-Exchange-MessageSentRepresentingType": "1", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "PAXPR04MB8459:EE_|DB9PR04MB9962:EE_", "X-MS-Office365-Filtering-Correlation-Id": "ceeaee9c-30fb-4eaf-5c9a-08de8e5a89a3", "X-MS-Exchange-SharedMailbox-RoutingAgent-Processed": "True", "X-LD-Processed": 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"=?utf-8?q?CRECFid/WiMYTEylmzNCEvXtL+HN?=\n\t=?utf-8?q?ul21rti/Mvs8zzb8oO7t/Q2x+6cW82v10VUtEUoGuQtFhvlCBUH4zMvmDQhAe7wR8?=\n\t=?utf-8?q?VcMdXQy96NMSxprZ3bPE0F0y9PqbK1OMZQQCP9F9KZ/QqRLTPgYTNkMolrkWDq0l1?=\n\t=?utf-8?q?9Xp9o+/P2KLlj4Ya9lrn9qfNGDqBY2BBQSNMWEEP1IF9hduSRvgXlytCaeRnq+lIC?=\n\t=?utf-8?q?eGs+wcSasfO9vE3ex9fjIv6M05W+4Qb+yk3pdk2Nnn6CBL4iy3OPX/LD9m84ibBRf?=\n\t=?utf-8?q?t54pNBMSCJCUMBgcFZagDRE3MqWOWHSZbuGZT+M1IzpX8JYAq+1gp2ap/OXQsIxLM?=\n\t=?utf-8?q?owctSXpZaOBrWxFWRBdtIbHBYiO/69a0wSRFf2LRGlMul1tS6vvQCEfkYU9iDt3hG?=\n\t=?utf-8?q?TxHT9Zh6ZZ0wFglEsUprYtDUejDbK1agjTPq0D0Yj1xz8CiHEYu7FN5N9lTV/fZsK?=\n\t=?utf-8?q?u2MHIqwqfVekw4JKvqhu6qHrpEFSuWsNNZweurazv8E+6HxD3lY3yYRFl1QUht1yb?=\n\t=?utf-8?q?3eatSj5RgldaxKYhHYuQBPF3usLrZGorCU2vcC92FVcIRj6rEkNh+GKrmLJSQiBTg?=\n\t=?utf-8?q?FPRbBIus6OGBdmng0ySrUM1MMTzIMZAalSySt4yWom84qmbRHu1bfsQXU1uPAjnrC?=\n\t=?utf-8?q?qo1lvqtRvSJaeDH85aDDwHvpUdZSMlsULHUOsQDyGAx8YR8pReU5IH9XZl0bAu2zL?=\n\t=?utf-8?q?0Uq5fw1bYSRG19C0uAXe889i6VaL3NLXb10dbL77elXptwncHLqtysp55WKzsiNLa?=\n\t=?utf-8?q?I6GrbpTd+V3/smcy8IIx2tSFMG+zD6bn9efFfTEsBm5Zui0tLMH1J4NiEk2gl/RGf?=\n\t=?utf-8?q?gJYiHhmygZLHHmJRc+/gWaam2SADD1+S3jPnLxgPgfw+mWP8nXM4+xhr14LSHnTFM?=\n\t=?utf-8?q?sEpiEc4zYRRxKAtE8/DcntUjSx3iO03SGChCAA9OjCJNi4QpgIOsCFtdlTol20pHg?=\n\t=?utf-8?q?qUowUU+jn1Qlp21zBAMgyAjVddbklj5uQSV2/zbEzm2fyfhSJ7FIUYKWrwPSweIip?=\n\t=?utf-8?q?7fnRFVmYwIbPF2v0pJbS5H6h2BYzw0qqsl96lbUDVwY52zRIL5KkUR3T+D7pMbEL0?=\n\t=?utf-8?q?dbzGp+0dEXDZONoK/c+IDAM9MNTqXFLbWmT7c/HCZQQYua4/tyg+ce5lOobFLzzRf?=\n\t=?utf-8?q?3VaAt36ejhZ9O5gts3Cn4qmyqJUBij5x/QaDzMjIVOKUw3r8j/O6MUNpc+qRRaAWe?=\n\t=?utf-8?q?+IvEFjIytlMnjcgusvjcHa6iWlT1FO3pEAw941AgztBfa4NMK0C9B+YNOg7l1ncWq?=\n\t=?utf-8?q?X/Z4ujLhhcb+zRssbX/g8pYMbF1hwn06NmJQCBkfDB2k5QqpJz+5wzuH5d4GSmPOG?=\n\t=?utf-8?q?V/7dhSXiTC6FeDT1bSeLc+Abvbnvr6yU4LrZnolTPzuh5UUOcr1Lt8/yNBaz4lWGV?=\n\t=?utf-8?q?PxGF5f5oadJTh32xrhjjiucxTNKUIA0d/H7dlbjpuDSNwEUFhKhVxtyhxE9ehVm83?=\n\t=?utf-8?q?ZAPR5c90K6aW2nLC8yeAnF6hOc7MjQrKFanzABSppTakRkUAeOcO1X6tzx6oDq6Mp?=\n\t=?utf-8?q?9L9Z3YK3S1dlpz6oiZnpddrdGQhlYvzQWbaDmMTbe8o6m8F+2AdrZmw6VaHJ/Uh48?=\n\t=?utf-8?q?gexw07RMPjxB0nIRzDfkw1mW1b97B3/3ECAMGBePFE2MeJrWAgQUIoR+Ou+ijh21r?=\n\t=?utf-8?q?M98BtS0GnQNHg4fDBgPV936EEsMbk83g=3D=3D?=", "X-OriginatorOrg": "oss.nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n ceeaee9c-30fb-4eaf-5c9a-08de8e5a89a3", "X-MS-Exchange-CrossTenant-AuthSource": "PAXPR04MB8459.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Mar 2026 12:47:44.2729 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n N4Vz98VoqnWGjD0CAuPFJe9p8gH0NXo/iCPkOmT9cXdOvpVm8BRjps2pVXwpBoOhmYHKDjKkgwSsrv6jf9Jkew==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DB9PR04MB9962", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Peng Fan <peng.fan@nxp.com>\n\nConvert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC\nhandling.\n\nChanges include:\n- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.\n- Drop legacy SPL I2C and PMIC options.\n- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.\n- Use DM-based pmic_get() with the DT node \"pmic@25\".\n- Update PMIC register programming to use struct udevice API.\n\nSigned-off-by: Peng Fan <peng.fan@nxp.com>\n---\n .../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 22 ++++++++++-\n board/phytec/phycore_imx8mp/spl.c | 43 +++++++---------------\n configs/phycore-imx8mp_defconfig | 10 ++---\n 3 files changed, 38 insertions(+), 37 deletions(-)", "diff": "diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi\nindex 4804a204e92..e9403d9ea82 100644\n--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi\n+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi\n@@ -34,6 +34,18 @@\n \t};\n };\n \n+&pinctrl_i2c1 {\n+\tbootph-all;\n+};\n+\n+&pinctrl_pmic {\n+\tbootph-all;\n+};\n+\n+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {\n+\tbootph-all;\n+};\n+\n ®_usdhc2_vmmc {\n \tbootph-pre-ram;\n };\n@@ -83,11 +95,11 @@\n };\n \n &i2c1 {\n-\tbootph-pre-ram;\n+\tbootph-all;\n };\n \n &pmic {\n-\tbootph-pre-ram;\n+\tbootph-all;\n };\n \n &usb_dwc3_0 {\n@@ -96,6 +108,12 @@\n \n &usdhc2 {\n \tbootph-pre-ram;\n+\t/*\n+\t * LDO5 output depends on SD2_VSEL, but no way to read back SD2_VSEL\n+\t * when using SDHC controller VSELECT to control SD2_VSEL. So drop\n+\t * vqmmc-supply to avoid fsl_esdhc_imx read back wrong voltage.\n+\t */\n+\t/delete-property/ vqmmc-supply;\n };\n \n &usdhc3 {\ndiff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c\nindex fc7aefd0073..fc6f5104925 100644\n--- a/board/phytec/phycore_imx8mp/spl.c\n+++ b/board/phytec/phycore_imx8mp/spl.c\n@@ -117,45 +117,32 @@ out:\n \tddr_init(&dram_timing);\n }\n \n-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)\n-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)\n-struct i2c_pads_info i2c_pad_info1 = {\n-\t.scl = {\n-\t\t.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,\n-\t\t.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,\n-\t\t.gp = IMX_GPIO_NR(5, 14),\n-\t},\n-\t.sda = {\n-\t\t.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,\n-\t\t.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,\n-\t\t.gp = IMX_GPIO_NR(5, 15),\n-\t},\n-};\n-\n int power_init_board(void)\n {\n-\tstruct pmic *p;\n+\tstruct udevice *dev;\n \tint ret;\n \n-\tret = power_pca9450_init(0, 0x25);\n-\tif (ret)\n-\t\tprintf(\"power init failed\");\n-\tp = pmic_get(\"PCA9450\");\n-\tpmic_probe(p);\n+\tret = pmic_get(\"pmic@25\", &dev);\n+\tif (ret == -ENODEV) {\n+\t\tputs(\"No pmic@25\\n\");\n+\t\treturn 0;\n+\t}\n+\tif (ret < 0)\n+\t\treturn ret;\n \n \t/* BUCKxOUT_DVS0/1 control BUCK123 output */\n-\tpmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);\n+\tpmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);\n \n \t/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */\n-\tpmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);\n-\tpmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);\n+\tpmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);\n+\tpmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);\n \n \t/* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */\n-\tpmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);\n-\tpmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);\n+\tpmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);\n+\tpmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);\n \n \t/* Set WDOG_B_CFG to cold reset */\n-\tpmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);\n+\tpmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);\n \n \treturn 0;\n }\n@@ -193,8 +180,6 @@ void board_init_f(ulong dummy)\n \n \tenable_tzc380();\n \n-\tsetup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);\n-\n \tpower_init_board();\n \n \t/* DDR initialization */\ndiff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig\nindex 2fcf7db9e5c..51d9737afb3 100644\n--- a/configs/phycore-imx8mp_defconfig\n+++ b/configs/phycore-imx8mp_defconfig\n@@ -10,7 +10,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000\n CONFIG_ENV_SIZE=0x10000\n CONFIG_ENV_OFFSET=0x3C0000\n CONFIG_ENV_SECT_SIZE=0x10000\n-CONFIG_SYS_I2C_MXC_I2C1=y\n CONFIG_DM_GPIO=y\n CONFIG_DEFAULT_DEVICE_TREE=\"freescale/imx8mp-phyboard-pollux-rdk\"\n CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000\n@@ -113,8 +112,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y\n CONFIG_FASTBOOT_MMC_USER_NAME=\"mmc2\"\n CONFIG_MXC_GPIO=y\n CONFIG_DM_I2C=y\n-# CONFIG_SPL_DM_I2C is not set\n-CONFIG_SPL_SYS_I2C_LEGACY=y\n CONFIG_I2C_EEPROM=y\n CONFIG_SYS_I2C_EEPROM_ADDR=0x51\n CONFIG_SUPPORT_EMMC_BOOT=y\n@@ -144,15 +141,16 @@ CONFIG_PHY_IMX8MQ_USB=y\n CONFIG_PINCTRL=y\n CONFIG_SPL_PINCTRL=y\n CONFIG_PINCTRL_IMX8M=y\n-CONFIG_SPL_POWER_LEGACY=y\n CONFIG_POWER_DOMAIN=y\n CONFIG_IMX8M_POWER_DOMAIN=y\n CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y\n-CONFIG_POWER_PCA9450=y\n+CONFIG_DM_PMIC=y\n+CONFIG_DM_PMIC_PCA9450=y\n+CONFIG_SPL_DM_PMIC_PCA9450=y\n CONFIG_DM_REGULATOR=y\n+CONFIG_DM_REGULATOR_PCA9450=y\n CONFIG_DM_REGULATOR_FIXED=y\n CONFIG_DM_REGULATOR_GPIO=y\n-CONFIG_SPL_POWER_I2C=y\n CONFIG_DM_RNG=y\n CONFIG_DM_SERIAL=y\n CONFIG_MXC_UART=y\n", "prefixes": [ "v2", "1/4" ] }