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GET /api/patches/2217722/?format=api
{ "id": 2217722, "url": "http://patchwork.ozlabs.org/api/patches/2217722/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260330122601.22140-3-fangyu.yu@linux.alibaba.com/", "project": { "id": 70, "url": "http://patchwork.ozlabs.org/api/projects/70/?format=api", "name": "Linux KVM RISC-V", "link_name": "kvm-riscv", "list_id": "kvm-riscv.lists.infradead.org", "list_email": "kvm-riscv@lists.infradead.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "http://lists.infradead.org/pipermail/kvm-riscv/", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260330122601.22140-3-fangyu.yu@linux.alibaba.com>", "list_archive_url": null, "date": "2026-03-30T12:25:59", "name": "[v6,2/4] RISC-V: KVM: Cache gstage pgd_levels in struct kvm_gstage", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "41ba99723442f3bd158e2bf8d971cf614aacd45a", "submitter": { "id": 91416, "url": "http://patchwork.ozlabs.org/api/people/91416/?format=api", "name": null, "email": "fangyu.yu@linux.alibaba.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260330122601.22140-3-fangyu.yu@linux.alibaba.com/mbox/", "series": [ { "id": 498017, "url": "http://patchwork.ozlabs.org/api/series/498017/?format=api", "web_url": "http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=498017", "date": "2026-03-30T12:25:57", "name": "Support runtime configuration for per-VM's HGATP mode", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498017/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217722/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217722/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=zf4QKQMd;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=linux.alibaba.com header.i=@linux.alibaba.com\n header.a=rsa-sha256 header.s=default header.b=GTVHiXiv;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: From: Fangyu Yu <fangyu.yu@linux.alibaba.com> Gstage\n page-table\n helpers frequently chase gstage->kvm->arch to fetch pgd_levels. This adds\n noise and repeats the same dereference chain in hot paths. Add pgd_levels\n to struct kvm_gstage and initialize it from kvm->arch when setting up a\n gstage\n instance. Introduce kvm_riscv_gstage_init() to centralize initialization\n and switch gstage code to use gst [...]\n Content analysis details: (-14.6 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -7.5 USER_IN_DEF_DKIM_WL From: address is in the default DKIM welcome-list\n -7.5 USER_IN_DEF_SPF_WL From: address is in the default SPF welcome-list\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 1.0 RCVD_IN_VALIDITY_CERTIFIED_BLOCKED RBL: ADMINISTRATOR NOTICE: The\n query to Validity was blocked. See\n https://knowledge.validity.com/hc/en-us/articles/20961730681243\n for more information.\n [115.124.30.131 listed in\n sa-trusted.bondedsender.org]\n 1.0 RCVD_IN_VALIDITY_SAFE_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to\n Validity was blocked. See\n https://knowledge.validity.com/hc/en-us/articles/20961730681243\n for more information.\n [115.124.30.131 listed in sa-accredit.habeas.com]\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [115.124.30.131 listed in list.dnswl.org]\n 1.0 RCVD_IN_VALIDITY_RPBL_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to\n Validity was blocked. See\n https://knowledge.validity.com/hc/en-us/articles/20961730681243\n for more information.\n [115.124.30.131 listed in\n bl.score.senderscore.com]\n 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay\n lines\n -0.5 ENV_AND_HDR_SPF_MATCH Env and Hdr From used in default SPF WL Match", "X-BeenThere": "kvm-riscv@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<kvm-riscv.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/kvm-riscv/>", "List-Post": "<mailto:kvm-riscv@lists.infradead.org>", "List-Help": "<mailto:kvm-riscv-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/kvm-riscv>,\n <mailto:kvm-riscv-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"kvm-riscv\" <kvm-riscv-bounces@lists.infradead.org>", "Errors-To": "kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "From: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n\nGstage page-table helpers frequently chase gstage->kvm->arch to\nfetch pgd_levels. This adds noise and repeats the same dereference\nchain in hot paths.\n\nAdd pgd_levels to struct kvm_gstage and initialize it from kvm->arch\nwhen setting up a gstage instance. Introduce kvm_riscv_gstage_init()\nto centralize initialization and switch gstage code to use\ngstage->pgd_levels.\n\nSuggested-by: Anup Patel <anup@brainfault.org>\nSigned-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>\n---\n arch/riscv/include/asm/kvm_gstage.h | 10 ++++++\n arch/riscv/kvm/gstage.c | 10 +++---\n arch/riscv/kvm/mmu.c | 50 ++++++-----------------------\n 3 files changed, 25 insertions(+), 45 deletions(-)", "diff": "diff --git a/arch/riscv/include/asm/kvm_gstage.h b/arch/riscv/include/asm/kvm_gstage.h\nindex 5aa58d1f692a..70d9d483365e 100644\n--- a/arch/riscv/include/asm/kvm_gstage.h\n+++ b/arch/riscv/include/asm/kvm_gstage.h\n@@ -15,6 +15,7 @@ struct kvm_gstage {\n #define KVM_GSTAGE_FLAGS_LOCAL\t\tBIT(0)\n \tunsigned long vmid;\n \tpgd_t *pgd;\n+\tunsigned long pgd_levels;\n };\n \n struct kvm_gstage_mapping {\n@@ -92,4 +93,13 @@ static inline unsigned long kvm_riscv_gstage_mode(unsigned long pgd_levels)\n \t}\n }\n \n+static inline void kvm_riscv_gstage_init(struct kvm_gstage *gstage, struct kvm *kvm)\n+{\n+\tgstage->kvm = kvm;\n+\tgstage->flags = 0;\n+\tgstage->vmid = READ_ONCE(kvm->arch.vmid.vmid);\n+\tgstage->pgd = kvm->arch.pgd;\n+\tgstage->pgd_levels = kvm->arch.pgd_levels;\n+}\n+\n #endif\ndiff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c\nindex 4beb9322fe76..7c4c34bc191b 100644\n--- a/arch/riscv/kvm/gstage.c\n+++ b/arch/riscv/kvm/gstage.c\n@@ -26,7 +26,7 @@ static inline unsigned long gstage_pte_index(struct kvm_gstage *gstage,\n \tunsigned long mask;\n \tunsigned long shift = HGATP_PAGE_SHIFT + (kvm_riscv_gstage_index_bits * level);\n \n-\tif (level == gstage->kvm->arch.pgd_levels - 1)\n+\tif (level == gstage->pgd_levels - 1)\n \t\tmask = (PTRS_PER_PTE * (1UL << kvm_riscv_gstage_pgd_xbits)) - 1;\n \telse\n \t\tmask = PTRS_PER_PTE - 1;\n@@ -45,7 +45,7 @@ static int gstage_page_size_to_level(struct kvm_gstage *gstage, unsigned long pa\n \tu32 i;\n \tunsigned long psz = 1UL << 12;\n \n-\tfor (i = 0; i < gstage->kvm->arch.pgd_levels; i++) {\n+\tfor (i = 0; i < gstage->pgd_levels; i++) {\n \t\tif (page_size == (psz << (i * kvm_riscv_gstage_index_bits))) {\n \t\t\t*out_level = i;\n \t\t\treturn 0;\n@@ -58,7 +58,7 @@ static int gstage_page_size_to_level(struct kvm_gstage *gstage, unsigned long pa\n static int gstage_level_to_page_order(struct kvm_gstage *gstage, u32 level,\n \t\t\t\t unsigned long *out_pgorder)\n {\n-\tif (gstage->kvm->arch.pgd_levels < level)\n+\tif (gstage->pgd_levels < level)\n \t\treturn -EINVAL;\n \n \t*out_pgorder = 12 + (level * kvm_riscv_gstage_index_bits);\n@@ -83,7 +83,7 @@ bool kvm_riscv_gstage_get_leaf(struct kvm_gstage *gstage, gpa_t addr,\n \t\t\t pte_t **ptepp, u32 *ptep_level)\n {\n \tpte_t *ptep;\n-\tu32 current_level = gstage->kvm->arch.pgd_levels - 1;\n+\tu32 current_level = gstage->pgd_levels - 1;\n \n \t*ptep_level = current_level;\n \tptep = (pte_t *)gstage->pgd;\n@@ -127,7 +127,7 @@ int kvm_riscv_gstage_set_pte(struct kvm_gstage *gstage,\n \t\t\t struct kvm_mmu_memory_cache *pcache,\n \t\t\t const struct kvm_gstage_mapping *map)\n {\n-\tu32 current_level = gstage->kvm->arch.pgd_levels - 1;\n+\tu32 current_level = gstage->pgd_levels - 1;\n \tpte_t *next_ptep = (pte_t *)gstage->pgd;\n \tpte_t *ptep = &next_ptep[gstage_pte_index(gstage, map->addr, current_level)];\n \ndiff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c\nindex fbcdd75cb9af..2d3def024270 100644\n--- a/arch/riscv/kvm/mmu.c\n+++ b/arch/riscv/kvm/mmu.c\n@@ -24,10 +24,7 @@ static void mmu_wp_memory_region(struct kvm *kvm, int slot)\n \tphys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;\n \tstruct kvm_gstage gstage;\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \n \tspin_lock(&kvm->mmu_lock);\n \tkvm_riscv_gstage_wp_range(&gstage, start, end);\n@@ -49,10 +46,7 @@ int kvm_riscv_mmu_ioremap(struct kvm *kvm, gpa_t gpa, phys_addr_t hpa,\n \tstruct kvm_gstage_mapping map;\n \tstruct kvm_gstage gstage;\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \n \tend = (gpa + size + PAGE_SIZE - 1) & PAGE_MASK;\n \tpfn = __phys_to_pfn(hpa);\n@@ -89,10 +83,7 @@ void kvm_riscv_mmu_iounmap(struct kvm *kvm, gpa_t gpa, unsigned long size)\n {\n \tstruct kvm_gstage gstage;\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \n \tspin_lock(&kvm->mmu_lock);\n \tkvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n@@ -109,10 +100,7 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,\n \tphys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;\n \tstruct kvm_gstage gstage;\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \n \tkvm_riscv_gstage_wp_range(&gstage, start, end);\n }\n@@ -141,10 +129,7 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,\n \tphys_addr_t size = slot->npages << PAGE_SHIFT;\n \tstruct kvm_gstage gstage;\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \n \tspin_lock(&kvm->mmu_lock);\n \tkvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n@@ -250,10 +235,7 @@ bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)\n \tif (!kvm->arch.pgd)\n \t\treturn false;\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \tmmu_locked = spin_trylock(&kvm->mmu_lock);\n \tkvm_riscv_gstage_unmap_range(&gstage, range->start << PAGE_SHIFT,\n \t\t\t\t (range->end - range->start) << PAGE_SHIFT,\n@@ -275,10 +257,7 @@ bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)\n \n \tWARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \tif (!kvm_riscv_gstage_get_leaf(&gstage, range->start << PAGE_SHIFT,\n \t\t\t\t &ptep, &ptep_level))\n \t\treturn false;\n@@ -298,10 +277,7 @@ bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)\n \n \tWARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \tif (!kvm_riscv_gstage_get_leaf(&gstage, range->start << PAGE_SHIFT,\n \t\t\t\t &ptep, &ptep_level))\n \t\treturn false;\n@@ -463,10 +439,7 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot,\n \tstruct kvm_gstage gstage;\n \tstruct page *page;\n \n-\tgstage.kvm = kvm;\n-\tgstage.flags = 0;\n-\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\tgstage.pgd = kvm->arch.pgd;\n+\tkvm_riscv_gstage_init(&gstage, kvm);\n \n \t/* Setup initial state of output mapping */\n \tmemset(out_map, 0, sizeof(*out_map));\n@@ -587,10 +560,7 @@ void kvm_riscv_mmu_free_pgd(struct kvm *kvm)\n \n \tspin_lock(&kvm->mmu_lock);\n \tif (kvm->arch.pgd) {\n-\t\tgstage.kvm = kvm;\n-\t\tgstage.flags = 0;\n-\t\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n-\t\tgstage.pgd = kvm->arch.pgd;\n+\t\tkvm_riscv_gstage_init(&gstage, kvm);\n \t\tkvm_riscv_gstage_unmap_range(&gstage, 0UL,\n \t\t\tkvm_riscv_gstage_gpa_size(kvm->arch.pgd_levels), false);\n \t\tpgd = READ_ONCE(kvm->arch.pgd);\n", "prefixes": [ "v6", "2/4" ] }