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GET /api/patches/2217629/?format=api
{ "id": 2217629, "url": "http://patchwork.ozlabs.org/api/patches/2217629/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260330-pcie-intel-gw-v2-2-8bd07367a298@dev.tdt.de/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260330-pcie-intel-gw-v2-2-8bd07367a298@dev.tdt.de>", "list_archive_url": null, "date": "2026-03-30T09:07:12", "name": "[v2,2/7] PCI: intel-gw: Move interrupt enable to own function", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6d9de3514c54a43a4ace14177a8656cd965eac4e", "submitter": { "id": 72238, "url": "http://patchwork.ozlabs.org/api/people/72238/?format=api", "name": "Florian Eckert", "email": "fe@dev.tdt.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260330-pcie-intel-gw-v2-2-8bd07367a298@dev.tdt.de/mbox/", "series": [ { "id": 497985, "url": "http://patchwork.ozlabs.org/api/series/497985/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497985", "date": "2026-03-30T09:07:13", "name": "PCI: intel-gw: Fixes to make the driver working again", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497985/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217629/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217629/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51426-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=temperror header.d=dev.tdt.de header.i=@dev.tdt.de header.a=rsa-sha256\n header.s=z1-selector1 header.b=edQ2oG6K;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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a=rsa-sha256; c=relaxed/relaxed; d=dev.tdt.de;\n\ts=z1-selector1; t=1774861650;\n\tbh=lMn3lFGeOL2LbKYJ5BgVNUmk+cjNqBsZKKuwLQ+o6aA=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:From;\n\tb=edQ2oG6K66GfAqJd0kgsfIGvAxxbeJ6DEyt+5Bgy+bgnQFenimYRilAADUh5RbGMQ\n\t Q0RicTNqpHcpobDeh+HbIUWsy18osA6NtvKdKkL8iPHf7ByRfUYo2SHv784G+8jOIA\n\t ICArCQDj/oo6GFpUe78VW0qnnq9piU/Ee72S+qjhvaWmjzk2rZkrsLLXLc+b4m4TWM\n\t 3K+Q9EFjoVSa/m2AFL3BZ0gjOBVlA2iGPn3BK+k0dLC7R4wNuz3CN0yXYUc0oUJ5+9\n\t uI+mcof7fuQsnIvNI5DmaUQl07ED1A5lbtF8chk8QXyFCGgUelVa9lsEdepQ24+iVS\n\t NHdH1OgRbk3ZA==", "From": "Florian Eckert <fe@dev.tdt.de>", "Date": "Mon, 30 Mar 2026 11:07:12 +0200", "Subject": "[PATCH v2 2/7] PCI: intel-gw: Move interrupt enable to own\n function", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Message-ID": "<20260330-pcie-intel-gw-v2-2-8bd07367a298@dev.tdt.de>", "References": "<20260330-pcie-intel-gw-v2-0-8bd07367a298@dev.tdt.de>", "In-Reply-To": "<20260330-pcie-intel-gw-v2-0-8bd07367a298@dev.tdt.de>", "To": "Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy?=\n\t=?utf-8?q?=C5=84ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Johan Hovold <johan+linaro@kernel.org>,\n Sajid Dalvi <sdalvi@google.com>, Ajay Agarwal <ajayagarwal@google.com>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>,\n Rahul Tanwar <rtanwar@maxlinear.com>", "Cc": "linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org, Florian Eckert <fe@dev.tdt.de>,\n\tEckert.Florian@googlemail.com, ms@dev.tdt.de", "X-Mailer": "b4 0.14.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1774861650; l=2285;\n i=fe@dev.tdt.de; s=20260205; h=from:subject:message-id;\n bh=lb6QCw9gymNGaU3gwgLeUyGUNWDhF66pmRRGTrBntko=;\n b=sNI2x29ee8uZAAOa7uvLnjH0hd/tlcDXapNwhd+w/Lxe6TI2ELK+oSHLImAoSEYbbPr2pI5UM\n h6JCo6beY/zAk1YwVMLUenjAct7orP8Fysn3R/7pAmn9P4yV/lhKKmZ", "X-Developer-Key": "i=fe@dev.tdt.de; a=ed25519;\n pk=q7Pvv3Au2sAVRhBz5UF7ZqUPNxUwXQ78Jdqu8E6Negk=", "Content-Transfer-Encoding": "quoted-printable", "X-purgate-ID": "151534::1774861651-EEC25842-DDEDDA82/0/0", "X-purgate": "clean", "X-purgate-type": "clean" }, "content": "To improve the readability of the code, move the interrupt enable\ninstructions to a separate function. That is already done for the disable\ninterrupt instruction.\n\nIn addtion, all pending interrupts are cleared and disabled, just as this\nis done in the disable function 'intel_pcie_core_irq_disable()'. After\nthat, all relevant interrupts are enabled again. The 'PCIE_APP_IRNEN'\ndefinition contains all the relevant interrupts that are of interest.\n\nThis change is also done in the Maxlinear SDK [1]. As I unfortunately\ndon’t have any documentation for this IP core, I suspect that the\nintention is to set the IP core for interrupt handling to a specific\nstate. Perhaps the problem was that the IP core did not reinitialize the\ninterrupt register properly after a power cycle.\n\nIn my view, it can’t do any harm to switch the interrupt off and then on\nagain to set them to a specific state.\n\n[1] https://github.com/maxlinear/linux/blob/updk_9.1.90/drivers/pci/controller/dwc/pcie-intel-gw.c#L431\n\nSigned-off-by: Florian Eckert <fe@dev.tdt.de>\n---\n drivers/pci/controller/dwc/pcie-intel-gw.c | 11 ++++++++---\n 1 file changed, 8 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c\nindex 80d1607c46cbbb1e274b37a0bb9377a877678f5d..e88b8243cc41c607c39e4d58c4dcd8c8c082e8b0 100644\n--- a/drivers/pci/controller/dwc/pcie-intel-gw.c\n+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c\n@@ -195,6 +195,13 @@ static void intel_pcie_device_rst_deassert(struct intel_pcie *pcie)\n \tgpiod_set_value_cansleep(pcie->reset_gpio, 0);\n }\n \n+static void intel_pcie_core_irq_enable(struct intel_pcie *pcie)\n+{\n+\tpcie_app_wr(pcie, PCIE_APP_IRNEN, 0);\n+\tpcie_app_wr(pcie, PCIE_APP_IRNCR, PCIE_APP_IRN_INT);\n+\tpcie_app_wr(pcie, PCIE_APP_IRNEN, PCIE_APP_IRN_INT);\n+}\n+\n static void intel_pcie_core_irq_disable(struct intel_pcie *pcie)\n {\n \tpcie_app_wr(pcie, PCIE_APP_IRNEN, 0);\n@@ -316,9 +323,7 @@ static int intel_pcie_host_setup(struct intel_pcie *pcie)\n \tif (ret)\n \t\tgoto app_init_err;\n \n-\t/* Enable integrated interrupts */\n-\tpcie_app_wr_mask(pcie, PCIE_APP_IRNEN, PCIE_APP_IRN_INT,\n-\t\t\t PCIE_APP_IRN_INT);\n+\tintel_pcie_core_irq_enable(pcie);\n \n \treturn 0;\n \n", "prefixes": [ "v2", "2/7" ] }