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GET /api/patches/2217524/?format=api
{ "id": 2217524, "url": "http://patchwork.ozlabs.org/api/patches/2217524/?format=api", "web_url": "http://patchwork.ozlabs.org/project/ubuntu-kernel/patch/20260330041623.2334058-4-chris.chiu@canonical.com/", "project": { "id": 15, "url": "http://patchwork.ozlabs.org/api/projects/15/?format=api", "name": "Ubuntu Kernel", "link_name": "ubuntu-kernel", "list_id": "kernel-team.lists.ubuntu.com", "list_email": "kernel-team@lists.ubuntu.com", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260330041623.2334058-4-chris.chiu@canonical.com>", "list_archive_url": null, "date": "2026-03-30T04:16:16", "name": "[SRU,R,3/4] mfd: cs42l43: Add support for the B variant", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "598ccc6936b6b4aea37feb21d0908a6b578e08bd", "submitter": { "id": 81418, "url": "http://patchwork.ozlabs.org/api/people/81418/?format=api", "name": "Chris Chiu", "email": "chris.chiu@canonical.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/ubuntu-kernel/patch/20260330041623.2334058-4-chris.chiu@canonical.com/mbox/", "series": [ { "id": 497947, "url": "http://patchwork.ozlabs.org/api/series/497947/?format=api", "web_url": "http://patchwork.ozlabs.org/project/ubuntu-kernel/list/?series=497947", "date": "2026-03-30T04:16:13", "name": "[SRU,R,1/4] ASoC: sdw_utils: Add CS42L43B codec info", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497947/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217524/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217524/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<kernel-team-bounces@lists.ubuntu.com>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (4096-bit key;\n unprotected) header.d=canonical.com header.i=@canonical.com\n header.a=rsa-sha256 header.s=20251003 header.b=LslryO6I;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com\n (client-ip=185.125.189.65; helo=lists.ubuntu.com;\n envelope-from=kernel-team-bounces@lists.ubuntu.com;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fkdHG0g2Bz1yGk\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 30 Mar 2026 15:16:41 +1100 (AEDT)", "from localhost ([127.0.0.1] helo=lists.ubuntu.com)\n\tby lists.ubuntu.com with esmtp (Exim 4.86_2)\n\t(envelope-from <kernel-team-bounces@lists.ubuntu.com>)\n\tid 1w743G-0000l1-PM; Mon, 30 Mar 2026 04:16:34 +0000", "from smtp-relay-internal-0.internal ([10.131.114.225]\n helo=smtp-relay-internal-0.canonical.com)\n by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.86_2) (envelope-from <chris.chiu@canonical.com>)\n id 1w743E-0000jq-5Y\n for kernel-team@lists.ubuntu.com; Mon, 30 Mar 2026 04:16:32 +0000", "from mail-pg1-f200.google.com (mail-pg1-f200.google.com\n [209.85.215.200])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id D0F573F167\n for <kernel-team@lists.ubuntu.com>; Mon, 30 Mar 2026 04:16:31 +0000 (UTC)", "by mail-pg1-f200.google.com with SMTP id\n 41be03b00d2f7-c769cb60d7dso341025a12.1\n for <kernel-team@lists.ubuntu.com>; Sun, 29 Mar 2026 21:16:31 -0700 (PDT)", "from localhost.. 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2002:a05:6a00:4fd5:b0:824:b181:f492 with SMTP id\n d2e1a72fcca58-82c9609c84cmr10363901b3a.45.1774844189513;\n Sun, 29 Mar 2026 21:16:29 -0700 (PDT)" ], "From": "Chris Chiu <chris.chiu@canonical.com>", "To": "kernel-team@lists.ubuntu.com", "Subject": "[SRU][R][PATCH 3/4] mfd: cs42l43: Add support for the B variant", "Date": "Mon, 30 Mar 2026 04:16:16 +0000", "Message-ID": "<20260330041623.2334058-4-chris.chiu@canonical.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260330041623.2334058-1-chris.chiu@canonical.com>", "References": "<20260330041623.2334058-1-chris.chiu@canonical.com>", "MIME-Version": "1.0", "X-BeenThere": "kernel-team@lists.ubuntu.com", "X-Mailman-Version": "2.1.20", "Precedence": "list", "List-Id": "Kernel team discussions <kernel-team.lists.ubuntu.com>", "List-Unsubscribe": "<https://lists.ubuntu.com/mailman/options/kernel-team>,\n <mailto:kernel-team-request@lists.ubuntu.com?subject=unsubscribe>", "List-Archive": "<https://lists.ubuntu.com/archives/kernel-team>", "List-Post": "<mailto:kernel-team@lists.ubuntu.com>", "List-Help": "<mailto:kernel-team-request@lists.ubuntu.com?subject=help>", "List-Subscribe": "<https://lists.ubuntu.com/mailman/listinfo/kernel-team>,\n <mailto:kernel-team-request@lists.ubuntu.com?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "kernel-team-bounces@lists.ubuntu.com", "Sender": "\"kernel-team\" <kernel-team-bounces@lists.ubuntu.com>" }, "content": "From: Maciej Strozek <mstrozek@opensource.cirrus.com>\n\nBugLink: https://bugs.launchpad.net/bugs/2143301\n\nIntroducing CS42L43B codec, a variant of CS42L43 which can be driven by\nthe same driver.\n\nChanges in CS42L43 driver specific for CS42L43B:\n- Decimator 1 and 2 are dedicated to ADC, can't be selected for PDM\n- Decimators 3 and 4 are connected to PDM1\n- Added Decimator 5 and 6 for PDM2\n- Supports SoundWire Clock Gearing\n- Updated ROM requiring no patching\n- Reduced RAM space\n- Each ISRC has 4 decimators now\n\nSigned-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com>\nAcked-by: Lee Jones <lee@kernel.org>\nReviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>\nLink: https://patch.msgid.link/20260306152829.3130530-4-mstrozek@opensource.cirrus.com\nSigned-off-by: Mark Brown <broonie@kernel.org>\n(cherry picked from commit a6fe20d67dc7d512f9b5dc11c5777fb1e1ff70ce linux-next)\nSigned-off-by: Chris Chiu <chris.chiu@canonical.com>\n---\n drivers/mfd/cs42l43-i2c.c | 7 ++-\n drivers/mfd/cs42l43-sdw.c | 4 +-\n drivers/mfd/cs42l43.c | 93 +++++++++++++++++++++++++++-----\n drivers/mfd/cs42l43.h | 2 +-\n include/linux/mfd/cs42l43-regs.h | 76 ++++++++++++++++++++++++++\n include/linux/mfd/cs42l43.h | 1 +\n 6 files changed, 166 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/mfd/cs42l43-i2c.c b/drivers/mfd/cs42l43-i2c.c\nindex a2ab001a600a..0a0ab5e549a5 100644\n--- a/drivers/mfd/cs42l43-i2c.c\n+++ b/drivers/mfd/cs42l43-i2c.c\n@@ -47,6 +47,7 @@ static int cs42l43_i2c_probe(struct i2c_client *i2c)\n \tcs42l43->irq = i2c->irq;\n \t/* A device on an I2C is always attached by definition. */\n \tcs42l43->attached = true;\n+\tcs42l43->variant_id = (long)device_get_match_data(cs42l43->dev);\n \n \tcs42l43->regmap = devm_regmap_init_i2c(i2c, &cs42l43_i2c_regmap);\n \tif (IS_ERR(cs42l43->regmap))\n@@ -58,7 +59,8 @@ static int cs42l43_i2c_probe(struct i2c_client *i2c)\n \n #if IS_ENABLED(CONFIG_OF)\n static const struct of_device_id cs42l43_of_match[] = {\n-\t{ .compatible = \"cirrus,cs42l43\", },\n+\t{ .compatible = \"cirrus,cs42l43\", .data = (void *)CS42L43_DEVID_VAL },\n+\t{ .compatible = \"cirrus,cs42l43b\", .data = (void *)CS42L43B_DEVID_VAL },\n \t{}\n };\n MODULE_DEVICE_TABLE(of, cs42l43_of_match);\n@@ -66,7 +68,8 @@ MODULE_DEVICE_TABLE(of, cs42l43_of_match);\n \n #if IS_ENABLED(CONFIG_ACPI)\n static const struct acpi_device_id cs42l43_acpi_match[] = {\n-\t{ \"CSC4243\", 0 },\n+\t{ \"CSC4243\", CS42L43_DEVID_VAL },\n+\t{ \"CSC2A3B\", CS42L43B_DEVID_VAL },\n \t{}\n };\n MODULE_DEVICE_TABLE(acpi, cs42l43_acpi_match);\ndiff --git a/drivers/mfd/cs42l43-sdw.c b/drivers/mfd/cs42l43-sdw.c\nindex 023f7e1a30f8..794c98378175 100644\n--- a/drivers/mfd/cs42l43-sdw.c\n+++ b/drivers/mfd/cs42l43-sdw.c\n@@ -178,6 +178,7 @@ static int cs42l43_sdw_probe(struct sdw_slave *sdw, const struct sdw_device_id *\n \n \tcs42l43->dev = dev;\n \tcs42l43->sdw = sdw;\n+\tcs42l43->variant_id = (long)id->driver_data;\n \n \tcs42l43->regmap = devm_regmap_init_sdw(sdw, &cs42l43_sdw_regmap);\n \tif (IS_ERR(cs42l43->regmap))\n@@ -188,7 +189,8 @@ static int cs42l43_sdw_probe(struct sdw_slave *sdw, const struct sdw_device_id *\n }\n \n static const struct sdw_device_id cs42l43_sdw_id[] = {\n-\tSDW_SLAVE_ENTRY(0x01FA, 0x4243, 0),\n+\tSDW_SLAVE_ENTRY(0x01FA, 0x4243, (void *) CS42L43_DEVID_VAL),\n+\tSDW_SLAVE_ENTRY(0x01FA, 0x2A3B, (void *) CS42L43B_DEVID_VAL),\n \t{}\n };\n MODULE_DEVICE_TABLE(sdw, cs42l43_sdw_id);\ndiff --git a/drivers/mfd/cs42l43.c b/drivers/mfd/cs42l43.c\nindex 107cfb983fec..166881751e69 100644\n--- a/drivers/mfd/cs42l43.c\n+++ b/drivers/mfd/cs42l43.c\n@@ -115,9 +115,14 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {\n \t{ CS42L43_DECIM_HPF_WNF_CTRL2,\t\t\t0x00000001 },\n \t{ CS42L43_DECIM_HPF_WNF_CTRL3,\t\t\t0x00000001 },\n \t{ CS42L43_DECIM_HPF_WNF_CTRL4,\t\t\t0x00000001 },\n+\t{ CS42L43B_DECIM_HPF_WNF_CTRL5,\t\t\t0x00000001 },\n+\t{ CS42L43B_DECIM_HPF_WNF_CTRL6,\t\t\t0x00000001 },\n \t{ CS42L43_DMIC_PDM_CTRL,\t\t\t0x00000000 },\n \t{ CS42L43_DECIM_VOL_CTRL_CH1_CH2,\t\t0x20122012 },\n \t{ CS42L43_DECIM_VOL_CTRL_CH3_CH4,\t\t0x20122012 },\n+\t{ CS42L43B_DECIM_VOL_CTRL_CH1_CH2,\t\t0x20122012 },\n+\t{ CS42L43B_DECIM_VOL_CTRL_CH3_CH4,\t\t0x20122012 },\n+\t{ CS42L43B_DECIM_VOL_CTRL_CH5_CH6,\t\t0x20122012 },\n \t{ CS42L43_INTP_VOLUME_CTRL1,\t\t\t0x00000180 },\n \t{ CS42L43_INTP_VOLUME_CTRL2,\t\t\t0x00000180 },\n \t{ CS42L43_AMP1_2_VOL_RAMP,\t\t\t0x00000022 },\n@@ -155,8 +160,12 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {\n \t{ CS42L43_SWIRE_DP2_CH2_INPUT,\t\t\t0x00000000 },\n \t{ CS42L43_SWIRE_DP3_CH1_INPUT,\t\t\t0x00000000 },\n \t{ CS42L43_SWIRE_DP3_CH2_INPUT,\t\t\t0x00000000 },\n+\t{ CS42L43B_SWIRE_DP3_CH3_INPUT,\t\t\t0x00000000 },\n+\t{ CS42L43B_SWIRE_DP3_CH4_INPUT,\t\t\t0x00000000 },\n \t{ CS42L43_SWIRE_DP4_CH1_INPUT,\t\t\t0x00000000 },\n \t{ CS42L43_SWIRE_DP4_CH2_INPUT,\t\t\t0x00000000 },\n+\t{ CS42L43B_SWIRE_DP4_CH3_INPUT,\t\t\t0x00000000 },\n+\t{ CS42L43B_SWIRE_DP4_CH4_INPUT,\t\t\t0x00000000 },\n \t{ CS42L43_ASRC_INT1_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ASRC_INT2_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ASRC_INT3_INPUT1,\t\t\t0x00000000 },\n@@ -169,10 +178,14 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = {\n \t{ CS42L43_ISRC1INT2_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ISRC1DEC1_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ISRC1DEC2_INPUT1,\t\t\t0x00000000 },\n+\t{ CS42L43B_ISRC1DEC3_INPUT1,\t\t\t0x00000000 },\n+\t{ CS42L43B_ISRC1DEC4_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ISRC2INT1_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ISRC2INT2_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ISRC2DEC1_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_ISRC2DEC2_INPUT1,\t\t\t0x00000000 },\n+\t{ CS42L43B_ISRC2DEC3_INPUT1,\t\t\t0x00000000 },\n+\t{ CS42L43B_ISRC2DEC4_INPUT1,\t\t\t0x00000000 },\n \t{ CS42L43_EQ1MIX_INPUT1,\t\t\t0x00800000 },\n \t{ CS42L43_EQ1MIX_INPUT2,\t\t\t0x00800000 },\n \t{ CS42L43_EQ1MIX_INPUT3,\t\t\t0x00800000 },\n@@ -269,6 +282,8 @@ EXPORT_SYMBOL_NS_GPL(cs42l43_reg_default, \"MFD_CS42L43\");\n \n bool cs42l43_readable_register(struct device *dev, unsigned int reg)\n {\n+\tstruct cs42l43 *cs42l43 = dev_get_drvdata(dev);\n+\n \tswitch (reg) {\n \tcase CS42L43_DEVID:\n \tcase CS42L43_REVID:\n@@ -292,7 +307,6 @@ bool cs42l43_readable_register(struct device *dev, unsigned int reg)\n \tcase CS42L43_ADC_B_CTRL1 ... CS42L43_ADC_B_CTRL2:\n \tcase CS42L43_DECIM_HPF_WNF_CTRL1 ... CS42L43_DECIM_HPF_WNF_CTRL4:\n \tcase CS42L43_DMIC_PDM_CTRL:\n-\tcase CS42L43_DECIM_VOL_CTRL_CH1_CH2 ... CS42L43_DECIM_VOL_CTRL_CH3_CH4:\n \tcase CS42L43_INTP_VOLUME_CTRL1 ... CS42L43_INTP_VOLUME_CTRL2:\n \tcase CS42L43_AMP1_2_VOL_RAMP:\n \tcase CS42L43_ASP_CTRL:\n@@ -387,8 +401,16 @@ bool cs42l43_readable_register(struct device *dev, unsigned int reg)\n \tcase CS42L43_BOOT_CONTROL:\n \tcase CS42L43_BLOCK_EN:\n \tcase CS42L43_SHUTTER_CONTROL:\n-\tcase CS42L43_MCU_SW_REV ... CS42L43_MCU_RAM_MAX:\n-\t\treturn true;\n+\tcase CS42L43B_MCU_SW_REV ... CS42L43B_MCU_RAM_MAX:\n+\t\treturn true; // registers present on all variants\n+\tcase CS42L43_MCU_SW_REV ... CS42L43B_MCU_SW_REV - 1:\n+\tcase CS42L43B_MCU_RAM_MAX + 1 ... CS42L43_MCU_RAM_MAX:\n+\tcase CS42L43_DECIM_VOL_CTRL_CH1_CH2 ... CS42L43_DECIM_VOL_CTRL_CH3_CH4:\n+\t\treturn cs42l43->variant_id == CS42L43_DEVID_VAL; // regs only in CS42L43 variant\n+\tcase CS42L43B_DECIM_VOL_CTRL_CH1_CH2 ... CS42L43B_DECIM_HPF_WNF_CTRL6:\n+\tcase CS42L43B_SWIRE_DP3_CH3_INPUT ... CS42L43B_SWIRE_DP4_CH4_INPUT:\n+\tcase CS42L43B_ISRC1DEC3_INPUT1 ... CS42L43B_ISRC2DEC4_INPUT1:\n+\t\treturn cs42l43->variant_id == CS42L43B_DEVID_VAL; // regs only in CS42L43B variant\n \tdefault:\n \t\treturn false;\n \t}\n@@ -597,15 +619,27 @@ static int cs42l43_wait_for_attach(struct cs42l43 *cs42l43)\n static int cs42l43_mcu_stage_2_3(struct cs42l43 *cs42l43, bool shadow)\n {\n \tunsigned int need_reg = CS42L43_NEED_CONFIGS;\n+\tunsigned int boot_reg;\n \tunsigned int val;\n \tint ret;\n \n-\tif (shadow)\n-\t\tneed_reg = CS42L43_FW_SH_BOOT_CFG_NEED_CONFIGS;\n+\tswitch (cs42l43->variant_id) {\n+\tcase CS42L43_DEVID_VAL:\n+\t\tif (shadow)\n+\t\t\tneed_reg = CS42L43_FW_SH_BOOT_CFG_NEED_CONFIGS;\n+\t\tboot_reg = CS42L43_BOOT_STATUS;\n+\t\tbreak;\n+\tcase CS42L43B_DEVID_VAL:\n+\t\tneed_reg = CS42L43B_NEED_CONFIGS;\n+\t\tboot_reg = CS42L43B_BOOT_STATUS;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n \n \tregmap_write(cs42l43->regmap, need_reg, 0);\n \n-\tret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_BOOT_STATUS,\n+\tret = regmap_read_poll_timeout(cs42l43->regmap, boot_reg,\n \t\t\t\t val, (val == CS42L43_MCU_BOOT_STAGE3),\n \t\t\t\t CS42L43_MCU_POLL_US, CS42L43_MCU_CMD_TIMEOUT_US);\n \tif (ret) {\n@@ -644,13 +678,25 @@ static int cs42l43_mcu_stage_3_2(struct cs42l43 *cs42l43)\n */\n static int cs42l43_mcu_disable(struct cs42l43 *cs42l43)\n {\n-\tunsigned int val;\n+\tunsigned int val, cfg_reg, ctrl_reg;\n \tint ret;\n \n-\tregmap_write(cs42l43->regmap, CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_REG,\n-\t\t CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_DISABLE_VAL);\n-\tregmap_write(cs42l43->regmap, CS42L43_FW_MISSION_CTRL_MM_CTRL_SELECTION,\n-\t\t CS42L43_FW_MM_CTRL_MCU_SEL_MASK);\n+\tswitch (cs42l43->variant_id) {\n+\tcase CS42L43_DEVID_VAL:\n+\t\tcfg_reg = CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_REG;\n+\t\tctrl_reg = CS42L43_FW_MISSION_CTRL_MM_CTRL_SELECTION;\n+\t\tbreak;\n+\tcase CS42L43B_DEVID_VAL:\n+\t\tcfg_reg = CS42L43B_FW_MISSION_CTRL_MM_MCU_CFG_REG;\n+\t\tctrl_reg = CS42L43B_FW_MISSION_CTRL_MM_CTRL_SELECTION;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tregmap_write(cs42l43->regmap, cfg_reg, CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_DISABLE_VAL);\n+\tregmap_write(cs42l43->regmap, ctrl_reg, CS42L43_FW_MM_CTRL_MCU_SEL_MASK);\n+\n \tregmap_write(cs42l43->regmap, CS42L43_MCU_SW_INTERRUPT, CS42L43_CONTROL_IND_MASK);\n \tregmap_write(cs42l43->regmap, CS42L43_MCU_SW_INTERRUPT, 0);\n \n@@ -740,18 +786,32 @@ static int cs42l43_mcu_update_step(struct cs42l43 *cs42l43)\n {\n \tunsigned int mcu_rev, bios_rev, boot_status, secure_cfg;\n \tbool patched, shadow;\n+\tint boot_status_reg, mcu_sw_rev_reg;\n \tint ret;\n \n+\tswitch (cs42l43->variant_id) {\n+\tcase CS42L43_DEVID_VAL:\n+\t\tboot_status_reg = CS42L43_BOOT_STATUS;\n+\t\tmcu_sw_rev_reg = CS42L43_MCU_SW_REV;\n+\t\tbreak;\n+\tcase CS42L43B_DEVID_VAL:\n+\t\tboot_status_reg = CS42L43B_BOOT_STATUS;\n+\t\tmcu_sw_rev_reg = CS42L43B_MCU_SW_REV;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n \t/* Clear any stale software interrupt bits. */\n \tregmap_read(cs42l43->regmap, CS42L43_SOFT_INT, &mcu_rev);\n \n-\tret = regmap_read(cs42l43->regmap, CS42L43_BOOT_STATUS, &boot_status);\n+\tret = regmap_read(cs42l43->regmap, boot_status_reg, &boot_status);\n \tif (ret) {\n \t\tdev_err(cs42l43->dev, \"Failed to read boot status: %d\\n\", ret);\n \t\treturn ret;\n \t}\n \n-\tret = regmap_read(cs42l43->regmap, CS42L43_MCU_SW_REV, &mcu_rev);\n+\tret = regmap_read(cs42l43->regmap, mcu_sw_rev_reg, &mcu_rev);\n \tif (ret) {\n \t\tdev_err(cs42l43->dev, \"Failed to read firmware revision: %d\\n\", ret);\n \t\treturn ret;\n@@ -918,6 +978,13 @@ static void cs42l43_boot_work(struct work_struct *work)\n \n \tswitch (devid) {\n \tcase CS42L43_DEVID_VAL:\n+\tcase CS42L43B_DEVID_VAL:\n+\t\tif (devid != cs42l43->variant_id) {\n+\t\t\tdev_err(cs42l43->dev,\n+\t\t\t\t\"Device ID (0x%06x) does not match variant ID (0x%06lx)\\n\",\n+\t\t\t\tdevid, cs42l43->variant_id);\n+\t\t\tgoto err;\n+\t\t}\n \t\tbreak;\n \tdefault:\n \t\tdev_err(cs42l43->dev, \"Unrecognised devid: 0x%06x\\n\", devid);\ndiff --git a/drivers/mfd/cs42l43.h b/drivers/mfd/cs42l43.h\nindex f3da783930f5..a0068f6572e2 100644\n--- a/drivers/mfd/cs42l43.h\n+++ b/drivers/mfd/cs42l43.h\n@@ -9,7 +9,7 @@\n #ifndef CS42L43_CORE_INT_H\n #define CS42L43_CORE_INT_H\n \n-#define CS42L43_N_DEFAULTS 176\n+#define CS42L43_N_DEFAULTS 189\n \n struct dev_pm_ops;\n struct device;\ndiff --git a/include/linux/mfd/cs42l43-regs.h b/include/linux/mfd/cs42l43-regs.h\nindex c39a49269cb7..68831f113589 100644\n--- a/include/linux/mfd/cs42l43-regs.h\n+++ b/include/linux/mfd/cs42l43-regs.h\n@@ -1181,4 +1181,80 @@\n /* CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_REG */\n #define CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_DISABLE_VAL\t\t0xF05AA50F\n \n+/* CS42L43B VARIANT REGISTERS */\n+#define CS42L43B_DEVID_VAL\t\t\t\t\t0x0042A43B\n+\n+#define CS42L43B_DECIM_VOL_CTRL_CH1_CH2\t\t\t\t0x00008280\n+#define CS42L43B_DECIM_VOL_CTRL_CH3_CH4\t\t\t\t0x00008284\n+\n+#define CS42L43B_DECIM_VOL_CTRL_CH5_CH6\t\t\t\t0x00008290\n+#define CS42L43B_DECIM_VOL_CTRL_UPDATE\t\t\t\t0x0000829C\n+\n+#define CS42L43B_DECIM_HPF_WNF_CTRL5\t\t\t\t0x000082A0\n+#define CS42L43B_DECIM_HPF_WNF_CTRL6\t\t\t\t0x000082A4\n+\n+#define CS42L43B_SWIRE_DP3_CH3_INPUT\t\t\t\t0x0000C320\n+#define CS42L43B_SWIRE_DP3_CH4_INPUT\t\t\t\t0x0000C330\n+#define CS42L43B_SWIRE_DP4_CH3_INPUT\t\t\t\t0x0000C340\n+#define CS42L43B_SWIRE_DP4_CH4_INPUT\t\t\t\t0x0000C350\n+\n+#define CS42L43B_ISRC1DEC3_INPUT1\t\t\t\t0x0000C780\n+#define CS42L43B_ISRC1DEC4_INPUT1\t\t\t\t0x0000C790\n+#define CS42L43B_ISRC2DEC3_INPUT1\t\t\t\t0x0000C7A0\n+#define CS42L43B_ISRC2DEC4_INPUT1\t\t\t\t0x0000C7B0\n+\n+#define CS42L43B_FW_MISSION_CTRL_NEED_CONFIGS\t\t\t0x00117E00\n+#define CS42L43B_FW_MISSION_CTRL_HAVE_CONFIGS\t\t\t0x00117E04\n+#define CS42L43B_FW_MISSION_CTRL_PATCH_START_ADDR_REG\t\t0x00117E08\n+#define CS42L43B_FW_MISSION_CTRL_MM_CTRL_SELECTION\t\t0x00117E0C\n+#define CS42L43B_FW_MISSION_CTRL_MM_MCU_CFG_REG\t\t\t0x00117E10\n+\n+#define CS42L43B_MCU_SW_REV\t\t\t\t\t0x00117314\n+#define CS42L43B_PATCH_START_ADDR\t\t\t\t0x00117318\n+#define CS42L43B_CONFIG_SELECTION\t\t\t\t0x0011731C\n+#define CS42L43B_NEED_CONFIGS\t\t\t\t\t0x00117320\n+#define CS42L43B_BOOT_STATUS\t\t\t\t\t0x00117330\n+\n+#define CS42L43B_FW_MISSION_CTRL_NEED_CONFIGS\t\t\t0x00117E00\n+#define CS42L43B_FW_MISSION_CTRL_HAVE_CONFIGS\t\t\t0x00117E04\n+#define CS42L43B_FW_MISSION_CTRL_PATCH_START_ADDR_REG\t\t0x00117E08\n+#define CS42L43B_FW_MISSION_CTRL_MM_CTRL_SELECTION\t\t0x00117E0C\n+#define CS42L43B_FW_MISSION_CTRL_MM_MCU_CFG_REG\t\t\t0x00117E10\n+\n+#define CS42L43B_MCU_RAM_MAX\t\t\t\t\t0x00117FFF\n+\n+/* CS42L43B_DECIM_DECIM_VOL_CTRL_CH5_CH6 */\n+#define CS42L43B_DECIM6_MUTE_MASK\t\t\t\t0x80000000\n+#define CS42L43B_DECIM6_MUTE_SHIFT\t\t\t\t31\n+#define CS42L43B_DECIM6_VOL_MASK\t\t\t\t0x3FC00000\n+#define CS42L43B_DECIM6_VOL_SHIFT\t\t\t\t22\n+#define CS42L43B_DECIM6_PATH1_VOL_FALL_RATE_MASK\t\t0x00380000\n+#define CS42L43B_DECIM6_PATH1_VOL_FALL_RATE_SHIFT\t\t19\n+#define CS42L43B_DECIM6_PATH1_VOL_RISE_RATE_MASK\t\t0x00070000\n+#define CS42L43B_DECIM6_PATH1_VOL_RISE_RATE_SHIFT\t\t16\n+#define CS42L43B_DECIM5_MUTE_MASK\t\t\t\t0x00008000\n+#define CS42L43B_DECIM5_MUTE_SHIFT\t\t\t\t15\n+#define CS42L43B_DECIM5_VOL_MASK\t\t\t\t0x00003FC0\n+#define CS42L43B_DECIM5_VOL_SHIFT\t\t\t\t6\n+#define CS42L43B_DECIM5_PATH1_VOL_FALL_RATE_MASK\t\t0x00000038\n+#define CS42L43B_DECIM5_PATH1_VOL_FALL_RATE_SHIFT\t\t3\n+#define CS42L43B_DECIM5_PATH1_VOL_RISE_RATE_MASK\t\t0x00000007\n+#define CS42L43B_DECIM5_PATH1_VOL_RISE_RATE_SHIFT\t\t0\n+\n+/* CS42L43B_DECIM_VOL_CTRL_UPDATE */\n+#define CS42L43B_DECIM6_PATH1_VOL_TRIG_MASK\t\t\t0x00000800\n+#define CS42L43B_DECIM6_PATH1_VOL_TRIG_SHIFT\t\t\t11\n+#define CS42L43B_DECIM5_PATH1_VOL_TRIG_MASK\t\t\t0x00000100\n+#define CS42L43B_DECIM5_PATH1_VOL_TRIG_SHIFT\t\t\t8\n+#define CS42L43B_DECIM4_VOL_UPDATE_MASK\t\t\t\t0x00000020\n+#define CS42L43B_DECIM4_VOL_UPDATE_SHIFT\t\t\t5\n+\n+/* CS42L43_ISRC1_CTRL..CS42L43_ISRC2_CTRL */\n+#define CS42L43B_ISRC_DEC4_EN_MASK\t\t\t\t0x00000008\n+#define CS42L43B_ISRC_DEC4_EN_SHIFT\t\t\t\t3\n+#define CS42L43B_ISRC_DEC4_EN_WIDTH\t\t\t\t1\n+#define CS42L43B_ISRC_DEC3_EN_MASK\t\t\t\t0x00000004\n+#define CS42L43B_ISRC_DEC3_EN_SHIFT\t\t\t\t2\n+#define CS42L43B_ISRC_DEC3_EN_WIDTH\t\t\t\t1\n+\n #endif /* CS42L43_CORE_REGS_H */\ndiff --git a/include/linux/mfd/cs42l43.h b/include/linux/mfd/cs42l43.h\nindex 2239d8585e78..ff0f7e365a19 100644\n--- a/include/linux/mfd/cs42l43.h\n+++ b/include/linux/mfd/cs42l43.h\n@@ -98,6 +98,7 @@ struct cs42l43 {\n \tbool sdw_pll_active;\n \tbool attached;\n \tbool hw_lock;\n+\tlong variant_id;\n };\n \n #endif /* CS42L43_CORE_EXT_H */\n", "prefixes": [ "SRU", "R", "3/4" ] }