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GET /api/patches/2217450/?format=api
{ "id": 2217450, "url": "http://patchwork.ozlabs.org/api/patches/2217450/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260329090601.532477-2-o.rempel@pengutronix.de/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260329090601.532477-2-o.rempel@pengutronix.de>", "list_archive_url": null, "date": "2026-03-29T09:05:56", "name": "[v8,1/6] dt-bindings: pinctrl: add NXP MC33978/MC34978 MSDI", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "29d39229243682e03fae37c5733a00a99c54af9e", "submitter": { "id": 71360, "url": "http://patchwork.ozlabs.org/api/people/71360/?format=api", "name": "Oleksij Rempel", "email": "o.rempel@pengutronix.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260329090601.532477-2-o.rempel@pengutronix.de/mbox/", "series": [ { "id": 497911, "url": "http://patchwork.ozlabs.org/api/series/497911/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497911", "date": "2026-03-29T09:05:56", "name": "mfd: Add support for NXP MC33978/MC34978 MSDI", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/497911/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217450/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217450/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34360-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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Sun, 29 Mar 2026 09:06:31 +0000 (UTC)", "from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2])\n\tby metis.whiteo.stw.pengutronix.de with esmtps\n (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256)\n\t(Exim 4.92)\n\t(envelope-from <ore@pengutronix.de>)\n\tid 1w6m5s-00018r-0v; Sun, 29 Mar 2026 11:06:04 +0200", "from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac]\n helo=dude04)\n\tby drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls\n TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384\n\t(Exim 4.96)\n\t(envelope-from <ore@pengutronix.de>)\n\tid 1w6m5q-002gZR-31;\n\tSun, 29 Mar 2026 11:06:02 +0200", "from ore by dude04 with local (Exim 4.98.2)\n\t(envelope-from <ore@pengutronix.de>)\n\tid 1w6m5q-00000002EXe-3dS7;\n\tSun, 29 Mar 2026 11:06:02 +0200" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774775195; cv=none;\n b=Oc73K3n5E0EIBzImWLDds6LTu76rzsQ1ivV4hGYmv8N+steQuvxmHmsBjkoq32xCNkNHjDspnE/Tw2abWcA+rYdYoIqzbZRoCddAGYMYLyX/TnpYiIql8+gQvsJwWx95xFAp12igd9PfRBF3BzwhDhMzV8gU7M5HpvRNxHgN7g0=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774775195; c=relaxed/simple;\n\tbh=kD29UKifGzJQO3leEV+lvCdPV1UQ9X6E3FgG5zeef1M=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=UXxY3eVPqIDkht4Rm5YPWBLUsTBDMmA2U7288NMzrAhiz6shYYKVOvN/akxIYGcjA1SQ0ly0O+XcXE1ipx3VPkzfHWU0Gxqq+JLM8DlyFFekuzKRoD+2L8vjHmeIALf365NoG2xdxZuE+32ATjJkrHOYWTSa6qNh/Jx21p+Vqkg=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=pengutronix.de;\n spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7", "From": "Oleksij Rempel <o.rempel@pengutronix.de>", "To": "Guenter Roeck <linux@roeck-us.net>,\n\tRob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tLee Jones <lee@kernel.org>,\n\tPeter Rosin <peda@axentia.se>,\n\tLinus Walleij <linusw@kernel.org>", "Cc": "Oleksij Rempel <o.rempel@pengutronix.de>,\n\tkernel@pengutronix.de,\n\tlinux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-hwmon@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tDavid Jander <david@protonic.nl>", "Subject": "[PATCH v8 1/6] dt-bindings: pinctrl: add NXP MC33978/MC34978 MSDI", "Date": "Sun, 29 Mar 2026 11:05:56 +0200", "Message-ID": "<20260329090601.532477-2-o.rempel@pengutronix.de>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260329090601.532477-1-o.rempel@pengutronix.de>", "References": "<20260329090601.532477-1-o.rempel@pengutronix.de>", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-SA-Exim-Connect-IP": "2a0a:edc0:0:c01:1d::a2", "X-SA-Exim-Mail-From": "ore@pengutronix.de", "X-SA-Exim-Scanned": "No (on metis.whiteo.stw.pengutronix.de);\n SAEximRunCond expanded to false", "X-PTX-Original-Recipient": "linux-gpio@vger.kernel.org" }, "content": "Add device tree binding documentation for the NXP MC33978 and MC34978\nMultiple Switch Detection Interface (MSDI) devices.\n\nThe MC33978 and MC34978 differ primarily in their operating temperature\nranges. While not software-detectable, providing specific compatible\nstrings allows the hwmon subsystem to correctly interpret thermal\nthresholds and hardware faults.\n\nThese ICs monitor up to 22 mechanical switch contacts in automotive and\nindustrial environments. They provide configurable wetting currents to\nbreak through contact oxidation and feature extensive hardware\nprotection against thermal overload and voltage transients (load\ndumps/brown-outs).\n\nThe device interfaces via SPI. While it provides multiple functions, its\nprimary hardware purpose is pin/switch control. To accurately represent\nthe hardware as a single physical integrated circuit without unnecessary\nDT overhead, all functions are flattened into a single pinctrl node:\n- pinctrl: Exposing the 22 switch inputs (SG/SP pins) as a GPIO controller\n and managing their pin configurations.\n- hwmon: Exposing critical hardware faults (OT, OV, UV) and static\n voltage/temperature thresholds.\n- mux: Controlling the 24-to-1 analog multiplexer to route pin voltages,\n internal temperature, or battery voltage to an external SoC ADC.\n\nSigned-off-by: Oleksij Rempel <o.rempel@pengutronix.de>\nReviewed-by: Rob Herring (Arm) <robh@kernel.org>\nReviewed-by: Linus Walleij <linusw@kernel.org>\n---\nchanges v8:\n- Update IRQ_TYPE_* macros include path reference in documentation from\n interrupt-controller.h to dt-bindings/interrupt-controller/irq.h.\n- Add bias-disable, drive-open-drain, drive-open-source, and drive-strength\n to the list of supported pin configuration properties.\nchanges v7:\n- no changes\nchanges v6:\n- add Reviewed-by: Rob Herring (Arm) <robh@kernel.org>\n- add Reviewed-by: Linus Walleij <linusw@kernel.org>\nchanges v5:\n- Commit Message: Added justification for distinct compatible strings\n based on temperature ranges.\n- Restricted pins property to an explicit enum of valid hardware pins\nchanges v4:\n- Drop the standalone mfd/nxp,mc33978.yaml schema entirely.\n- Move the unified device binding to bindings/pinctrl/nxp,mc33978.yaml,\n- Remove the dedicated child node compatible strings (nxp,mc33978-pinctrl).\n- Flatten the pinctrl/gpio properties directly into the main SPI device\n node.\nchanges v3:\n- Drop regular expression pattern from pinctrl child node and define\n it as a standard property\n- Reorder required properties list in MFD binding\n- Remove stray blank line from the MFD binding devicetree example\n- Replace unevaluatedProperties with additionalProperties in the pinctrl\n binding\nchanges v2:\n- Squashed MFD, pinctrl, hwmon, and mux bindings into a single patch\n- Removed the empty hwmon child node\n- Folded the mux-controller node into the parent MFD node\n- Added vbatp-supply and vddq-supply to the required properties block\n- Changed the example node name from mc33978@0 to gpio@0\n- Removed unnecessary literal block scalars (|) from descriptions\n- Documented SG, SP, and SB pin acronyms in the pinctrl description\n- Added consumer polarity guidance (GPIO_ACTIVE_LOW/HIGH) for SG/SB\n inputs, with a note on output circuit dependency\n- Updated commit message\n---\n .../bindings/pinctrl/nxp,mc33978.yaml | 158 ++++++++++++++++++\n 1 file changed, 158 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/pinctrl/nxp,mc33978.yaml", "diff": "diff --git a/Documentation/devicetree/bindings/pinctrl/nxp,mc33978.yaml b/Documentation/devicetree/bindings/pinctrl/nxp,mc33978.yaml\nnew file mode 100644\nindex 000000000000..2a3c565c3c03\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pinctrl/nxp,mc33978.yaml\n@@ -0,0 +1,158 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pinctrl/nxp,mc33978.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: NXP MC33978/MC34978 Multiple Switch Detection Interface\n+\n+maintainers:\n+ - David Jander <david@protonic.nl>\n+ - Oleksij Rempel <o.rempel@pengutronix.de>\n+\n+description: |\n+ The MC33978 and MC34978 are Multiple Switch Detection Interface (MSDI)\n+ devices with 22 switch inputs, integrated fault detection, and analog\n+ multiplexer (AMUX) for voltage/temperature monitoring.\n+\n+ Pin numbering:\n+ - Pins 0-13: SG0-SG13 (Switch-to-Ground inputs). These pins monitor\n+ contacts closed to ground and typically require GPIO_ACTIVE_LOW\n+ flags when used as digital inputs.\n+ - Pins 14-21: SP0-SP7 (Programmable inputs). These can be configured\n+ as SG (Switch-to-Ground) or SB (Switch-to-Battery) inputs. SB\n+ inputs monitor contacts closed to the battery voltage and typically\n+ require GPIO_ACTIVE_HIGH flags when used as digital inputs.\n+\n+ Output Emulation:\n+ The hardware lacks standard push-pull output drivers. Outputs are emulated\n+ by toggling the programmable wetting current sources (acting as pull-ups\n+ or pull-downs) and the hardware tri-state registers. Because of this\n+ physical constraint:\n+ - Consumers using pins as outputs MUST flag them with GPIO_OPEN_DRAIN or\n+ GPIO_OPEN_SOURCE in the device tree.\n+ - Push-pull configurations are physically unsupported.\n+ - The active polarity depends entirely on the external circuit (e.g., how\n+ an LED is wired) and must be flagged accordingly by the consumer.\n+\n+allOf:\n+ - $ref: /schemas/spi/spi-peripheral-props.yaml#\n+\n+properties:\n+ compatible:\n+ enum:\n+ - nxp,mc33978\n+ - nxp,mc34978\n+\n+ reg:\n+ maxItems: 1\n+ description: SPI chip select number\n+\n+ spi-max-frequency:\n+ maximum: 8000000\n+ description: Maximum SPI clock frequency (up to 8 MHz)\n+\n+ interrupts:\n+ maxItems: 1\n+ description:\n+ INT_B pin interrupt. Active-low, indicates pin state changes or\n+ fault conditions.\n+\n+ interrupt-controller: true\n+\n+ '#interrupt-cells':\n+ const: 2\n+ description:\n+ First cell is the IRQ number (0-21 for pins, 22 for faults).\n+ Second cell is the trigger type (IRQ_TYPE_* from dt-bindings/interrupt-controller/irq.h).\n+\n+ '#mux-control-cells':\n+ const: 0\n+ description:\n+ Present if the device AMUX selector is used as a mux provider.\n+ Consumers (e.g. io-channel-mux) must provide settle-time-us for the\n+ external ADC sampling path.\n+\n+ vddq-supply:\n+ description: Digital supply voltage\n+\n+ vbatp-supply:\n+ description: Battery/power supply\n+\n+ gpio-controller: true\n+\n+ '#gpio-cells':\n+ const: 2\n+\n+ ngpios:\n+ const: 22\n+\n+patternProperties:\n+ '^.*-grp$':\n+ type: object\n+ $ref: /schemas/pinctrl/pincfg-node.yaml#\n+ additionalProperties: false\n+ description: Pin configuration subnodes.\n+ properties:\n+ pins:\n+ items:\n+ enum: [sg0, sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8, sg9,\n+ sg10, sg11, sg12, sg13, sp0, sp1, sp2, sp3,\n+ sp4, sp5, sp6, sp7]\n+\n+ bias-pull-up: true\n+ bias-pull-down: true\n+ bias-high-impedance: true\n+ bias-disable: true\n+ drive-open-drain: true\n+ drive-open-source: true\n+ drive-strength:\n+ enum: [2, 6, 8, 10, 12, 14, 16, 20]\n+\n+required:\n+ - compatible\n+ - reg\n+ - interrupts\n+ - interrupt-controller\n+ - '#interrupt-cells'\n+ - vddq-supply\n+ - vbatp-supply\n+ - gpio-controller\n+ - '#gpio-cells'\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/interrupt-controller/irq.h>\n+ #include <dt-bindings/gpio/gpio.h>\n+\n+ spi {\n+ #address-cells = <1>;\n+ #size-cells = <0>;\n+\n+ msdi: gpio@0 {\n+ compatible = \"nxp,mc33978\";\n+ reg = <0>;\n+ spi-max-frequency = <4000000>;\n+\n+ interrupt-parent = <&gpiog>;\n+ interrupts = <9 IRQ_TYPE_LEVEL_LOW>;\n+ interrupt-controller;\n+ #interrupt-cells = <2>;\n+\n+ vddq-supply = <®_3v3>;\n+ vbatp-supply = <®_12v>;\n+\n+ #mux-control-cells = <0>;\n+\n+ gpio-controller;\n+ #gpio-cells = <2>;\n+ ngpios = <22>;\n+\n+ door-grp {\n+ pins = \"sg0\";\n+ bias-high-impedance;\n+ };\n+ };\n+ };\n", "prefixes": [ "v8", "1/6" ] }