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GET /api/patches/2217359/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2217359,
    "url": "http://patchwork.ozlabs.org/api/patches/2217359/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260328054347.3706029-2-david.garcia@aheadcomputing.com/",
    "project": {
        "id": 67,
        "url": "http://patchwork.ozlabs.org/api/projects/67/?format=api",
        "name": "OpenSBI development",
        "link_name": "opensbi",
        "list_id": "opensbi.lists.infradead.org",
        "list_email": "opensbi@lists.infradead.org",
        "web_url": "https://github.com/riscv/opensbi",
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        "list_archive_url_format": "",
        "commit_url_format": "https://github.com/riscv/opensbi/commit/{}"
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    "msgid": "<20260328054347.3706029-2-david.garcia@aheadcomputing.com>",
    "list_archive_url": null,
    "date": "2026-03-28T05:43:44",
    "name": "[1/4] lib: utils: irqchip: aplic: Move register defines to public header",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "cd66a03a33a787a99d99d58120b734d64feda183",
    "submitter": {
        "id": 92994,
        "url": "http://patchwork.ozlabs.org/api/people/92994/?format=api",
        "name": "David E. Garcia Porras",
        "email": "david.garcia@aheadcomputing.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260328054347.3706029-2-david.garcia@aheadcomputing.com/mbox/",
    "series": [
        {
            "id": 497851,
            "url": "http://patchwork.ozlabs.org/api/series/497851/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=497851",
            "date": "2026-03-28T05:43:47",
            "name": "irqchip/rpmi: Expose APLIC/IMSIC interfaces for platform use",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/497851/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2217359/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2217359/checks/",
    "tags": {},
    "related": [],
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        "From": "\"David E. Garcia Porras\" <david.garcia@aheadcomputing.com>",
        "To": "opensbi@lists.infradead.org",
        "Cc": "\"David E. Garcia Porras\" <david.garcia@aheadcomputing.com>",
        "Subject": "[PATCH 1/4] lib: utils: irqchip: aplic: Move register defines to\n public header",
        "Date": "Fri, 27 Mar 2026 23:43:44 -0600",
        "Message-ID": "<20260328054347.3706029-2-david.garcia@aheadcomputing.com>",
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        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
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    },
    "content": "The APLIC register-level defines (DOMAINCFG, SOURCECFG, TARGET, SETIE,\nCLRIE, IDC, MSICFG, etc.) are currently defined locally in aplic.c and\nnot accessible to platform code. Platform implementations that need\ndirect APLIC register access for custom interrupt configuration (e.g.\nMSI-mode source/target setup) have no way to use the canonical defines.\n\nMove these defines from aplic.c to the public aplic.h header so that\nplatform code can configure APLIC registers without duplicating magic\nnumbers. The defines match the RISC-V AIA specification. No functional\nchange.\n\nSigned-off-by: David E. Garcia Porras <david.garcia@aheadcomputing.com>\n---\n include/sbi_utils/irqchip/aplic.h | 101 ++++++++++++++++++++++++++++++\n lib/utils/irqchip/aplic.c         | 101 ------------------------------\n 2 files changed, 101 insertions(+), 101 deletions(-)",
    "diff": "diff --git a/include/sbi_utils/irqchip/aplic.h b/include/sbi_utils/irqchip/aplic.h\nindex 3461d1c7..286c8f94 100644\n--- a/include/sbi_utils/irqchip/aplic.h\n+++ b/include/sbi_utils/irqchip/aplic.h\n@@ -14,6 +14,107 @@\n #include <sbi/sbi_types.h>\n #include <sbi/sbi_irqchip.h>\n \n+#define APLIC_MAX_IDC\t\t\t(1UL << 14)\n+#define APLIC_MAX_SOURCE\t\t1024\n+\n+#define APLIC_DOMAINCFG\t\t0x0000\n+#define APLIC_DOMAINCFG_IE\t\t(1 << 8)\n+#define APLIC_DOMAINCFG_DM\t\t(1 << 2)\n+#define APLIC_DOMAINCFG_BE\t\t(1 << 0)\n+\n+#define APLIC_SOURCECFG_BASE\t\t0x0004\n+#define APLIC_SOURCECFG_D\t\t(1 << 10)\n+#define APLIC_SOURCECFG_CHILDIDX_MASK\t0x000003ff\n+#define APLIC_SOURCECFG_SM_MASK\t0x00000007\n+#define APLIC_SOURCECFG_SM_INACTIVE\t0x0\n+#define APLIC_SOURCECFG_SM_DETACH\t0x1\n+#define APLIC_SOURCECFG_SM_EDGE_RISE\t0x4\n+#define APLIC_SOURCECFG_SM_EDGE_FALL\t0x5\n+#define APLIC_SOURCECFG_SM_LEVEL_HIGH\t0x6\n+#define APLIC_SOURCECFG_SM_LEVEL_LOW\t0x7\n+\n+#define APLIC_MMSICFGADDR\t\t0x1bc0\n+#define APLIC_MMSICFGADDRH\t\t0x1bc4\n+#define APLIC_SMSICFGADDR\t\t0x1bc8\n+#define APLIC_SMSICFGADDRH\t\t0x1bcc\n+\n+#define APLIC_xMSICFGADDRH_L\t\t(1UL << 31)\n+#define APLIC_xMSICFGADDRH_HHXS_MASK\t0x1f\n+#define APLIC_xMSICFGADDRH_HHXS_SHIFT\t24\n+#define APLIC_xMSICFGADDRH_LHXS_MASK\t0x7\n+#define APLIC_xMSICFGADDRH_LHXS_SHIFT\t20\n+#define APLIC_xMSICFGADDRH_HHXW_MASK\t0x7\n+#define APLIC_xMSICFGADDRH_HHXW_SHIFT\t16\n+#define APLIC_xMSICFGADDRH_LHXW_MASK\t0xf\n+#define APLIC_xMSICFGADDRH_LHXW_SHIFT\t12\n+#define APLIC_xMSICFGADDRH_BAPPN_MASK\t0xfff\n+\n+#define APLIC_xMSICFGADDR_PPN_SHIFT\t12\n+\n+#define APLIC_xMSICFGADDR_PPN_HART(__lhxs) \\\n+\t((1UL << (__lhxs)) - 1)\n+\n+#define APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) \\\n+\t((1UL << (__lhxw)) - 1)\n+#define APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs) \\\n+\t((__lhxs))\n+#define APLIC_xMSICFGADDR_PPN_LHX(__lhxw, __lhxs) \\\n+\t(APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) << \\\n+\t APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs))\n+\n+#define APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) \\\n+\t((1UL << (__hhxw)) - 1)\n+#define APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs) \\\n+\t((__hhxs) + APLIC_xMSICFGADDR_PPN_SHIFT)\n+#define APLIC_xMSICFGADDR_PPN_HHX(__hhxw, __hhxs) \\\n+\t(APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \\\n+\t APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs))\n+\n+#define APLIC_SETIP_BASE\t\t0x1c00\n+#define APLIC_SETIPNUM\t\t\t0x1cdc\n+\n+#define APLIC_CLRIP_BASE\t\t0x1d00\n+#define APLIC_CLRIPNUM\t\t\t0x1ddc\n+\n+#define APLIC_SETIE_BASE\t\t0x1e00\n+#define APLIC_SETIENUM\t\t\t0x1edc\n+\n+#define APLIC_CLRIE_BASE\t\t0x1f00\n+#define APLIC_CLRIENUM\t\t\t0x1fdc\n+\n+#define APLIC_SETIPNUM_LE\t\t0x2000\n+#define APLIC_SETIPNUM_BE\t\t0x2004\n+\n+#define APLIC_TARGET_BASE\t\t0x3004\n+#define APLIC_TARGET_HART_IDX_SHIFT\t18\n+#define APLIC_TARGET_HART_IDX_MASK\t0x3fff\n+#define APLIC_TARGET_GUEST_IDX_SHIFT\t12\n+#define APLIC_TARGET_GUEST_IDX_MASK\t0x3f\n+#define APLIC_TARGET_IPRIO_MASK\t0xff\n+#define APLIC_TARGET_EIID_MASK\t0x7ff\n+\n+#define APLIC_IDC_BASE\t\t\t0x4000\n+#define APLIC_IDC_SIZE\t\t\t32\n+\n+#define APLIC_IDC_IDELIVERY\t\t0x00\n+\n+#define APLIC_IDC_IFORCE\t\t0x04\n+\n+#define APLIC_IDC_ITHRESHOLD\t\t0x08\n+\n+#define APLIC_IDC_TOPI\t\t\t0x18\n+#define APLIC_IDC_TOPI_ID_SHIFT\t16\n+#define APLIC_IDC_TOPI_ID_MASK\t0x3ff\n+#define APLIC_IDC_TOPI_PRIO_MASK\t0xff\n+\n+#define APLIC_IDC_CLAIMI\t\t0x1c\n+\n+#define APLIC_DEFAULT_PRIORITY\t\t1\n+#define APLIC_DISABLE_IDELIVERY\t\t0\n+#define APLIC_ENABLE_IDELIVERY\t\t1\n+#define APLIC_DISABLE_ITHRESHOLD\t1\n+#define APLIC_ENABLE_ITHRESHOLD\t\t0\n+\n #define APLIC_MAX_DELEGATE\t16\n \n struct aplic_msicfg_data {\ndiff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c\nindex ec69c82b..a20cecf2 100644\n--- a/lib/utils/irqchip/aplic.c\n+++ b/lib/utils/irqchip/aplic.c\n@@ -14,107 +14,6 @@\n #include <sbi/sbi_error.h>\n #include <sbi_utils/irqchip/aplic.h>\n \n-#define APLIC_MAX_IDC\t\t\t(1UL << 14)\n-#define APLIC_MAX_SOURCE\t\t1024\n-\n-#define APLIC_DOMAINCFG\t\t0x0000\n-#define APLIC_DOMAINCFG_IE\t\t(1 << 8)\n-#define APLIC_DOMAINCFG_DM\t\t(1 << 2)\n-#define APLIC_DOMAINCFG_BE\t\t(1 << 0)\n-\n-#define APLIC_SOURCECFG_BASE\t\t0x0004\n-#define APLIC_SOURCECFG_D\t\t(1 << 10)\n-#define APLIC_SOURCECFG_CHILDIDX_MASK\t0x000003ff\n-#define APLIC_SOURCECFG_SM_MASK\t0x00000007\n-#define APLIC_SOURCECFG_SM_INACTIVE\t0x0\n-#define APLIC_SOURCECFG_SM_DETACH\t0x1\n-#define APLIC_SOURCECFG_SM_EDGE_RISE\t0x4\n-#define APLIC_SOURCECFG_SM_EDGE_FALL\t0x5\n-#define APLIC_SOURCECFG_SM_LEVEL_HIGH\t0x6\n-#define APLIC_SOURCECFG_SM_LEVEL_LOW\t0x7\n-\n-#define APLIC_MMSICFGADDR\t\t0x1bc0\n-#define APLIC_MMSICFGADDRH\t\t0x1bc4\n-#define APLIC_SMSICFGADDR\t\t0x1bc8\n-#define APLIC_SMSICFGADDRH\t\t0x1bcc\n-\n-#define APLIC_xMSICFGADDRH_L\t\t(1UL << 31)\n-#define APLIC_xMSICFGADDRH_HHXS_MASK\t0x1f\n-#define APLIC_xMSICFGADDRH_HHXS_SHIFT\t24\n-#define APLIC_xMSICFGADDRH_LHXS_MASK\t0x7\n-#define APLIC_xMSICFGADDRH_LHXS_SHIFT\t20\n-#define APLIC_xMSICFGADDRH_HHXW_MASK\t0x7\n-#define APLIC_xMSICFGADDRH_HHXW_SHIFT\t16\n-#define APLIC_xMSICFGADDRH_LHXW_MASK\t0xf\n-#define APLIC_xMSICFGADDRH_LHXW_SHIFT\t12\n-#define APLIC_xMSICFGADDRH_BAPPN_MASK\t0xfff\n-\n-#define APLIC_xMSICFGADDR_PPN_SHIFT\t12\n-\n-#define APLIC_xMSICFGADDR_PPN_HART(__lhxs) \\\n-\t((1UL << (__lhxs)) - 1)\n-\n-#define APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) \\\n-\t((1UL << (__lhxw)) - 1)\n-#define APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs) \\\n-\t((__lhxs))\n-#define APLIC_xMSICFGADDR_PPN_LHX(__lhxw, __lhxs) \\\n-\t(APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) << \\\n-\t APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs))\n-\n-#define APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) \\\n-\t((1UL << (__hhxw)) - 1)\n-#define APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs) \\\n-\t((__hhxs) + APLIC_xMSICFGADDR_PPN_SHIFT)\n-#define APLIC_xMSICFGADDR_PPN_HHX(__hhxw, __hhxs) \\\n-\t(APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \\\n-\t APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs))\n-\n-#define APLIC_SETIP_BASE\t\t0x1c00\n-#define APLIC_SETIPNUM\t\t\t0x1cdc\n-\n-#define APLIC_CLRIP_BASE\t\t0x1d00\n-#define APLIC_CLRIPNUM\t\t\t0x1ddc\n-\n-#define APLIC_SETIE_BASE\t\t0x1e00\n-#define APLIC_SETIENUM\t\t\t0x1edc\n-\n-#define APLIC_CLRIE_BASE\t\t0x1f00\n-#define APLIC_CLRIENUM\t\t\t0x1fdc\n-\n-#define APLIC_SETIPNUM_LE\t\t0x2000\n-#define APLIC_SETIPNUM_BE\t\t0x2004\n-\n-#define APLIC_TARGET_BASE\t\t0x3004\n-#define APLIC_TARGET_HART_IDX_SHIFT\t18\n-#define APLIC_TARGET_HART_IDX_MASK\t0x3fff\n-#define APLIC_TARGET_GUEST_IDX_SHIFT\t12\n-#define APLIC_TARGET_GUEST_IDX_MASK\t0x3f\n-#define APLIC_TARGET_IPRIO_MASK\t0xff\n-#define APLIC_TARGET_EIID_MASK\t0x7ff\n-\n-#define APLIC_IDC_BASE\t\t\t0x4000\n-#define APLIC_IDC_SIZE\t\t\t32\n-\n-#define APLIC_IDC_IDELIVERY\t\t0x00\n-\n-#define APLIC_IDC_IFORCE\t\t0x04\n-\n-#define APLIC_IDC_ITHRESHOLD\t\t0x08\n-\n-#define APLIC_IDC_TOPI\t\t\t0x18\n-#define APLIC_IDC_TOPI_ID_SHIFT\t16\n-#define APLIC_IDC_TOPI_ID_MASK\t0x3ff\n-#define APLIC_IDC_TOPI_PRIO_MASK\t0xff\n-\n-#define APLIC_IDC_CLAIMI\t\t0x1c\n-\n-#define APLIC_DEFAULT_PRIORITY\t\t1\n-#define APLIC_DISABLE_IDELIVERY\t\t0\n-#define APLIC_ENABLE_IDELIVERY\t\t1\n-#define APLIC_DISABLE_ITHRESHOLD\t1\n-#define APLIC_ENABLE_ITHRESHOLD\t\t0\n-\n static SBI_LIST_HEAD(aplic_list);\n static void aplic_writel_msicfg(struct aplic_msicfg_data *msicfg,\n \t\t\t\tvoid *msicfgaddr, void *msicfgaddrH);\n",
    "prefixes": [
        "1/4"
    ]
}