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patch:
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put:
Update a patch.
GET /api/patches/2217349/?format=api
{ "id": 2217349, "url": "http://patchwork.ozlabs.org/api/patches/2217349/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260328021036.85945-5-mailingradian@gmail.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260328021036.85945-5-mailingradian@gmail.com>", "list_archive_url": null, "date": "2026-03-28T02:10:35", "name": "[v3,4/5] arm64: dts: qcom: sdm670: add lpi pinctrl", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0f63e052a5e7d2be01e2b186645394df5f84bff8", "submitter": { "id": 84825, "url": "http://patchwork.ozlabs.org/api/people/84825/?format=api", "name": "Richard Acayan", "email": "mailingradian@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260328021036.85945-5-mailingradian@gmail.com/mbox/", "series": [ { "id": 497848, "url": "http://patchwork.ozlabs.org/api/series/497848/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497848", "date": "2026-03-28T02:10:34", "name": "SDM670 LPASS LPI pin controller support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/497848/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217349/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217349/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34340-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=fad2Qgoe;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; helo=sto.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34340-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"fad2Qgoe\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.160.182", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fjLbM6z4fz1y1x\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 28 Mar 2026 13:11:11 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 419CA3013DE0\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 28 Mar 2026 02:10:42 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id B4A2D356A08;\n\tSat, 28 Mar 2026 02:10:41 +0000 (UTC)", "from mail-qt1-f182.google.com (mail-qt1-f182.google.com\n [209.85.160.182])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 43BB6356A3E\n\tfor <linux-gpio@vger.kernel.org>; Sat, 28 Mar 2026 02:10:40 +0000 (UTC)", "by mail-qt1-f182.google.com with SMTP id\n d75a77b69052e-50baafd6c4aso10885961cf.1\n for <linux-gpio@vger.kernel.org>;\n Fri, 27 Mar 2026 19:10:40 -0700 (PDT)", "from localhost\n (bras-base-toroon21-grc-75-184-144-58-243.dsl.bell.ca. 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Add the device\nnode for it.\n\nSigned-off-by: Richard Acayan <mailingradian@gmail.com>\n---\n arch/arm64/boot/dts/qcom/sdm670.dtsi | 73 ++++++++++++++++++++++++++++\n 1 file changed, 73 insertions(+)", "diff": "diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi\nindex c5f7655421a3..85a34e2f0907 100644\n--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi\n+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi\n@@ -2346,6 +2346,79 @@ lmh_cluster0: lmh@17d78800 {\n \t\t\tinterrupt-controller;\n \t\t\t#interrupt-cells = <1>;\n \t\t};\n+\n+\t\tlpi_tlmm: pinctrl@62b40000 {\n+\t\t\tcompatible = \"qcom,sdm670-lpass-lpi-pinctrl\";\n+\t\t\treg = <0 0x62b40000 0 0x20000>;\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\tgpio-ranges = <&lpi_tlmm 0 0 32>;\n+\n+\t\t\tcdc_pdm_default: cdc-pdm-default-state {\n+\t\t\t\tclk-pins {\n+\t\t\t\t\tpins = \"gpio18\";\n+\t\t\t\t\tfunction = \"slimbus_clk\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\n+\t\t\t\tsync-pins {\n+\t\t\t\t\tpins = \"gpio19\";\n+\t\t\t\t\tfunction = \"pdm_sync\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\n+\t\t\t\ttx-pins {\n+\t\t\t\t\tpins = \"gpio20\";\n+\t\t\t\t\tfunction = \"pdm_tx\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t};\n+\n+\t\t\t\trx-pins {\n+\t\t\t\t\tpins = \"gpio21\", \"gpio23\", \"gpio25\";\n+\t\t\t\t\tfunction = \"pdm_rx\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tcdc_comp_default: cdc-comp-default-state {\n+\t\t\t\tpins = \"gpio22\", \"gpio24\";\n+\t\t\t\tfunction = \"comp_rx\";\n+\t\t\t\tdrive-strength = <4>;\n+\t\t\t};\n+\n+\t\t\tcdc_dmic_default: cdc-dmic-default-state {\n+\t\t\t\tclk1-pins {\n+\t\t\t\t\tpins = \"gpio26\";\n+\t\t\t\t\tfunction = \"dmic1_clk\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\toutput-high;\n+\t\t\t\t};\n+\n+\t\t\t\tclk2-pins {\n+\t\t\t\t\tpins = \"gpio28\";\n+\t\t\t\t\tfunction = \"dmic2_clk\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\toutput-high;\n+\t\t\t\t};\n+\n+\t\t\t\tdata1-pins {\n+\t\t\t\t\tpins = \"gpio27\";\n+\t\t\t\t\tfunction = \"dmic1_data\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\tinput-enable;\n+\t\t\t\t};\n+\n+\t\t\t\tdata2-pins {\n+\t\t\t\t\tpins = \"gpio29\";\n+\t\t\t\t\tfunction = \"dmic2_data\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\tinput-enable;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n \t};\n \n \tthermal-zones {\n", "prefixes": [ "v3", "4/5" ] }