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GET /api/patches/2217340/?format=api
{ "id": 2217340, "url": "http://patchwork.ozlabs.org/api/patches/2217340/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260327225803.525363-1-vineet.gupta@linux.dev/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327225803.525363-1-vineet.gupta@linux.dev>", "list_archive_url": null, "date": "2026-03-27T22:58:03", "name": "[v2] bpf: md: fix zero_extendsidi2 reg->reg codegen [PR124670]", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3afec00058c810d3935c16e912ec740676aa41c8", "submitter": { "id": 82303, "url": "http://patchwork.ozlabs.org/api/people/82303/?format=api", "name": "Vineet Gupta", "email": "vineet.gupta@linux.dev" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260327225803.525363-1-vineet.gupta@linux.dev/mbox/", "series": [ { "id": 497841, "url": "http://patchwork.ozlabs.org/api/series/497841/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=497841", "date": "2026-03-27T22:58:03", "name": "[v2] bpf: md: fix zero_extendsidi2 reg->reg codegen [PR124670]", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497841/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217340/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217340/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256\n header.s=key1 header.b=GwpZcPyn;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)", "sourceware.org;\n\tdkim=pass (1024-bit key,\n unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256\n header.s=key1 header.b=GwpZcPyn", "sourceware.org;\n dmarc=pass (p=none dis=none) header.from=linux.dev", "sourceware.org; spf=pass smtp.mailfrom=linux.dev", "server2.sourceware.org;\n arc=none smtp.remote-ip=91.218.175.174" ], "Received": [ "from vm01.sourceware.org (vm01.sourceware.org [38.145.34.32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fjGKN1KZmz1y1x\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 28 Mar 2026 09:58:48 +1100 (AEDT)", "from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 16C014BA23F4\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 22:58:46 +0000 (GMT)", "from out-174.mta0.migadu.com (out-174.mta0.migadu.com\n [91.218.175.174])\n by sourceware.org (Postfix) with ESMTPS id 593EA4BA2E2C\n for <gcc-patches@gcc.gnu.org>; Fri, 27 Mar 2026 22:58:18 +0000 (GMT)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org 16C014BA23F4", "OpenDKIM Filter v2.11.0 sourceware.org 593EA4BA2E2C" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 593EA4BA2E2C", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 593EA4BA2E2C", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774652298; cv=none;\n b=fSDhkLgjyH6IxFvS2UJAU0DX7BI3OuOvWlahXNREKBYg7nnz2qkruE0wP2nli+1b2ZcVgQH1vw3DvvHDL6YcSNuXSxPEl2DWtwX21HjTGMd1h24WCKUUPl+6+d4vzgojZiFeYaISzBu1cCz6rPsAzmkYH20NCugty7NZrQc4fZg=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1774652298; c=relaxed/simple;\n bh=0AG9gew/Qxb/jIBRZfFZJQ03/9FkERKsPPzKIj8NndU=;\n h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version;\n b=qBoRGLaxKgJCi8sFWZ+v6HpAyxHD3Q3fxO31mtE35XTsU5iPkNUQIs+P+TZnM/vlNoLAHGTQg/yBjgkyMg+oXwIl+D6FA2lpiRSBesb8nQjFcglnVBvdzIl8QHesd/ar3P+qGt6wIJWWNUWp6/eWXPSXCHuvcdinORTnS/3JA84=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "X-Report-Abuse": "Please report any abuse attempt to abuse@migadu.com and\n include these headers.", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1;\n t=1774652295;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding;\n bh=65ZBC67m1q98MWwmLrBMz3M6dl3qHWWnG26mJ72FGJE=;\n b=GwpZcPynwWfsHI9vPHfMjIzHeEsdulfdjYigIj+6aIQZyGFX4SvuyyFHiJJjthW2v34EFa\n 5MpeuUjbISqAtOcpNGqCCSs/qdaKODSa4PlTCntJNpMVQ5Gq/3iWhSysL8Jfg6uqxRAa/X\n T01/n2yGm05R+OXiPceqWnmkMpJI8y8=", "From": "Vineet Gupta <vineet.gupta@linux.dev>", "To": "bpf@gcc.gnu.org", "Cc": "gcc-patches@gcc.gnu.org, jose.marchesi@oracle.com, ast@kernel.org,\n Eduard Zingerman <eddyz87@gmail.com>,\n Yonghong Song <yonghong.song@linux.dev>,\n Vineet Gupta <vineet.gupta@linux.dev>", "Subject": "[PATCH v2] bpf: md: fix zero_extendsidi2 reg->reg codegen [PR124670]", "Date": "Fri, 27 Mar 2026 15:58:03 -0700", "Message-ID": "<20260327225803.525363-1-vineet.gupta@linux.dev>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-Migadu-Flow": "FLOW_OUT", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Currently the following RTL for zero extension\n\n| (insn 8 7 9 (set (reg:DI 0 %r0 [25])\n| (zero_extend:DI (reg:SI 0 %r0 [24]))) {zero_extendsidi2}\n| (nil))\n\ngenerates\n\n| r0 = r0\n\nwhich is just a 64-bit copy and doesn't clear the upper 32-bits as\nsemantically required by the pattern.\n\nThe issue is pattern's asm template missing ‘w’/'W' causing bpf_print_register ()\nto only emit 'r' regs. Using ‘W’ in template generates correct code.\n\n| w0 = w0\n\nNote that 'W specifier ignores the RTL mode and unconditionally emits\nthe 'w' reg which might feel like creating a potential future bug.\nHowever for this insn, it is correct/completely safe as follows:\n - 'W1' for src operand: src operand has a SI mode in pattern.\n - 'W0' for dst: Technically dst is DI, but the upper 32-bits of output\n have to be 0 due to zero-extension, thus a 'w' reg is OK.\n\nFor selftests this is a wash, except for some spurious changes.\n\n\tPR target/124670\n\ngcc/ChangeLog:\n\n\t* config/bpf/bpf.md (zero_extendsidi2): Use 'W' in asm template.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/bpf/zero-ext.c: New test.\n\nSigned-off-by: Vineet Gupta <vineet.gupta@linux.dev>\n---\nChanges since v1\n - src operand also changed to 'W'\n---\n gcc/config/bpf/bpf.md | 2 +-\n gcc/testsuite/gcc.target/bpf/zero-ext.c | 11 +++++++++++\n 2 files changed, 12 insertions(+), 1 deletion(-)\n create mode 100644 gcc/testsuite/gcc.target/bpf/zero-ext.c", "diff": "diff --git a/gcc/config/bpf/bpf.md b/gcc/config/bpf/bpf.md\nindex bc739f2746c0..c2c3152b5d7c 100644\n--- a/gcc/config/bpf/bpf.md\n+++ b/gcc/config/bpf/bpf.md\n@@ -300,7 +300,7 @@\n \t (match_operand:SI 1 \"nonimmediate_operand\" \"r,q\")))]\n \"\"\n \"@\n- *return bpf_output_move (operands, bpf_has_alu32 ? \\\"{mov32\\t%0,%1|%0 = %1}\\\" : \\\"{mov\\t%0,%1\\;and\\t%0,0xffffffff|%0 = %1;%0 &= 0xffffffff}\\\");\n+ *return bpf_output_move (operands, bpf_has_alu32 ? \\\"{mov32\\t%0,%1|%W0 = %W1}\\\" : \\\"{mov\\t%0,%1\\;and\\t%0,0xffffffff|%0 = %1;%0 &= 0xffffffff}\\\");\n *return bpf_output_move (operands, \\\"{ldxw\\t%0,%1|%0 = *(u32 *) %1}\\\");\"\n [(set_attr \"type\" \"alu,ldx\")])\n \ndiff --git a/gcc/testsuite/gcc.target/bpf/zero-ext.c b/gcc/testsuite/gcc.target/bpf/zero-ext.c\nnew file mode 100644\nindex 000000000000..a57c7dc521f0\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/bpf/zero-ext.c\n@@ -0,0 +1,11 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mcpu=v4\" } */\n+\n+int bar_int(void);\n+\n+int foo_int(void) {\n+ if (bar_int() != 1) return 0; else return 1;\n+}\n+\n+/* { dg-final { scan-assembler-not {r0 = r0} } } */\n+/* { dg-final { scan-assembler-times {w0 = w0} 1 } } */\n", "prefixes": [ "v2" ] }