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GET /api/patches/2217328/?format=api
{ "id": 2217328, "url": "http://patchwork.ozlabs.org/api/patches/2217328/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327-pinctrl-mux-v5-5-d4aec9d62c62@nxp.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327-pinctrl-mux-v5-5-d4aec9d62c62@nxp.com>", "list_archive_url": null, "date": "2026-03-27T21:34:02", "name": "[v5,5/7] pinctrl: add generic board-level pinctrl driver using mux framework", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d1d2fb556b03591d00fff71ae44055829abda8a4", "submitter": { "id": 68011, "url": "http://patchwork.ozlabs.org/api/people/68011/?format=api", "name": "Frank Li", "email": "Frank.Li@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327-pinctrl-mux-v5-5-d4aec9d62c62@nxp.com/mbox/", "series": [ { "id": 497832, "url": "http://patchwork.ozlabs.org/api/series/497832/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497832", "date": "2026-03-27T21:33:57", "name": "pinctrl: Add generic pinctrl for board-level mux chips", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/497832/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217328/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217328/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34332-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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"DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=NiWQsY3gAJMTO2/Nk33kRMMppd78eVFxT8bjQxj5TI0=;\n b=NBBXavqaS8K1Gn6YVzMJsdXlPoxzgSbZdg6OGWTYNOQN++epepo/i8uApnZDH7mO2bGQEDE+ISGCcpBLSNwUL3BdVDjGeiCzcGoTsMfeTalpZwusPQzNEh2EibBu4FIBC0S0ZFD4rpkx8Cy5R14T6zBc9qY6tLs2IO3U7knNjH9Hta4dVA2Lc5p9hHksxK+kGAXQjfEFymzZ6SmZ2jF39rKRcdrot9Ix2eDud7wo4hz+wzFLMQPI74l/7DLWJfan3jcgAYgE7YQXijBITBfKRzdt+YnVjPc7bRpuOinhBhcjs02uOaij/CdrnEhT89M+DpMBf4adwHN+Sy1ny/ZMxA==", "From": "Frank Li <Frank.Li@nxp.com>", "Date": "Fri, 27 Mar 2026 17:34:02 -0400", "Subject": "[PATCH v5 5/7] pinctrl: add generic board-level pinctrl driver\n using mux framework", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260327-pinctrl-mux-v5-5-d4aec9d62c62@nxp.com>", "References": "<20260327-pinctrl-mux-v5-0-d4aec9d62c62@nxp.com>", "In-Reply-To": "<20260327-pinctrl-mux-v5-0-d4aec9d62c62@nxp.com>", "To": "Peter Rosin <peda@axentia.se>, Linus Walleij <linusw@kernel.org>,\n Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>,\n Sascha Hauer <s.hauer@pengutronix.de>,\n Pengutronix Kernel Team <kernel@pengutronix.de>,\n Fabio Estevam <festevam@gmail.com>", "Cc": "linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,\n devicetree@vger.kernel.org, imx@lists.linux.dev,\n linux-arm-kernel@lists.infradead.org, Haibo Chen <haibo.chen@nxp.com>,\n Frank Li <Frank.Li@nxp.com>", "X-Mailer": "b4 0.14.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1774647254; l=8001;\n i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id;\n bh=cOYL5rr9PN45WbVPaLo4QNDVlTWljc2zsDVwsNh0YIw=;\n b=vXuOWe6OQcPJX1BKl4jQDvOLIdcl02GDDMnkyrG8hgOVGTIlNzHoEEfWXItnlQymtCo+N4t7G\n fEa5nWQSIfCAnZHlTDYf9j2Xfox6JOFKVIAw18LYeGmFxh05yNZkI7a", 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"X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 00dda89b-7f6a-42ae-7d79-08de8c48a180", "X-MS-Exchange-CrossTenant-AuthSource": "PA4PR04MB9366.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Mar 2026 21:34:31.0166\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n iv5LBkwgZ3o92L9amCt+ONPDGHjRh+ELWNHlvBnQ/KM7mxdnsNUTmspkvwYGQMxUdddc2/g/pgknzWFXJSb3OQ==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM9PR04MB8668" }, "content": "Many boards use on-board mux chips (often controlled by GPIOs from an I2C\nexpander) to switch shared signals between peripherals.\n\nAdd a generic pinctrl driver built on top of the mux framework to\ncentralize mux handling and avoid probe ordering issues. Keep board-level\nrouting out of individual drivers and supports boot-time only mux\nselection.\n\nEnsure correct probe ordering, especially when the GPIO expander is probed\nlater.\n\nSigned-off-by: Frank Li <Frank.Li@nxp.com>\n---\nchagne in v4:\n- use new pinctrl_generic_pins_to_map()\n\nchange in v3:\n- use pinctrl_generic_pins_function_dt_node_to_map() and\npinctrl_utils_free_map().\n\nchange in v2:\n- fix copywrite by add nxp\n- fix if (!*map) check\n- add release_mux to call mux_state_deselect()\n---\n drivers/pinctrl/Kconfig | 9 ++\n drivers/pinctrl/Makefile | 1 +\n drivers/pinctrl/pinctrl-generic-mux.c | 197 ++++++++++++++++++++++++++++++++++\n 3 files changed, 207 insertions(+)", "diff": "diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig\nindex afecd9407f5354f5b92223f8cd80d2f7a08f8e7d..b6d4755e67510786c34f890c5e7a3fcf0adf45e4 100644\n--- a/drivers/pinctrl/Kconfig\n+++ b/drivers/pinctrl/Kconfig\n@@ -274,6 +274,15 @@ config PINCTRL_GEMINI\n \tselect GENERIC_PINCONF\n \tselect MFD_SYSCON\n \n+config PINCTRL_GENERIC_MUX\n+\ttristate \"Generic Pinctrl driver by using multiplexer\"\n+\tdepends on MULTIPLEXER\n+\tselect PINMUX\n+\tselect GENERIC_PINCTRL\n+\thelp\n+ Generic pinctrl driver by MULTIPLEXER framework to control on\n+ board pin selection.\n+\n config PINCTRL_INGENIC\n \tbool \"Pinctrl driver for the Ingenic JZ47xx SoCs\"\n \tdefault MACH_INGENIC\ndiff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile\nindex f7d5d5f76d0c8becc0aa1d77c68b6ced924ea264..fcd1703440d24579636e8ddb6cbd83a0a982dfb7 100644\n--- a/drivers/pinctrl/Makefile\n+++ b/drivers/pinctrl/Makefile\n@@ -29,6 +29,7 @@ obj-$(CONFIG_PINCTRL_EQUILIBRIUM) += pinctrl-equilibrium.o\n obj-$(CONFIG_PINCTRL_EP93XX)\t+= pinctrl-ep93xx.o\n obj-$(CONFIG_PINCTRL_EYEQ5)\t+= pinctrl-eyeq5.o\n obj-$(CONFIG_PINCTRL_GEMINI)\t+= pinctrl-gemini.o\n+obj-$(CONFIG_PINCTRL_GENERIC_MUX) += pinctrl-generic-mux.o\n obj-$(CONFIG_PINCTRL_INGENIC)\t+= pinctrl-ingenic.o\n obj-$(CONFIG_PINCTRL_K210)\t+= pinctrl-k210.o\n obj-$(CONFIG_PINCTRL_K230)\t+= pinctrl-k230.o\ndiff --git a/drivers/pinctrl/pinctrl-generic-mux.c b/drivers/pinctrl/pinctrl-generic-mux.c\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..add3179f40a65d16e71b63442d62504ab1013540\n--- /dev/null\n+++ b/drivers/pinctrl/pinctrl-generic-mux.c\n@@ -0,0 +1,197 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+/*\n+ * Generic Pin Control Driver for Board-Level Mux Chips\n+ * Copyright 2026 NXP\n+ */\n+\n+#include <linux/cleanup.h>\n+#include <linux/module.h>\n+#include <linux/of.h>\n+#include <linux/mutex.h>\n+#include <linux/mux/consumer.h>\n+#include <linux/platform_device.h>\n+#include <linux/pinctrl/pinconf-generic.h>\n+#include <linux/pinctrl/pinctrl.h>\n+#include <linux/pinctrl/pinmux.h>\n+#include <linux/slab.h>\n+\n+#include \"core.h\"\n+#include \"pinconf.h\"\n+#include \"pinmux.h\"\n+#include \"pinctrl-utils.h\"\n+\n+struct mux_pin_function {\n+\tstruct mux_state *mux_state;\n+};\n+\n+struct mux_pinctrl {\n+\tstruct device *dev;\n+\tstruct pinctrl_dev *pctl;\n+\n+\t/* mutex protect [pinctrl|pinmux]_generic functions */\n+\tstruct mutex lock;\n+\tint cur_select;\n+};\n+\n+static int\n+mux_pinmux_dt_node_to_map(struct pinctrl_dev *pctldev,\n+\t\t\t struct device_node *np_config,\n+\t\t\t struct pinctrl_map **maps, unsigned int *num_maps)\n+{\n+\tunsigned int num_reserved_maps = 0;\n+\tstruct mux_pin_function *function;\n+\tconst char **group_names;\n+\tint ret;\n+\n+\tfunction = devm_kzalloc(pctldev->dev, sizeof(*function), GFP_KERNEL);\n+\tif (!function)\n+\t\treturn -ENOMEM;\n+\n+\tgroup_names = devm_kcalloc(pctldev->dev, 1, sizeof(*group_names), GFP_KERNEL);\n+\tif (!group_names)\n+\t\treturn -ENOMEM;\n+\n+\tfunction->mux_state = devm_mux_state_get_from_np(pctldev->dev, NULL, np_config);\n+\tif (IS_ERR(function->mux_state))\n+\t\treturn PTR_ERR(function->mux_state);\n+\n+\tret = pinctrl_generic_to_map(pctldev, np_config, np_config, maps,\n+\t\t\t\t num_maps, &num_reserved_maps, group_names,\n+\t\t\t\t 0, &np_config->name, NULL, 0);\n+\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = pinmux_generic_add_function(pctldev, np_config->name, group_names,\n+\t\t\t\t\t 1, function);\n+\tif (ret < 0) {\n+\t\tpinctrl_utils_free_map(pctldev, *maps, *num_maps);\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static const struct pinctrl_ops mux_pinctrl_ops = {\n+\t.get_groups_count = pinctrl_generic_get_group_count,\n+\t.get_group_name = pinctrl_generic_get_group_name,\n+\t.get_group_pins = pinctrl_generic_get_group_pins,\n+\t.dt_node_to_map = mux_pinmux_dt_node_to_map,\n+\t.dt_free_map = pinctrl_utils_free_map,\n+};\n+\n+static int mux_pinmux_set_mux(struct pinctrl_dev *pctldev,\n+\t\t\t unsigned int func_selector,\n+\t\t\t unsigned int group_selector)\n+{\n+\tstruct mux_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);\n+\tconst struct function_desc *function;\n+\tstruct mux_pin_function *func;\n+\tint ret;\n+\n+\tguard(mutex)(&mpctl->lock);\n+\n+\tfunction = pinmux_generic_get_function(pctldev, func_selector);\n+\tfunc = function->data;\n+\n+\tif (mpctl->cur_select == func_selector)\n+\t\treturn 0;\n+\n+\tif (mpctl->cur_select >= 0 && mpctl->cur_select != func_selector)\n+\t\treturn -EINVAL;\n+\n+\tret = mux_state_select(func->mux_state);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tmpctl->cur_select = func_selector;\n+\n+\treturn 0;\n+}\n+\n+static void mux_pinmux_release_mux(struct pinctrl_dev *pctldev,\n+\t\t\t\t unsigned int func_selector,\n+\t\t\t\t unsigned int group_selector)\n+{\n+\tstruct mux_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);\n+\tconst struct function_desc *function;\n+\tstruct mux_pin_function *func;\n+\n+\tguard(mutex)(&mpctl->lock);\n+\n+\tfunction = pinmux_generic_get_function(pctldev, func_selector);\n+\tfunc = function->data;\n+\n+\tmux_state_deselect(func->mux_state);\n+\n+\tmpctl->cur_select = -1;\n+}\n+\n+static const struct pinmux_ops mux_pinmux_ops = {\n+\t.get_functions_count = pinmux_generic_get_function_count,\n+\t.get_function_name = pinmux_generic_get_function_name,\n+\t.get_function_groups = pinmux_generic_get_function_groups,\n+\t.set_mux = mux_pinmux_set_mux,\n+\t.release_mux = mux_pinmux_release_mux,\n+};\n+\n+static int mux_pinctrl_probe(struct platform_device *pdev)\n+{\n+\tstruct device *dev = &pdev->dev;\n+\tstruct mux_pinctrl *mpctl;\n+\tstruct pinctrl_desc *pctl_desc;\n+\tint ret;\n+\n+\tmpctl = devm_kzalloc(dev, sizeof(*mpctl), GFP_KERNEL);\n+\tif (!mpctl)\n+\t\treturn -ENOMEM;\n+\n+\tmpctl->dev = dev;\n+\tmpctl->cur_select = -1;\n+\n+\tplatform_set_drvdata(pdev, mpctl);\n+\n+\tpctl_desc = devm_kzalloc(dev, sizeof(*pctl_desc), GFP_KERNEL);\n+\tif (!pctl_desc)\n+\t\treturn -ENOMEM;\n+\n+\tret = devm_mutex_init(dev, &mpctl->lock);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tpctl_desc->name = dev_name(dev);\n+\tpctl_desc->owner = THIS_MODULE;\n+\tpctl_desc->pctlops = &mux_pinctrl_ops;\n+\tpctl_desc->pmxops = &mux_pinmux_ops;\n+\n+\tret = devm_pinctrl_register_and_init(dev, pctl_desc, mpctl,\n+\t\t\t\t\t &mpctl->pctl);\n+\tif (ret)\n+\t\treturn dev_err_probe(dev, ret, \"Failed to register pinctrl.\\n\");\n+\n+\tret = pinctrl_enable(mpctl->pctl);\n+\tif (ret)\n+\t\treturn dev_err_probe(dev, ret, \"Failed to enable pinctrl.\\n\");\n+\n+\treturn 0;\n+}\n+\n+static const struct of_device_id mux_pinctrl_of_match[] = {\n+\t{ .compatible = \"pinctrl-multiplexer\" },\n+\t{ }\n+};\n+MODULE_DEVICE_TABLE(of, mux_pinctrl_of_match);\n+\n+static struct platform_driver mux_pinctrl_driver = {\n+\t.driver = {\n+\t\t.name = \"generic-pinctrl-mux\",\n+\t\t.of_match_table = mux_pinctrl_of_match,\n+\t},\n+\t.probe = mux_pinctrl_probe,\n+};\n+module_platform_driver(mux_pinctrl_driver);\n+\n+MODULE_AUTHOR(\"Frank Li <Frank.Li@nxp.com>\");\n+MODULE_DESCRIPTION(\"Generic Pin Control Driver for Board-Level Mux Chips\");\n+MODULE_LICENSE(\"GPL\");\n+\n", "prefixes": [ "v5", "5/7" ] }