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GET /api/patches/2217146/?format=api
{ "id": 2217146, "url": "http://patchwork.ozlabs.org/api/patches/2217146/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327-ltc4283-support-v8-3-471de255d728@analog.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327-ltc4283-support-v8-3-471de255d728@analog.com>", "list_archive_url": null, "date": "2026-03-27T17:26:16", "name": "[v8,3/3] gpio: gpio-ltc4283: Add support for the LTC4283 Swap Controller", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0c1291ff81b047f4314c32f9aea7e1122c270c98", "submitter": { "id": 87565, "url": "http://patchwork.ozlabs.org/api/people/87565/?format=api", "name": "Nuno Sá via B4 Relay", "email": "devnull+nuno.sa.analog.com@kernel.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327-ltc4283-support-v8-3-471de255d728@analog.com/mbox/", "series": [ { "id": 497805, "url": "http://patchwork.ozlabs.org/api/series/497805/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497805", "date": "2026-03-27T17:26:14", "name": "hwmon: Add support for the LTC4283 Hot Swap Controller", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/497805/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217146/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217146/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34290-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=FX6ciFfL;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34290-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"FX6ciFfL\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201" ], "Received": [ "from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fj7DY34JZz1xy1\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 28 Mar 2026 04:39:09 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id AE583300F29B\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 17:25:37 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id A1D7F3EF67D;\n\tFri, 27 Mar 2026 17:25:29 +0000 (UTC)", "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 530023C2798;\n\tFri, 27 Mar 2026 17:25:29 +0000 (UTC)", "by smtp.kernel.org (Postfix) with ESMTPS id 30642C2BCB6;\n\tFri, 27 Mar 2026 17:25:29 +0000 (UTC)", "from aws-us-west-2-korg-lkml-1.web.codeaurora.org\n (localhost.localdomain [127.0.0.1])\n\tby smtp.lore.kernel.org (Postfix) with ESMTP id 2149510F2865;\n\tFri, 27 Mar 2026 17:25:29 +0000 (UTC)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774632329; cv=none;\n b=RLGMO0d3xm6cdGjr8hZgRNpFxb9e4S7CSIIgsoKbz1kw5MVBoo0k1kkw9GCXP6c2a8YptD61InDaKXLk343bBezOQF9ay6HfA5Kgi0ra7N7He43W8awXjEzZQmtIsFggijNG7Kvq+9qiwvhER8/RxA52cuHMLSfciFdSi2g6jZw=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774632329; c=relaxed/simple;\n\tbh=2jWvGlbIxPRe3FDKC+xflLFELENaA9lcaK0B+k0LYg4=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=Cxs3mWBPd1APBGEIQ+ALPZR1hEm4WG1FivcsWkxRQJIPZkwy9SHz23+Ms+hrbpVWwqkiowpkCIXoRCFTyBTPc8Y6AN5wDCfKwCJzxDMjMicp8/ZLe43xQVdD0TNJo+iKlB8rS+rxZxnHPykY1JsVFvX0TWpoWI0+e1WXUtzl+7Y=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=FX6ciFfL; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1774632329;\n\tbh=2jWvGlbIxPRe3FDKC+xflLFELENaA9lcaK0B+k0LYg4=;\n\th=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From;\n\tb=FX6ciFfLRK8hVwxBnVg/5ToXjSxj2hgtz8pBlc3wOGvhi2eWRdoNyUmyCNDhT6eVO\n\t Zw1uxHpL+uUkuhuEIV/Zg+s26tUB77yMjs7viEpKWYFgIcj+vsTVXoxLItjWXGIy9i\n\t eciIG0V67zySSPLHuzi5LcXWvMBME3aXj8qyvmnZ0UL12NjaYfDux2pw0urgf0g6HK\n\t iBGnzBECngbzT9lfdas6CGAfLnE7xZURVTI2QZ6tdl7j8AvkdZZAtguKE/UljTF09v\n\t 5qLgBQrEG0Ic13oHevYE2U/+FDJZaphLirNuugCRMuumNsHL+QG6eYVFO0b223hyjU\n\t fQF433E0T+JdQ==", "From": "=?utf-8?q?Nuno_S=C3=A1_via_B4_Relay?=\n <devnull+nuno.sa.analog.com@kernel.org>", "Date": "Fri, 27 Mar 2026 17:26:16 +0000", "Subject": "[PATCH v8 3/3] gpio: gpio-ltc4283: Add support for the LTC4283\n Swap Controller", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "Message-Id": "<20260327-ltc4283-support-v8-3-471de255d728@analog.com>", "References": "<20260327-ltc4283-support-v8-0-471de255d728@analog.com>", "In-Reply-To": "<20260327-ltc4283-support-v8-0-471de255d728@analog.com>", "To": "linux-gpio@vger.kernel.org, linux-hwmon@vger.kernel.org,\n devicetree@vger.kernel.org, linux-doc@vger.kernel.org", "Cc": "Guenter Roeck <linux@roeck-us.net>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Jonathan Corbet <corbet@lwn.net>,\n Linus Walleij <linusw@kernel.org>, Bartosz Golaszewski <brgl@kernel.org>,\n Bartosz Golaszewski <brgl@kernel.org>", "X-Mailer": "b4 0.15.0", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1774632375; l=8619;\n i=nuno.sa@analog.com; s=20231116; h=from:subject:message-id;\n bh=9lFqSnapPoZW8DXJauUUOY3xCTbTNSj97/K8zd45LJ8=;\n b=Z3SYeLyQPObHC4D/nZvqLewJ8rIvzhuEkhX1Ivo3DHMP1UapNKEniFLX4r8YTpZ3THwCUvzgq\n LXT4bDGWPFLC5Epy6wdloAjD3/+uz77MVkgOwWWilB1nIp5BaBWTGx9", "X-Developer-Key": "i=nuno.sa@analog.com; a=ed25519;\n pk=3NQwYA013OUYZsmDFBf8rmyyr5iQlxV/9H4/Df83o1E=", "X-Endpoint-Received": "by B4 Relay for nuno.sa@analog.com/20231116 with\n auth_id=100", "X-Original-From": "=?utf-8?q?Nuno_S=C3=A1?= <nuno.sa@analog.com>", "Reply-To": "nuno.sa@analog.com" }, "content": "From: Nuno Sá <nuno.sa@analog.com>\n\nThe LTC4283 device has up to 8 pins that can be configured as GPIOs.\n\nNote that PGIO pins are not set as GPIOs by default so if they are\nconfigured to be used as GPIOs we need to make sure to initialize them\nto a sane default. They are set as inputs by default.\n\nAcked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>\nReviewed-by: Linus Walleij <linusw@kernel.org>\nSigned-off-by: Nuno Sá <nuno.sa@analog.com>\n---\n MAINTAINERS | 2 +\n drivers/gpio/Kconfig | 15 +++\n drivers/gpio/Makefile | 1 +\n drivers/gpio/gpio-ltc4283.c | 218 ++++++++++++++++++++++++++++++++++++++++++++\n 4 files changed, 236 insertions(+)", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 38d22cf622b7..0f4fc6c189f6 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -15143,9 +15143,11 @@ F:\tdrivers/hwmon/ltc4282.c\n \n LTC4283 HARDWARE MONITOR AND GPIO DRIVER\n M:\tNuno Sá <nuno.sa@analog.com>\n+L:\tlinux-gpio@vger.kernel.org\n L:\tlinux-hwmon@vger.kernel.org\n S:\tSupported\n F:\tDocumentation/devicetree/bindings/hwmon/adi,ltc4283.yaml\n+F:\tdrivers/gpio/gpio-ltc4283.c\n F:\tdrivers/hwmon/ltc4283.c\n \n LTC4286 HARDWARE MONITOR DRIVER\ndiff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig\nindex b45fb799e36c..ba2621024598 100644\n--- a/drivers/gpio/Kconfig\n+++ b/drivers/gpio/Kconfig\n@@ -1758,6 +1758,21 @@ config GPIO_WM8994\n \n endmenu\n \n+menu \"Auxiliary Bus GPIO drivers\"\n+\tdepends on AUXILIARY_BUS\n+\n+config GPIO_LTC4283\n+\ttristate \"Analog Devices LTC4283 GPIO support\"\n+\tdepends on SENSORS_LTC4283\n+\thelp\n+\t If you say yes here you want the GPIO function available in Analog\n+\t Devices LTC4283 Negative Voltage Hot Swap Controller.\n+\n+\t This driver can also be built as a module. If so, the module will\n+\t be called gpio-ltc4283.\n+\n+endmenu\n+\n menu \"PCI GPIO expanders\"\n \tdepends on PCI\n \ndiff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile\nindex c05f7d795c43..ff37aca5029c 100644\n--- a/drivers/gpio/Makefile\n+++ b/drivers/gpio/Makefile\n@@ -102,6 +102,7 @@ obj-$(CONFIG_GPIO_LP873X)\t\t+= gpio-lp873x.o\n obj-$(CONFIG_GPIO_LP87565)\t\t+= gpio-lp87565.o\n obj-$(CONFIG_GPIO_LPC18XX)\t\t+= gpio-lpc18xx.o\n obj-$(CONFIG_GPIO_LPC32XX)\t\t+= gpio-lpc32xx.o\n+obj-$(CONFIG_GPIO_LTC4283)\t\t+= gpio-ltc4283.o\n obj-$(CONFIG_GPIO_MACSMC)\t\t+= gpio-macsmc.o\n obj-$(CONFIG_GPIO_MADERA)\t\t+= gpio-madera.o\n obj-$(CONFIG_GPIO_MAX3191X)\t\t+= gpio-max3191x.o\ndiff --git a/drivers/gpio/gpio-ltc4283.c b/drivers/gpio/gpio-ltc4283.c\nnew file mode 100644\nindex 000000000000..6609443c5d62\n--- /dev/null\n+++ b/drivers/gpio/gpio-ltc4283.c\n@@ -0,0 +1,218 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+/*\n+ * Analog Devices LTC4283 GPIO driver\n+ *\n+ * Copyright 2025 Analog Devices Inc.\n+ */\n+\n+#include <linux/auxiliary_bus.h>\n+#include <linux/bitfield.h>\n+#include <linux/bitmap.h>\n+#include <linux/bits.h>\n+#include <linux/device.h>\n+#include <linux/gpio/driver.h>\n+#include <linux/mod_devicetable.h>\n+#include <linux/module.h>\n+#include <linux/regmap.h>\n+\n+#define LTC4283_PINS_MAX\t\t\t8\n+#define LTC4283_PGIOX_START_NR\t\t\t4\n+#define LTC4283_INPUT_STATUS\t\t\t0x02\n+#define LTC4283_PGIO_CONFIG\t\t\t0x10\n+#define LTC4283_PGIO_CFG_MASK(pin) \\\n+\tGENMASK(((pin) - LTC4283_PGIOX_START_NR) * 2 + 1, (((pin) - LTC4283_PGIOX_START_NR) * 2))\n+#define LTC4283_PGIO_CONFIG_2\t\t\t0x11\n+\n+#define LTC4283_ADIO_CONFIG\t\t\t0x12\n+/* starts at bit 4 */\n+#define LTC4283_ADIOX_CONFIG_MASK(pin)\tBIT((pin) + 4)\n+#define LTC4283_PGIO_DIR_IN\t\t\t3\n+#define LTC4283_PGIO_DIR_OUT\t\t\t2\n+\n+struct ltc4283_gpio {\n+\tstruct gpio_chip gpio_chip;\n+\tstruct regmap *regmap;\n+};\n+\n+static int ltc4283_pgio_get_direction(const struct ltc4283_gpio *st, unsigned int off)\n+{\n+\tunsigned int val;\n+\tint ret;\n+\n+\tret = regmap_read(st->regmap, LTC4283_PGIO_CONFIG, &val);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tval = field_get(LTC4283_PGIO_CFG_MASK(off), val);\n+\tif (val == LTC4283_PGIO_DIR_IN)\n+\t\treturn GPIO_LINE_DIRECTION_IN;\n+\n+\treturn GPIO_LINE_DIRECTION_OUT;\n+}\n+\n+static int ltc4283_gpio_get_direction(struct gpio_chip *gc, unsigned int off)\n+{\n+\tstruct ltc4283_gpio *st = gpiochip_get_data(gc);\n+\tunsigned int val;\n+\tint ret;\n+\n+\tif (off >= LTC4283_PGIOX_START_NR)\n+\t\treturn ltc4283_pgio_get_direction(st, off);\n+\n+\tret = regmap_read(st->regmap, LTC4283_ADIO_CONFIG, &val);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tif (val & LTC4283_ADIOX_CONFIG_MASK(off))\n+\t\treturn GPIO_LINE_DIRECTION_IN;\n+\n+\treturn GPIO_LINE_DIRECTION_OUT;\n+}\n+\n+static int ltc4283_gpio_direction_set(const struct ltc4283_gpio *st,\n+\t\t\t\t unsigned int off, bool input)\n+{\n+\tif (off >= LTC4283_PGIOX_START_NR) {\n+\t\tunsigned int val = LTC4283_PGIO_DIR_OUT;\n+\n+\t\tif (input)\n+\t\t\tval = LTC4283_PGIO_DIR_IN;\n+\n+\t\tval = field_prep(LTC4283_PGIO_CFG_MASK(off), val);\n+\t\treturn regmap_update_bits(st->regmap, LTC4283_PGIO_CONFIG,\n+\t\t\t\t\t LTC4283_PGIO_CFG_MASK(off), val);\n+\t}\n+\n+\treturn regmap_update_bits(st->regmap, LTC4283_ADIO_CONFIG,\n+\t\t\t\t LTC4283_ADIOX_CONFIG_MASK(off),\n+\t\t\t\t field_prep(LTC4283_ADIOX_CONFIG_MASK(off), input));\n+}\n+\n+static int __ltc4283_gpio_set_value(const struct ltc4283_gpio *st,\n+\t\t\t\t unsigned int off, int val)\n+{\n+\tu32 reg = off < LTC4283_PGIOX_START_NR ? LTC4283_ADIO_CONFIG : LTC4283_PGIO_CONFIG_2;\n+\n+\treturn regmap_update_bits(st->regmap, reg, BIT(off),\n+\t\t\t\t field_prep(BIT(off), !!val));\n+}\n+\n+static int ltc4283_gpio_direction_input(struct gpio_chip *gc, unsigned int off)\n+{\n+\tstruct ltc4283_gpio *st = gpiochip_get_data(gc);\n+\n+\treturn ltc4283_gpio_direction_set(st, off, true);\n+}\n+\n+static int ltc4283_gpio_direction_output(struct gpio_chip *gc, unsigned int off, int val)\n+{\n+\tstruct ltc4283_gpio *st = gpiochip_get_data(gc);\n+\tint ret;\n+\n+\tret = ltc4283_gpio_direction_set(st, off, false);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn __ltc4283_gpio_set_value(st, off, val);\n+}\n+\n+static int ltc4283_gpio_get_value(struct gpio_chip *gc, unsigned int off)\n+{\n+\tstruct ltc4283_gpio *st = gpiochip_get_data(gc);\n+\tunsigned int val, reg;\n+\tint ret, dir;\n+\n+\tdir = ltc4283_gpio_get_direction(gc, off);\n+\tif (dir < 0)\n+\t\treturn dir;\n+\n+\tif (dir == GPIO_LINE_DIRECTION_IN) {\n+\t\tret = regmap_read(st->regmap, LTC4283_INPUT_STATUS, &val);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\n+\t\t/* ADIO1 is at bit 3. */\n+\t\tif (off < LTC4283_PGIOX_START_NR)\n+\t\t\treturn !!(val & BIT(3 - off));\n+\n+\t\t/* PGIO1 is at bit 7. */\n+\t\treturn !!(val & BIT(7 - (off - LTC4283_PGIOX_START_NR)));\n+\t}\n+\n+\tif (off < LTC4283_PGIOX_START_NR)\n+\t\treg = LTC4283_ADIO_CONFIG;\n+\telse\n+\t\treg = LTC4283_PGIO_CONFIG_2;\n+\n+\tret = regmap_read(st->regmap, reg, &val);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn !!(val & BIT(off));\n+}\n+\n+static int ltc4283_gpio_set_value(struct gpio_chip *gc, unsigned int off, int val)\n+{\n+\tstruct ltc4283_gpio *st = gpiochip_get_data(gc);\n+\n+\treturn __ltc4283_gpio_set_value(st, off, val);\n+}\n+\n+static int ltc4283_init_valid_mask(struct gpio_chip *gc, unsigned long *valid_mask,\n+\t\t\t\t unsigned int ngpios)\n+{\n+\tunsigned long *mask = dev_get_platdata(gc->parent);\n+\n+\tbitmap_copy(valid_mask, mask, ngpios);\n+\treturn 0;\n+}\n+\n+static int ltc4283_gpio_probe(struct auxiliary_device *adev,\n+\t\t\t const struct auxiliary_device_id *id)\n+{\n+\tstruct device *dev = &adev->dev;\n+\tstruct ltc4283_gpio *st;\n+\tstruct gpio_chip *gc;\n+\n+\tst = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);\n+\tif (!st)\n+\t\treturn -ENOMEM;\n+\n+\tst->regmap = dev_get_regmap(dev->parent, NULL);\n+\tif (!st->regmap)\n+\t\treturn dev_err_probe(dev, -ENODEV,\n+\t\t\t\t \"Failed to get regmap\\n\");\n+\n+\tgc = &st->gpio_chip;\n+\tgc->parent = dev;\n+\tgc->get_direction = ltc4283_gpio_get_direction;\n+\tgc->direction_input = ltc4283_gpio_direction_input;\n+\tgc->direction_output = ltc4283_gpio_direction_output;\n+\tgc->get = ltc4283_gpio_get_value;\n+\tgc->set = ltc4283_gpio_set_value;\n+\tgc->init_valid_mask = ltc4283_init_valid_mask;\n+\tgc->can_sleep = true;\n+\n+\tgc->base = -1;\n+\tgc->ngpio = LTC4283_PINS_MAX;\n+\tgc->label = adev->name;\n+\tgc->owner = THIS_MODULE;\n+\n+\treturn devm_gpiochip_add_data(dev, &st->gpio_chip, st);\n+}\n+\n+static const struct auxiliary_device_id ltc4283_aux_id_table[] = {\n+\t{ \"ltc4283.gpio\" },\n+\t{ }\n+};\n+MODULE_DEVICE_TABLE(auxiliary, ltc4283_aux_id_table);\n+\n+static struct auxiliary_driver ltc4283_gpio_driver = {\n+\t.probe = ltc4283_gpio_probe,\n+\t.id_table = ltc4283_aux_id_table,\n+};\n+module_auxiliary_driver(ltc4283_gpio_driver);\n+\n+MODULE_AUTHOR(\"Nuno Sá <nuno.sa@analog.com>\");\n+MODULE_DESCRIPTION(\"GPIO LTC4283 Driver\");\n+MODULE_LICENSE(\"GPL\");\n", "prefixes": [ "v8", "3/3" ] }