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GET /api/patches/2217136/?format=api
{ "id": 2217136, "url": "http://patchwork.ozlabs.org/api/patches/2217136/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327171240.3222755-1-mukesh.ojha@oss.qualcomm.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327171240.3222755-1-mukesh.ojha@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-03-27T17:12:39", "name": "[1/2] pinctrl: qcom: eliza: Fix interrupt target bit", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8b06e5d3b676f2998c294530f5a98d01969e0538", "submitter": { "id": 89980, "url": "http://patchwork.ozlabs.org/api/people/89980/?format=api", "name": "Mukesh Ojha", "email": "mukesh.ojha@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327171240.3222755-1-mukesh.ojha@oss.qualcomm.com/mbox/", "series": [ { "id": 497804, "url": "http://patchwork.ozlabs.org/api/series/497804/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497804", "date": "2026-03-27T17:12:40", "name": "[1/2] pinctrl: qcom: eliza: Fix interrupt target bit", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497804/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217136/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217136/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34284-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", 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<konrad.dybcio@oss.qualcomm.com>,\n Abel Vesa <abel.vesa@oss.qualcomm.com>", "Cc": "linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,\n linux-kernel@vger.kernel.org,\n Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>, stable@vger.kernel.org", "Subject": "[PATCH 1/2] pinctrl: qcom: eliza: Fix interrupt target bit", "Date": "Fri, 27 Mar 2026 22:42:39 +0530", "Message-ID": "<20260327171240.3222755-1-mukesh.ojha@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.53.0", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMzI3MDExOSBTYWx0ZWRfXyAyVDZQCWs/h\n 5OtswVVrz+IuR9Y9pON9jFI1qcK2Al5LM23e/z1lROkdsqsdxeyIxaW1BEho2GElmU9aAgQFPht\n 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engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-03-27_01,2026-03-26_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0\n bulkscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 phishscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270119" }, "content": "The intr_target_bit for Eliza was incorrectly set to 5, which is the\nvalue used by older Qualcomm SoCs (e.g. SM8250, MSM8996, X1E80100).\nNewer SoCs such as SM8650, SM8750, Milos, and Kaanapali all use\nbit 8 for the interrupt target field in the TLMM interrupt configuration\nregister.\n\nEliza belongs to the newer generation and should use bit 8 to correctly\nroute interrupts to the KPSS (Applications Processor). Using the wrong\nbit position means the interrupt target routing is silently misconfigured,\nwhich can result in GPIO interrupts not being delivered to the expected\nprocessor.\n\nFix this by aligning Eliza with the correct value used by its peer SoCs.\n\nFixes: 6f26989e15fb (\"pinctrl: qcom: Add Eliza pinctrl driver\")\nCc: stable@vger.kernel.org\nSigned-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>\n---\n drivers/pinctrl/qcom/pinctrl-eliza.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)", "diff": "diff --git a/drivers/pinctrl/qcom/pinctrl-eliza.c b/drivers/pinctrl/qcom/pinctrl-eliza.c\nindex 1a2e6461a69b..19c706137f81 100644\n--- a/drivers/pinctrl/qcom/pinctrl-eliza.c\n+++ b/drivers/pinctrl/qcom/pinctrl-eliza.c\n@@ -47,7 +47,7 @@\n \t\t.intr_status_bit = 0,\t\t\\\n \t\t.intr_wakeup_present_bit = 6,\t\\\n \t\t.intr_wakeup_enable_bit = 7,\t\\\n-\t\t.intr_target_bit = 5,\t\t\\\n+\t\t.intr_target_bit = 8,\t\t\\\n \t\t.intr_target_kpss_val = 3,\t\\\n \t\t.intr_raw_status_bit = 4,\t\\\n \t\t.intr_polarity_bit = 1,\t\t\\\n", "prefixes": [ "1/2" ] }