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GET /api/patches/2217104/?format=api
{ "id": 2217104, "url": "http://patchwork.ozlabs.org/api/patches/2217104/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260327165042.604105-13-pierrick.bouvier@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327165042.604105-13-pierrick.bouvier@linaro.org>", "list_archive_url": null, "date": "2026-03-27T16:50:42", "name": "[v5,12/12] target/arm/tcg/translate.c: replace target_ulong with uint32_t", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d59c92651f6816acc88527dd6e9de5fccd799d57", "submitter": { "id": 85798, "url": "http://patchwork.ozlabs.org/api/people/85798/?format=api", "name": "Pierrick Bouvier", "email": "pierrick.bouvier@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260327165042.604105-13-pierrick.bouvier@linaro.org/mbox/", "series": [ { "id": 497798, "url": "http://patchwork.ozlabs.org/api/series/497798/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497798", "date": "2026-03-27T16:50:36", "name": "target/arm: single-binary", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/497798/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217104/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217104/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=qtny/1ks;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pg1-x52b.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Reviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>\n---\n target/arm/tcg/translate.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c\nindex 4546bbeeeff..204f9657993 100644\n--- a/target/arm/tcg/translate.c\n+++ b/target/arm/tcg/translate.c\n@@ -6450,7 +6450,7 @@ static void arm_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)\n * fields here.\n */\n uint32_t condexec_bits;\n- target_ulong pc_arg = dc->base.pc_next;\n+ uint32_t pc_arg = dc->base.pc_next;\n \n if (tb_cflags(dcbase->tb) & CF_PCREL) {\n pc_arg &= ~TARGET_PAGE_MASK;\n@@ -6612,7 +6612,7 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)\n bool is_16bit;\n /* TCG op to rewind to if this turns out to be an invalid ECI state */\n TCGOp *insn_eci_rewind = NULL;\n- target_ulong insn_eci_pc_save = -1;\n+ uint32_t insn_eci_pc_save = -1;\n \n /* Misaligned thumb PC is architecturally impossible. */\n assert((dc->base.pc_next & 1) == 0);\n", "prefixes": [ "v5", "12/12" ] }