Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2217062/?format=api
{ "id": 2217062, "url": "http://patchwork.ozlabs.org/api/patches/2217062/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-13-yilun.xu@linux.intel.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327160132.2946114-13-yilun.xu@linux.intel.com>", "list_archive_url": null, "date": "2026-03-27T16:01:13", "name": "[v2,12/31] x86/virt/tdx: Enable the Extensions after basic TDX Module init", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f6226e8477ce3ade266390a7509e3d7f12e39478", "submitter": { "id": 87470, "url": "http://patchwork.ozlabs.org/api/people/87470/?format=api", "name": "Xu Yilun", "email": "yilun.xu@linux.intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-13-yilun.xu@linux.intel.com/mbox/", "series": [ { "id": 497793, "url": "http://patchwork.ozlabs.org/api/series/497793/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497793", "date": "2026-03-27T16:01:02", "name": "PCI/TSM: PCIe Link Encryption Establishment via TDX platform services", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497793/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217062/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217062/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51298-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=nHpz8zr0;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-51298-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"nHpz8zr0\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=198.175.65.14", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com" ], "Received": [ "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fj5qf0jWbz1xy1\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 28 Mar 2026 03:35:58 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id C95EA3176046\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 16:26:06 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 301C5371CE2;\n\tFri, 27 Mar 2026 16:23:20 +0000 (UTC)", "from mgamail.intel.com (mgamail.intel.com [198.175.65.14])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id E0228371CFD;\n\tFri, 27 Mar 2026 16:23:17 +0000 (UTC)", "from fmviesa006.fm.intel.com ([10.60.135.146])\n by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Mar 2026 09:23:17 -0700", "from yilunxu-optiplex-7050.sh.intel.com ([10.239.159.165])\n by fmviesa006.fm.intel.com with ESMTP; 27 Mar 2026 09:23:14 -0700" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774628600; cv=none;\n b=fEcpbB60p1xY+MwF3DwwrzqoVfqG4kA0oved2i+HAp9ZtSoN3ox/IB8et9Pb9UCThbW5YAQC3Mtt3JalsaFzsDtjJiIL+Fmo02/N7cNKDBRNWqgQGJowStVFRXul4DW1Gmmjx/8YuKjtMJA+FRxWLaQUbCnAa7l4RcA4/PkL5Ng=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774628600; c=relaxed/simple;\n\tbh=RtbDb463am0ETHo/8RtK51kAaPZf1IlC30Of1RwsQQ0=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version;\n b=ABQQoQZMZsw+XAyIsY2owoRbpiUe5Cq+RX86WXeYJ39lszpdYnTsa/up7IBnrmt0iVg7Pc5fU4En9qhHU8NcCVIhoA/E2ZWWdla16dPj31ul48FQObpo7ZgTuJwbtw4tUxbjVUioLTvuuT0G8TpTGVq6nna379TDc03zazIQ7FA=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=nHpz8zr0; arc=none smtp.client-ip=198.175.65.14", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1774628597; x=1806164597;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=RtbDb463am0ETHo/8RtK51kAaPZf1IlC30Of1RwsQQ0=;\n b=nHpz8zr0bWUolDn8goqbTE4CBVTfwNp3K3hwFp7OB1HJat/t6cIs3C38\n EIAUUCC8J4k9gjNxD00z/g7Jb32ltjJ/kCd66J/ZKSKIv68gCYwwQX/rm\n uU4bIxIODQBJ3kF46U1UKfF9Owe7ExGS1uQrT2+F8gyGC46ZsGF9hTMwX\n x+77W9OmhrvAHTZ+9OlueBBDf6gXEaqbVHOg61CViNrgQEZ149OZEdpYN\n jqdbNMkW6lUpTCgExF/XQISu++jiNpKd0bpKbvyxrLZOPreR00VOaZwwu\n y3QvqwYNkXgpYHeB+171/rZhu1jYVsGmAgzh8PqVHNwKhcylzrhf1BsHp\n A==;", "X-CSE-ConnectionGUID": [ "RoKFU9JATo6mbahaFY405w==", "Bb7IBTbCSyyXuI5HkgFb0g==" ], "X-CSE-MsgGUID": [ "57qmkzDrR7i8I9tuyxjgRQ==", "z3taUSlXSEmCvY8q9njN9w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11741\"; a=\"79565557\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"79565557\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"220516211\"" ], "X-ExtLoop1": "1", "From": "Xu Yilun <yilun.xu@linux.intel.com>", "To": "linux-coco@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdan.j.williams@intel.com,\n\tx86@kernel.org", "Cc": "chao.gao@intel.com,\n\tdave.jiang@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tyilun.xu@linux.intel.com,\n\tyilun.xu@intel.com,\n\tzhenzhong.duan@intel.com,\n\tkvm@vger.kernel.org,\n\trick.p.edgecombe@intel.com,\n\tdave.hansen@linux.intel.com,\n\tkas@kernel.org,\n\txiaoyao.li@intel.com,\n\tvishal.l.verma@intel.com,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v2 12/31] x86/virt/tdx: Enable the Extensions after basic TDX\n Module init", "Date": "Sat, 28 Mar 2026 00:01:13 +0800", "Message-Id": "<20260327160132.2946114-13-yilun.xu@linux.intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "References": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "The detailed initialization flow for TDX Module Extensions has been\nfully implemented. Enable the flow after basic TDX Module\ninitialization.\n\nTheoretically, the Extensions can be initialized later when the first\nusage of the Extension-SEAMCALL comes. That would save or postpone the\nusage of ~50M memory. But it isn't worth the complexity, the needs for\nExtensions are vast but the savings are little for a typical TDX capable\nsystem (about 0.001% of memory). So just enable it along with the basic\nTDX.\n\nSigned-off-by: Xu Yilun <yilun.xu@linux.intel.com>\n---\n arch/x86/virt/vmx/tdx/tdx.c | 6 +++++-\n 1 file changed, 5 insertions(+), 1 deletion(-)", "diff": "diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c\nindex 4134f92425da..0e1ad793e648 100644\n--- a/arch/x86/virt/vmx/tdx/tdx.c\n+++ b/arch/x86/virt/vmx/tdx/tdx.c\n@@ -1580,7 +1580,7 @@ static int tdx_ext_mem_setup(struct tdx_page_array *ext_mem)\n \treturn 0;\n }\n \n-static int __maybe_unused init_tdx_ext(void)\n+static int init_tdx_ext(void)\n {\n \tstruct tdx_page_array *ext_mem = NULL;\n \tunsigned int nr_pages;\n@@ -1705,6 +1705,10 @@ static int init_tdx_module(void)\n \tif (ret)\n \t\tgoto err_reset_pamts;\n \n+\tret = init_tdx_ext();\n+\tif (ret)\n+\t\tgoto err_reset_pamts;\n+\n \tpr_info(\"%lu KB allocated for PAMT\\n\", tdmrs_count_pamt_kb(&tdx_tdmr_list));\n \n out_put_tdxmem:\n", "prefixes": [ "v2", "12/31" ] }