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GET /api/patches/2217058/?format=api
{ "id": 2217058, "url": "http://patchwork.ozlabs.org/api/patches/2217058/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-19-yilun.xu@linux.intel.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327160132.2946114-19-yilun.xu@linux.intel.com>", "list_archive_url": null, "date": "2026-03-27T16:01:19", "name": "[v2,18/31] iommu/vt-d: Cache max domain ID to avoid redundant calculation", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "19d881bb5ab9384d041b8737f86e51caf0b427a4", "submitter": { "id": 87470, "url": "http://patchwork.ozlabs.org/api/people/87470/?format=api", "name": "Xu Yilun", "email": "yilun.xu@linux.intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-19-yilun.xu@linux.intel.com/mbox/", "series": [ { "id": 497793, "url": "http://patchwork.ozlabs.org/api/series/497793/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497793", "date": "2026-03-27T16:01:02", "name": "PCI/TSM: PCIe Link Encryption Establishment via TDX platform services", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497793/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217058/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217058/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51304-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Wb5iqVUj;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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a=\"79565627\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"79565627\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"220516302\"" ], "X-ExtLoop1": "1", "From": "Xu Yilun <yilun.xu@linux.intel.com>", "To": "linux-coco@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdan.j.williams@intel.com,\n\tx86@kernel.org", "Cc": "chao.gao@intel.com,\n\tdave.jiang@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tyilun.xu@linux.intel.com,\n\tyilun.xu@intel.com,\n\tzhenzhong.duan@intel.com,\n\tkvm@vger.kernel.org,\n\trick.p.edgecombe@intel.com,\n\tdave.hansen@linux.intel.com,\n\tkas@kernel.org,\n\txiaoyao.li@intel.com,\n\tvishal.l.verma@intel.com,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v2 18/31] iommu/vt-d: Cache max domain ID to avoid redundant\n calculation", "Date": "Sat, 28 Mar 2026 00:01:19 +0800", "Message-Id": "<20260327160132.2946114-19-yilun.xu@linux.intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "References": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "From: Lu Baolu <baolu.lu@linux.intel.com>\n\nThe cap_ndoms() helper calculates the maximum available domain ID from\nthe value of capability register, which can be inefficient if called\nrepeatedly. Cache the maximum supported domain ID in max_domain_id field\nduring initialization to avoid redundant calls to cap_ndoms() throughout\nthe IOMMU driver.\n\nNo functionality change.\n\nSigned-off-by: Lu Baolu <baolu.lu@linux.intel.com>\nSigned-off-by: Xu Yilun <yilun.xu@linux.intel.com>\n---\n drivers/iommu/intel/iommu.h | 1 +\n drivers/iommu/intel/dmar.c | 1 +\n drivers/iommu/intel/iommu.c | 10 +++++-----\n 3 files changed, 7 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h\nindex 599913fb65d5..4a21ab6a311d 100644\n--- a/drivers/iommu/intel/iommu.h\n+++ b/drivers/iommu/intel/iommu.h\n@@ -705,6 +705,7 @@ struct intel_iommu {\n \t/* mutex to protect domain_ida */\n \tstruct mutex\tdid_lock;\n \tstruct ida\tdomain_ida; /* domain id allocator */\n+\tunsigned long\tmax_domain_id;\n \tunsigned long\t*copied_tables; /* bitmap of copied tables */\n \tspinlock_t\tlock; /* protect context, domain ids */\n \tstruct root_entry *root_entry; /* virtual address */\ndiff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c\nindex d68c06025cac..93efd1a5dc5b 100644\n--- a/drivers/iommu/intel/dmar.c\n+++ b/drivers/iommu/intel/dmar.c\n@@ -1099,6 +1099,7 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd)\n \tspin_lock_init(&iommu->lock);\n \tida_init(&iommu->domain_ida);\n \tmutex_init(&iommu->did_lock);\n+\tiommu->max_domain_id = cap_ndoms(iommu->cap);\n \n \tver = readl(iommu->reg + DMAR_VER_REG);\n \tpr_info(\"%s: reg_base_addr %llx ver %d:%d cap %llx ecap %llx\\n\",\ndiff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c\nindex ef7613b177b9..9a57f78647ed 100644\n--- a/drivers/iommu/intel/iommu.c\n+++ b/drivers/iommu/intel/iommu.c\n@@ -1043,7 +1043,7 @@ int domain_attach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu)\n \t}\n \n \tnum = ida_alloc_range(&iommu->domain_ida, IDA_START_DID,\n-\t\t\t cap_ndoms(iommu->cap) - 1, GFP_KERNEL);\n+\t\t\t iommu->max_domain_id - 1, GFP_KERNEL);\n \tif (num < 0) {\n \t\tpr_err(\"%s: No free domain ids\\n\", iommu->name);\n \t\tgoto err_unlock;\n@@ -1107,7 +1107,7 @@ static void copied_context_tear_down(struct intel_iommu *iommu,\n \tdid_old = context_domain_id(context);\n \tcontext_clear_entry(context);\n \n-\tif (did_old < cap_ndoms(iommu->cap)) {\n+\tif (did_old < iommu->max_domain_id) {\n \t\tiommu->flush.flush_context(iommu, did_old,\n \t\t\t\t\t PCI_DEVID(bus, devfn),\n \t\t\t\t\t DMA_CCMD_MASK_NOBIT,\n@@ -1505,7 +1505,7 @@ static int copy_context_table(struct intel_iommu *iommu,\n \t\t\tcontinue;\n \n \t\tdid = context_domain_id(&ce);\n-\t\tif (did >= 0 && did < cap_ndoms(iommu->cap))\n+\t\tif (did >= 0 && did < iommu->max_domain_id)\n \t\t\tida_alloc_range(&iommu->domain_ida, did, did, GFP_KERNEL);\n \n \t\tset_context_copied(iommu, bus, devfn);\n@@ -2425,7 +2425,7 @@ static ssize_t domains_supported_show(struct device *dev,\n \t\t\t\t struct device_attribute *attr, char *buf)\n {\n \tstruct intel_iommu *iommu = dev_to_intel_iommu(dev);\n-\treturn sysfs_emit(buf, \"%ld\\n\", cap_ndoms(iommu->cap));\n+\treturn sysfs_emit(buf, \"%ld\\n\", iommu->max_domain_id);\n }\n static DEVICE_ATTR_RO(domains_supported);\n \n@@ -2436,7 +2436,7 @@ static ssize_t domains_used_show(struct device *dev,\n \tunsigned int count = 0;\n \tint id;\n \n-\tfor (id = 0; id < cap_ndoms(iommu->cap); id++)\n+\tfor (id = 0; id < iommu->max_domain_id; id++)\n \t\tif (ida_exists(&iommu->domain_ida, id))\n \t\t\tcount++;\n \n", "prefixes": [ "v2", "18/31" ] }