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GET /api/patches/2217057/?format=api
{ "id": 2217057, "url": "http://patchwork.ozlabs.org/api/patches/2217057/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-6-yilun.xu@linux.intel.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327160132.2946114-6-yilun.xu@linux.intel.com>", "list_archive_url": null, "date": "2026-03-27T16:01:06", "name": "[v2,05/31] x86/virt/tdx: Extend tdx_page_array to support IOMMU_MT", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d980c606511c0e59ef91efbca1784dbebe471fe2", "submitter": { "id": 87470, "url": "http://patchwork.ozlabs.org/api/people/87470/?format=api", "name": "Xu Yilun", "email": "yilun.xu@linux.intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-6-yilun.xu@linux.intel.com/mbox/", "series": [ { "id": 497793, "url": "http://patchwork.ozlabs.org/api/series/497793/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497793", "date": "2026-03-27T16:01:02", "name": "PCI/TSM: PCIe Link Encryption Establishment via TDX platform services", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497793/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217057/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217057/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51290-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=R61jeR5W;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=\"79565514\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"79565514\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"220516146\"" ], "X-ExtLoop1": "1", "From": "Xu Yilun <yilun.xu@linux.intel.com>", "To": "linux-coco@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdan.j.williams@intel.com,\n\tx86@kernel.org", "Cc": "chao.gao@intel.com,\n\tdave.jiang@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tyilun.xu@linux.intel.com,\n\tyilun.xu@intel.com,\n\tzhenzhong.duan@intel.com,\n\tkvm@vger.kernel.org,\n\trick.p.edgecombe@intel.com,\n\tdave.hansen@linux.intel.com,\n\tkas@kernel.org,\n\txiaoyao.li@intel.com,\n\tvishal.l.verma@intel.com,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v2 05/31] x86/virt/tdx: Extend tdx_page_array to support\n IOMMU_MT", "Date": "Sat, 28 Mar 2026 00:01:06 +0800", "Message-Id": "<20260327160132.2946114-6-yilun.xu@linux.intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "References": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "IOMMU_MT is another TDX Module defined structure similar to HPA_ARRAY_T\nand HPA_LIST_INFO. The difference is it requires multi-order contiguous\npages for some entries. It adds an additional NUM_PAGES field for every\nmulti-order page entry.\n\nAdd a dedicated allocation helper for IOMMU_MT. Fortunately put_page()\nworks well for both single pages and multi-order folios, simplifying the\ncleanup logic for all allocation methods.\n\nSigned-off-by: Xu Yilun <yilun.xu@linux.intel.com>\n---\n arch/x86/include/asm/tdx.h | 2 +\n arch/x86/virt/vmx/tdx/tdx.c | 90 +++++++++++++++++++++++++++++++++++--\n 2 files changed, 89 insertions(+), 3 deletions(-)", "diff": "diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h\nindex 9173a432b312..d5f1d7b7d1e7 100644\n--- a/arch/x86/include/asm/tdx.h\n+++ b/arch/x86/include/asm/tdx.h\n@@ -175,6 +175,8 @@ void tdx_page_array_ctrl_leak(struct tdx_page_array *array);\n int tdx_page_array_ctrl_release(struct tdx_page_array *array,\n \t\t\t\tunsigned int nr_released,\n \t\t\t\tu64 released_hpa);\n+struct tdx_page_array *\n+tdx_page_array_create_iommu_mt(unsigned int iq_order, unsigned int nr_mt_pages);\n \n struct tdx_td {\n \t/* TD root structure: */\ndiff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c\nindex 6c4ed80e8e5a..2b17e0f73dac 100644\n--- a/arch/x86/virt/vmx/tdx/tdx.c\n+++ b/arch/x86/virt/vmx/tdx/tdx.c\n@@ -275,8 +275,15 @@ static int tdx_page_array_populate(struct tdx_page_array *array,\n \t\t\t TDX_PAGE_ARRAY_MAX_NENTS);\n \n \tentries = array->root;\n-\tfor (i = 0; i < array->nents; i++)\n-\t\tentries[i] = page_to_phys(array->pages[offset + i]);\n+\tfor (i = 0; i < array->nents; i++) {\n+\t\tstruct page *page = array->pages[offset + i];\n+\n+\t\tentries[i] = page_to_phys(page);\n+\n+\t\t/* Now only for iommu_mt */\n+\t\tif (compound_nr(page) > 1)\n+\t\t\tentries[i] |= compound_nr(page);\n+\t}\n \n \treturn array->nents;\n }\n@@ -286,7 +293,7 @@ static void tdx_free_pages_bulk(unsigned int nr_pages, struct page **pages)\n \tint i;\n \n \tfor (i = 0; i < nr_pages; i++)\n-\t\t__free_page(pages[i]);\n+\t\tput_page(pages[i]);\n }\n \n static int tdx_alloc_pages_bulk(unsigned int nr_pages, struct page **pages,\n@@ -463,6 +470,10 @@ static bool tdx_page_array_validate_release(struct tdx_page_array *array,\n \t\t\tstruct page *page = array->pages[offset + i];\n \t\t\tu64 val = page_to_phys(page);\n \n+\t\t\t/* Now only for iommu_mt */\n+\t\t\tif (compound_nr(page) > 1)\n+\t\t\t\tval |= compound_nr(page);\n+\n \t\t\tif (val != entries[i]) {\n \t\t\t\tpr_err(\"%s entry[%d] [0x%llx] doesn't match page hpa [0x%llx]\\n\",\n \t\t\t\t __func__, i, entries[i], val);\n@@ -555,6 +566,79 @@ tdx_page_array_alloc_contig(unsigned int nr_pages)\n \treturn tdx_page_array_alloc(nr_pages, tdx_alloc_pages_contig, NULL);\n }\n \n+static int tdx_alloc_pages_iommu_mt(unsigned int nr_pages, struct page **pages,\n+\t\t\t\t void *data)\n+{\n+\tunsigned int iq_order = (unsigned int)(long)data;\n+\tstruct folio *t_iq, *t_ctxiq;\n+\tint ret;\n+\n+\t/* TODO: folio_alloc_node() is preferred, but need numa info */\n+\tt_iq = folio_alloc(GFP_KERNEL | __GFP_ZERO, iq_order);\n+\tif (!t_iq)\n+\t\treturn -ENOMEM;\n+\n+\tt_ctxiq = folio_alloc(GFP_KERNEL | __GFP_ZERO, iq_order);\n+\tif (!t_ctxiq) {\n+\t\tret = -ENOMEM;\n+\t\tgoto out_t_iq;\n+\t}\n+\n+\tret = tdx_alloc_pages_bulk(nr_pages - 2, pages + 2, NULL);\n+\tif (ret)\n+\t\tgoto out_t_ctxiq;\n+\n+\tpages[0] = folio_page(t_iq, 0);\n+\tpages[1] = folio_page(t_ctxiq, 0);\n+\n+\treturn 0;\n+\n+out_t_ctxiq:\n+\tfolio_put(t_ctxiq);\n+out_t_iq:\n+\tfolio_put(t_iq);\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * tdx_page_array_create_iommu_mt() - Create a page array for IOMMU Memory Tables\n+ * @iq_order: The allocation order for the IOMMU Invalidation Queue.\n+ * @nr_mt_pages: Number of additional order-0 pages for the MT.\n+ *\n+ * Allocate and populate a specialized tdx_page_array for IOMMU_MT structures.\n+ * The resulting array consists of two multi-order folios (at index 0 and 1)\n+ * followed by the requested number of order-0 pages.\n+ *\n+ * Return: Fully populated tdx_page_array or NULL on failure.\n+ */\n+struct tdx_page_array *\n+tdx_page_array_create_iommu_mt(unsigned int iq_order, unsigned int nr_mt_pages)\n+{\n+\tunsigned int nr_pages = nr_mt_pages + 2;\n+\tstruct tdx_page_array *array;\n+\tint populated;\n+\n+\tif (nr_pages > TDX_PAGE_ARRAY_MAX_NENTS)\n+\t\treturn NULL;\n+\n+\tarray = tdx_page_array_alloc(nr_pages, tdx_alloc_pages_iommu_mt,\n+\t\t\t\t (void *)(long)iq_order);\n+\tif (!array)\n+\t\treturn NULL;\n+\n+\tpopulated = tdx_page_array_populate(array, 0);\n+\tif (populated != nr_pages)\n+\t\tgoto out_free;\n+\n+\treturn array;\n+\n+out_free:\n+\ttdx_page_array_free(array);\n+\treturn NULL;\n+}\n+EXPORT_SYMBOL_GPL(tdx_page_array_create_iommu_mt);\n+\n #define HPA_LIST_INFO_FIRST_ENTRY\tGENMASK_U64(11, 3)\n #define HPA_LIST_INFO_PFN\t\tGENMASK_U64(51, 12)\n #define HPA_LIST_INFO_LAST_ENTRY\tGENMASK_U64(63, 55)\n", "prefixes": [ "v2", "05/31" ] }