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GET /api/patches/2217052/?format=api
{ "id": 2217052, "url": "http://patchwork.ozlabs.org/api/patches/2217052/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-3-yilun.xu@linux.intel.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327160132.2946114-3-yilun.xu@linux.intel.com>", "list_archive_url": null, "date": "2026-03-27T16:01:03", "name": "[v2,02/31] x86/virt/tdx: Move bit definitions of TDX_FEATURES0 to public header", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9362f4cf606994cc82d758e2fcb38f198d265968", "submitter": { "id": 87470, "url": "http://patchwork.ozlabs.org/api/people/87470/?format=api", "name": "Xu Yilun", "email": "yilun.xu@linux.intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-3-yilun.xu@linux.intel.com/mbox/", "series": [ { "id": 497793, "url": "http://patchwork.ozlabs.org/api/series/497793/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497793", "date": "2026-03-27T16:01:02", "name": "PCI/TSM: PCIe Link Encryption Establishment via TDX platform services", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497793/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217052/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217052/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51287-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=gD3cKNzD;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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a=\"79565497\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"79565497\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"220516125\"" ], "X-ExtLoop1": "1", "From": "Xu Yilun <yilun.xu@linux.intel.com>", "To": "linux-coco@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdan.j.williams@intel.com,\n\tx86@kernel.org", "Cc": "chao.gao@intel.com,\n\tdave.jiang@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tyilun.xu@linux.intel.com,\n\tyilun.xu@intel.com,\n\tzhenzhong.duan@intel.com,\n\tkvm@vger.kernel.org,\n\trick.p.edgecombe@intel.com,\n\tdave.hansen@linux.intel.com,\n\tkas@kernel.org,\n\txiaoyao.li@intel.com,\n\tvishal.l.verma@intel.com,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v2 02/31] x86/virt/tdx: Move bit definitions of TDX_FEATURES0\n to public header", "Date": "Sat, 28 Mar 2026 00:01:03 +0800", "Message-Id": "<20260327160132.2946114-3-yilun.xu@linux.intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "References": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "Move bit definitions of TDX_FEATURES0 to TDX core public header.\n\nKernel users get TDX_FEATURES0 bitmap via tdx_get_sysinfo(). It is\nreasonable to also public the definitions of each bit. TDX Connect (a\nnew TDX feature to enable Trusted I/O virtualization) will add new bits\nand check them in separate kernel modules.\n\nTake the opportunity to change its type to BIT_ULL since TDX_FEATURES0\nis explicitly defined as 64-bit in both TDX Module Specification and\nTDX core code.\n\nSigned-off-by: Xu Yilun <yilun.xu@linux.intel.com>\n---\n arch/x86/include/asm/tdx.h | 4 ++++\n arch/x86/virt/vmx/tdx/tdx.h | 3 ---\n 2 files changed, 4 insertions(+), 3 deletions(-)", "diff": "diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h\nindex e040e0467ae4..65c4da396450 100644\n--- a/arch/x86/include/asm/tdx.h\n+++ b/arch/x86/include/asm/tdx.h\n@@ -127,6 +127,10 @@ static __always_inline u64 sc_retry(sc_func_t func, u64 fn,\n int tdx_cpu_enable(void);\n int tdx_enable(void);\n const char *tdx_dump_mce_info(struct mce *m);\n+\n+/* Bit definitions of TDX_FEATURES0 metadata field */\n+#define TDX_FEATURES0_NO_RBP_MOD\tBIT_ULL(18)\n+\n const struct tdx_sys_info *tdx_get_sysinfo(void);\n \n int tdx_guest_keyid_alloc(void);\ndiff --git a/arch/x86/virt/vmx/tdx/tdx.h b/arch/x86/virt/vmx/tdx/tdx.h\nindex 82bb82be8567..c641b4632826 100644\n--- a/arch/x86/virt/vmx/tdx/tdx.h\n+++ b/arch/x86/virt/vmx/tdx/tdx.h\n@@ -84,9 +84,6 @@ struct tdmr_info {\n \tDECLARE_FLEX_ARRAY(struct tdmr_reserved_area, reserved_areas);\n } __packed __aligned(TDMR_INFO_ALIGNMENT);\n \n-/* Bit definitions of TDX_FEATURES0 metadata field */\n-#define TDX_FEATURES0_NO_RBP_MOD\tBIT(18)\n-\n /*\n * Do not put any hardware-defined TDX structure representations below\n * this comment!\n", "prefixes": [ "v2", "02/31" ] }