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GET /api/patches/2217051/?format=api
{ "id": 2217051, "url": "http://patchwork.ozlabs.org/api/patches/2217051/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-2-yilun.xu@linux.intel.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327160132.2946114-2-yilun.xu@linux.intel.com>", "list_archive_url": null, "date": "2026-03-27T16:01:02", "name": "[v2,01/31] x86/tdx: Move all TDX error defines into <asm/shared/tdx_errno.h>", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "10f25d94fbd619ebbf709d9013483e641c004694", "submitter": { "id": 87470, "url": "http://patchwork.ozlabs.org/api/people/87470/?format=api", "name": "Xu Yilun", "email": "yilun.xu@linux.intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327160132.2946114-2-yilun.xu@linux.intel.com/mbox/", "series": [ { "id": 497793, "url": "http://patchwork.ozlabs.org/api/series/497793/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497793", "date": "2026-03-27T16:01:02", "name": "PCI/TSM: PCIe Link Encryption Establishment via TDX platform services", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497793/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2217051/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2217051/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51286-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=BtqQAND4;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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a=\"79565486\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"79565486\"", "E=Sophos;i=\"6.23,144,1770624000\";\n d=\"scan'208\";a=\"220516112\"" ], "X-ExtLoop1": "1", "From": "Xu Yilun <yilun.xu@linux.intel.com>", "To": "linux-coco@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tdan.j.williams@intel.com,\n\tx86@kernel.org", "Cc": "chao.gao@intel.com,\n\tdave.jiang@intel.com,\n\tbaolu.lu@linux.intel.com,\n\tyilun.xu@linux.intel.com,\n\tyilun.xu@intel.com,\n\tzhenzhong.duan@intel.com,\n\tkvm@vger.kernel.org,\n\trick.p.edgecombe@intel.com,\n\tdave.hansen@linux.intel.com,\n\tkas@kernel.org,\n\txiaoyao.li@intel.com,\n\tvishal.l.verma@intel.com,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v2 01/31] x86/tdx: Move all TDX error defines into\n <asm/shared/tdx_errno.h>", "Date": "Sat, 28 Mar 2026 00:01:02 +0800", "Message-Id": "<20260327160132.2946114-2-yilun.xu@linux.intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "References": "<20260327160132.2946114-1-yilun.xu@linux.intel.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "From: \"Kirill A. Shutemov\" <kirill.shutemov@linux.intel.com>\n\nToday there are two separate locations where TDX error codes are defined:\n arch/x86/include/asm/tdx.h\n arch/x86/kvm/vmx/tdx_errno.h\n\nThey have some overlap that is already defined similarly. Reduce the\nduplication and prepare to introduce some helpers for these error codes in\nthe central place by unifying them. Join them at:\n asm/shared/tdx_errno.h\n...and update the headers that contained the duplicated definitions to\ninclude the new unified header.\n\n\"asm/shared\" is used for sharing TDX code between the early compressed\ncode and the normal kernel code. While the compressed code for the guest\ndoesn't use these error code header definitions today, it does make the\ntypes of calls that return the values they define. So place the defines in\n\"shared\" location so that it can, but leave such cleanups for future\nchanges.\n\nAlso, adjust BITUL() -> _BITULL() to address 32 bit build errors after the\nmove.\n\nSigned-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>\n[enhance log]\nSigned-off-by: Rick Edgecombe <rick.p.edgecombe@intel.com>\nSigned-off-by: Vishal Verma <vishal.l.verma@intel.com>\nReviewed-by: Chao Gao <chao.gao@intel.com>\n---\n arch/x86/include/asm/shared/tdx.h | 1 +\n .../vmx => include/asm/shared}/tdx_errno.h | 28 +++++++++++++++----\n arch/x86/include/asm/tdx.h | 21 --------------\n arch/x86/kvm/vmx/tdx.h | 1 -\n 4 files changed, 23 insertions(+), 28 deletions(-)\n rename arch/x86/{kvm/vmx => include/asm/shared}/tdx_errno.h (64%)", "diff": "diff --git a/arch/x86/include/asm/shared/tdx.h b/arch/x86/include/asm/shared/tdx.h\nindex 8bc074c8d7c6..6a1646fc2b2f 100644\n--- a/arch/x86/include/asm/shared/tdx.h\n+++ b/arch/x86/include/asm/shared/tdx.h\n@@ -4,6 +4,7 @@\n \n #include <linux/bits.h>\n #include <linux/types.h>\n+#include <asm/shared/tdx_errno.h>\n \n #define TDX_HYPERCALL_STANDARD 0\n \ndiff --git a/arch/x86/kvm/vmx/tdx_errno.h b/arch/x86/include/asm/shared/tdx_errno.h\nsimilarity index 64%\nrename from arch/x86/kvm/vmx/tdx_errno.h\nrename to arch/x86/include/asm/shared/tdx_errno.h\nindex 6ff4672c4181..8bf6765cf082 100644\n--- a/arch/x86/kvm/vmx/tdx_errno.h\n+++ b/arch/x86/include/asm/shared/tdx_errno.h\n@@ -1,14 +1,15 @@\n /* SPDX-License-Identifier: GPL-2.0 */\n-/* architectural status code for SEAMCALL */\n-\n-#ifndef __KVM_X86_TDX_ERRNO_H\n-#define __KVM_X86_TDX_ERRNO_H\n+#ifndef _ASM_X86_SHARED_TDX_ERRNO_H\n+#define _ASM_X86_SHARED_TDX_ERRNO_H\n+#include <asm/trapnr.h>\n \n+/* Upper 32 bit of the TDX error code encodes the status */\n #define TDX_SEAMCALL_STATUS_MASK\t\t0xFFFFFFFF00000000ULL\n \n /*\n- * TDX SEAMCALL Status Codes (returned in RAX)\n+ * TDX Status Codes (returned in RAX)\n */\n+#define TDX_SUCCESS\t\t\t\t0ULL\n #define TDX_NON_RECOVERABLE_VCPU\t\t0x4000000100000000ULL\n #define TDX_NON_RECOVERABLE_TD\t\t\t0x4000000200000000ULL\n #define TDX_NON_RECOVERABLE_TD_NON_ACCESSIBLE\t0x6000000500000000ULL\n@@ -17,6 +18,7 @@\n #define TDX_OPERAND_INVALID\t\t\t0xC000010000000000ULL\n #define TDX_OPERAND_BUSY\t\t\t0x8000020000000000ULL\n #define TDX_PREVIOUS_TLB_EPOCH_BUSY\t\t0x8000020100000000ULL\n+#define TDX_RND_NO_ENTROPY\t\t\t0x8000020300000000ULL\n #define TDX_PAGE_METADATA_INCORRECT\t\t0xC000030000000000ULL\n #define TDX_VCPU_NOT_ASSOCIATED\t\t\t0x8000070200000000ULL\n #define TDX_KEY_GENERATION_FAILED\t\t0x8000080000000000ULL\n@@ -28,6 +30,20 @@\n #define TDX_EPT_ENTRY_STATE_INCORRECT\t\t0xC0000B0D00000000ULL\n #define TDX_METADATA_FIELD_NOT_READABLE\t\t0xC0000C0200000000ULL\n \n+/*\n+ * SW-defined error codes.\n+ *\n+ * Bits 47:40 == 0xFF indicate Reserved status code class that never used by\n+ * TDX module.\n+ */\n+#define TDX_ERROR\t\t\t_BITULL(63)\n+#define TDX_NON_RECOVERABLE\t\t_BITULL(62)\n+#define TDX_SW_ERROR\t\t\t(TDX_ERROR | GENMASK_ULL(47, 40))\n+#define TDX_SEAMCALL_VMFAILINVALID\t(TDX_SW_ERROR | _ULL(0xFFFF0000))\n+\n+#define TDX_SEAMCALL_GP\t\t\t(TDX_SW_ERROR | X86_TRAP_GP)\n+#define TDX_SEAMCALL_UD\t\t\t(TDX_SW_ERROR | X86_TRAP_UD)\n+\n /*\n * TDX module operand ID, appears in 31:0 part of error code as\n * detail information\n@@ -37,4 +53,4 @@\n #define TDX_OPERAND_ID_SEPT\t\t\t0x92\n #define TDX_OPERAND_ID_TD_EPOCH\t\t\t0xa9\n \n-#endif /* __KVM_X86_TDX_ERRNO_H */\n+#endif /* _ASM_X86_SHARED_TDX_ERRNO_H */\ndiff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h\nindex 6b338d7f01b7..e040e0467ae4 100644\n--- a/arch/x86/include/asm/tdx.h\n+++ b/arch/x86/include/asm/tdx.h\n@@ -9,29 +9,8 @@\n \n #include <asm/errno.h>\n #include <asm/ptrace.h>\n-#include <asm/trapnr.h>\n #include <asm/shared/tdx.h>\n \n-/*\n- * SW-defined error codes.\n- *\n- * Bits 47:40 == 0xFF indicate Reserved status code class that never used by\n- * TDX module.\n- */\n-#define TDX_ERROR\t\t\t_BITUL(63)\n-#define TDX_NON_RECOVERABLE\t\t_BITUL(62)\n-#define TDX_SW_ERROR\t\t\t(TDX_ERROR | GENMASK_ULL(47, 40))\n-#define TDX_SEAMCALL_VMFAILINVALID\t(TDX_SW_ERROR | _UL(0xFFFF0000))\n-\n-#define TDX_SEAMCALL_GP\t\t\t(TDX_SW_ERROR | X86_TRAP_GP)\n-#define TDX_SEAMCALL_UD\t\t\t(TDX_SW_ERROR | X86_TRAP_UD)\n-\n-/*\n- * TDX module SEAMCALL leaf function error codes\n- */\n-#define TDX_SUCCESS\t\t0ULL\n-#define TDX_RND_NO_ENTROPY\t0x8000020300000000ULL\n-\n #ifndef __ASSEMBLER__\n \n #include <uapi/asm/mce.h>\ndiff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h\nindex 45b5183ccb36..ce2720a028ad 100644\n--- a/arch/x86/kvm/vmx/tdx.h\n+++ b/arch/x86/kvm/vmx/tdx.h\n@@ -3,7 +3,6 @@\n #define __KVM_X86_VMX_TDX_H\n \n #include \"tdx_arch.h\"\n-#include \"tdx_errno.h\"\n \n #ifdef CONFIG_KVM_INTEL_TDX\n #include \"common.h\"\n", "prefixes": [ "v2", "01/31" ] }