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GET /api/patches/2216946/?format=api
{ "id": 2216946, "url": "http://patchwork.ozlabs.org/api/patches/2216946/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260327-tpm-tis-sysbus-ppi-v2-3-d8ec84d25dbc@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327-tpm-tis-sysbus-ppi-v2-3-d8ec84d25dbc@redhat.com>", "list_archive_url": null, "date": "2026-03-27T11:48:24", "name": "[v2,3/3] hw/tpm: add PPI support to tpm-tis-device for ARM64 virt", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a40eccb19479b5903d64d24c7ba08c4ab3ce19e6", "submitter": { "id": 92626, "url": "http://patchwork.ozlabs.org/api/people/92626/?format=api", "name": "Mohammadfaiz Bawa", "email": "mbawa@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260327-tpm-tis-sysbus-ppi-v2-3-d8ec84d25dbc@redhat.com/mbox/", "series": [ { "id": 497755, "url": "http://patchwork.ozlabs.org/api/series/497755/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497755", "date": "2026-03-27T11:48:21", "name": "hw/tpm: add PPI support to tpm-tis-device on ARM64 virt", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497755/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216946/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216946/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=ippvXZ2t;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhzT608nVz1yFr\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 22:49:30 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w65gc-00079d-1G; Fri, 27 Mar 2026 07:49:10 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mbawa@redhat.com>) id 1w65gY-00072m-Oy\n for qemu-devel@nongnu.org; Fri, 27 Mar 2026 07:49:06 -0400", "from us-smtp-delivery-124.mimecast.com ([170.10.129.124])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mbawa@redhat.com>) id 1w65gX-0000Tq-2f\n for qemu-devel@nongnu.org; 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a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1774612143;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=Wj7VSdrmGeyQcqp1ipO/DIQIPTkNGA4voSl6q8ut08k=;\n b=ippvXZ2tH3opKo/lnHAPKTIIzjMcGkJsO7wPcV8C3T77iGMuTq9PVzRFmWpFBd8eWkYC+c\n d+cZ7BLhXCt9xahuj7mKDWB0czMXoutY6RX7Ih1wryWaz2ilkwFK189jL75cuvuJdpEfwI\n 5SVFVe+p5jxqhB1FlVvKNv5Rzd3q6Gg=", "X-MC-Unique": "_znI0Om5NseDR4LLQLxjQw-1", "X-Mimecast-MFC-AGG-ID": "_znI0Om5NseDR4LLQLxjQw_1774612138", "From": "Mohammadfaiz Bawa <mbawa@redhat.com>", "To": "qemu-devel@nongnu.org", "Cc": "stefanb@linux.vnet.ibm.com, pierrick.bouvier@linaro.org,\n \"Michael S . Tsirkin\" <mst@redhat.com>, imammedo@redhat.com,\n anisinha@redhat.com, peter.maydell@linaro.org, shannon.zhaosl@gmail.com,\n qemu-arm@nongnu.org, mohamed@unpredictable.fr,\n Mohammadfaiz Bawa <mbawa@redhat.com>, Stefan Berger <stefanb@linux.ibm.com>", "Subject": "[PATCH v2 3/3] hw/tpm: add PPI support to tpm-tis-device for ARM64\n virt", "Date": "Fri, 27 Mar 2026 17:18:24 +0530", "Message-ID": "<20260327-tpm-tis-sysbus-ppi-v2-3-d8ec84d25dbc@redhat.com>", "In-Reply-To": "<20260327-tpm-tis-sysbus-ppi-v2-0-d8ec84d25dbc@redhat.com>", "References": "<20260327-tpm-tis-sysbus-ppi-v2-0-d8ec84d25dbc@redhat.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "X-Scanned-By": "MIMEDefang 3.0 on 10.30.177.12", "Received-SPF": "pass client-ip=170.10.129.124; envelope-from=mbawa@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Add PPI memory region and ACPI _STA, _DSM to tpm-tis-sysbus so\nWindows 11 ARM64 guests no longer log Event ID 15 errors from\ntpm.sys on every boot.\n\nReviewed-by: Stefan Berger <stefanb@linux.ibm.com>\nSigned-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>\n---\n hw/arm/virt-acpi-build.c | 9 ++++++++-\n hw/tpm/tpm_tis_sysbus.c | 11 +++++++++++\n 2 files changed, 19 insertions(+), 1 deletion(-)", "diff": "diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c\nindex 719d2f994e65f976f6e754259d0b4f1336f82f13..27a7389a33df221a9dfb0cde1bc35b3ab62e56be 100644\n--- a/hw/arm/virt-acpi-build.c\n+++ b/hw/arm/virt-acpi-build.c\n@@ -240,7 +240,8 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms)\n Aml *dev = aml_device(\"TPM0\");\n aml_append(dev, aml_name_decl(\"_HID\", aml_string(\"MSFT0101\")));\n aml_append(dev, aml_name_decl(\"_STR\", aml_string(\"TPM 2.0 Device\")));\n- aml_append(dev, aml_name_decl(\"_UID\", aml_int(0)));\n+ aml_append(dev, aml_name_decl(\"_UID\", aml_int(1)));\n+ aml_append(dev, aml_name_decl(\"_STA\", aml_int(0xF)));\n \n Aml *crs = aml_resource_template();\n aml_append(crs,\n@@ -248,6 +249,12 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms)\n (uint32_t)memory_region_size(sbdev_mr),\n AML_READ_WRITE));\n aml_append(dev, aml_name_decl(\"_CRS\", crs));\n+\n+ hwaddr ppi_base = platform_bus_get_mmio_addr(pbus, sbdev, 1);\n+ if (ppi_base != -1) {\n+ ppi_base += pbus_base;\n+ tpm_build_ppi_acpi(TPM_IF(sbdev), dev, ppi_base);\n+ }\n aml_append(scope, dev);\n }\n #endif\ndiff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c\nindex e9372e7316305fe1a4d415a712ab516e0fd5f073..f8b63dd4607cacb319e27ea83e421ec5bdc1cb0f 100644\n--- a/hw/tpm/tpm_tis_sysbus.c\n+++ b/hw/tpm/tpm_tis_sysbus.c\n@@ -30,6 +30,7 @@\n #include \"hw/core/sysbus.h\"\n #include \"tpm_tis.h\"\n #include \"qom/object.h\"\n+#include \"qemu/memalign.h\"\n \n struct TPMStateSysBus {\n /*< private >*/\n@@ -93,12 +94,14 @@ static void tpm_tis_sysbus_reset(DeviceState *dev)\n static const Property tpm_tis_sysbus_properties[] = {\n DEFINE_PROP_UINT32(\"irq\", TPMStateSysBus, state.irq_num, TPM_TIS_IRQ),\n DEFINE_PROP_TPMBE(\"tpmdev\", TPMStateSysBus, state.be_driver),\n+ DEFINE_PROP_BOOL(\"ppi\", TPMStateSysBus, state.ppi_enabled, true),\n };\n \n static void tpm_tis_sysbus_initfn(Object *obj)\n {\n TPMStateSysBus *sbdev = TPM_TIS_SYSBUS(obj);\n TPMState *s = &sbdev->state;\n+ size_t host_page_size = qemu_real_host_page_size();\n \n memory_region_init_io(&s->mmio, obj, &tpm_tis_memory_ops,\n s, \"tpm-tis-mmio\",\n@@ -106,6 +109,12 @@ static void tpm_tis_sysbus_initfn(Object *obj)\n \n sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);\n sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);\n+\n+ s->ppi.buf = qemu_memalign(host_page_size,\n+ ROUND_UP(TPM_PPI_ADDR_SIZE, host_page_size));\n+ memory_region_init_ram_device_ptr(&s->ppi.ram, obj, \"tpm-ppi\",\n+ TPM_PPI_ADDR_SIZE, s->ppi.buf);\n+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->ppi.ram);\n }\n \n static void tpm_tis_sysbus_realizefn(DeviceState *dev, Error **errp)\n@@ -122,6 +131,8 @@ static void tpm_tis_sysbus_realizefn(DeviceState *dev, Error **errp)\n error_setg(errp, \"'tpmdev' property is required\");\n return;\n }\n+\n+ vmstate_register_ram(&s->ppi.ram, dev);\n }\n \n static void tpm_tis_sysbus_class_init(ObjectClass *klass, const void *data)\n", "prefixes": [ "v2", "3/3" ] }