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GET /api/patches/2216939/?format=api
{ "id": 2216939, "url": "http://patchwork.ozlabs.org/api/patches/2216939/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327113006.3135663-2-andre.przywara@arm.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327113006.3135663-2-andre.przywara@arm.com>", "list_archive_url": null, "date": "2026-03-27T11:30:04", "name": "[v2,1/3] pinctrl: sunxi: a523: Remove unneeded IRQ remuxing flag", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "54cdc6e42893d94d585f43865da57d1488a8da06", "submitter": { "id": 61837, "url": "http://patchwork.ozlabs.org/api/people/61837/?format=api", "name": "Andre Przywara", "email": "andre.przywara@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260327113006.3135663-2-andre.przywara@arm.com/mbox/", "series": [ { "id": 497753, "url": "http://patchwork.ozlabs.org/api/series/497753/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497753", "date": "2026-03-27T11:30:03", "name": "pinctrl: sunxi: a523: fix GPIO IRQ operation", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497753/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216939/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216939/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34261-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256\n header.s=foss header.b=AErEQxpS;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34261-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com\n header.b=\"AErEQxpS\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=217.140.110.172", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=arm.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=arm.com" ], "Received": [ "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhz5W0Z3rz1y1x\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 22:32:31 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 349DC3033506\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 11:30:30 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5407634B425;\n\tFri, 27 Mar 2026 11:30:23 +0000 (UTC)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 8822C3BF66E;\n\tFri, 27 Mar 2026 11:30:18 +0000 (UTC)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B04A135A5;\n\tFri, 27 Mar 2026 04:30:11 -0700 (PDT)", "from e142021.cambridge.arm.com (e142021.arm.com [10.1.36.137])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 18AFE3F915;\n\tFri, 27 Mar 2026 04:30:14 -0700 (PDT)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774611022; cv=none;\n b=NhPSIv4QrAejc3lIy65i6F5Q8Z7BxxbRGE0LSUgWZMDSTKwsPAh7m/amhTZ5XLZZPLZTytIkIsVj7RdLc8UDSNFyOP0wyBvXegk4CNgM7bm+eSwXzQM9ycaAxPf5QiMbqTBTvF7PRqfosH4UqwRedjIdSvlrfwVy0exc2C+KBJM=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774611022; c=relaxed/simple;\n\tbh=P+xaz+0AM8oCDJ+fmGXliUwK+vicc4AlZE4yIXarY4w=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=gS8beZYdqZp+B8TBhEBOKzLcB6Kau1+B8skriA51ZCtCFCi/4S/HdkWu9tO6zQuDaMjT2Auseh43/4S4FGlTrwnOdMaHwf5XgQnVkqnTMEMkDFQ4n5LWDZgpMZQgeYvYSZiDDzljxV4KdpbapVnmiQJoqyQv111GGI4qztfrTQw=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=arm.com;\n spf=pass smtp.mailfrom=arm.com;\n dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com\n header.b=AErEQxpS; arc=none smtp.client-ip=217.140.110.172", "DKIM-Signature": "v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss;\n\tt=1774611017; bh=P+xaz+0AM8oCDJ+fmGXliUwK+vicc4AlZE4yIXarY4w=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=AErEQxpSUdhG8nEWVAHMVM7xjAnbqOhcqrCDh7JsHrAs8oudY6AO9ntvfslMtBgny\n\t LMsa1o8flPTUNvAx1+9UTyzXeBiFo87WT4urbLcLpBGYvXFHO+TJ9NN+Akt36kNN1n\n\t 7I1CX50Iaw4x2kFzc8HYE3VrsR9A+bSaE4VUJzbA=", "From": "Andre Przywara <andre.przywara@arm.com>", "To": "Rob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tChen-Yu Tsai <wens@kernel.org>,\n\tJernej Skrabec <jernej.skrabec@gmail.com>,\n\tSamuel Holland <samuel@sholland.org>", "Cc": "linux-gpio@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@lists.linux.dev,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v2 1/3] pinctrl: sunxi: a523: Remove unneeded IRQ remuxing\n flag", "Date": "Fri, 27 Mar 2026 11:30:04 +0000", "Message-ID": "<20260327113006.3135663-2-andre.przywara@arm.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260327113006.3135663-1-andre.przywara@arm.com>", "References": "<20260327113006.3135663-1-andre.przywara@arm.com>", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "The Allwinner A10 and H3 SoCs cannot read the state of a GPIO line when\nthat line is muxed for IRQ triggering (muxval 6), but only if it's\nexplicitly muxed for GPIO input (muxval 0). Other SoCs do not show this\nbehaviour, so we added a optional workaround, triggered by a quirk bit,\nwhich triggers remuxing the pin when it's configured for IRQ, while we\nneed to read its value.\n\nFor some reasons this quirk flag was copied over to newer SoCs, even\nthough they don't show this behaviour, and the GPIO data register\nreflects the true GPIO state even with a pin muxed to IRQ trigger.\n\nRemove the unneeded quirk from the A523 family, where it's definitely\nnot needed (confirmed by experiments), and where it actually breaks,\nbecause the workaround is not compatible with the newer generation\npinctrl IP used in that chip.\n\nTogether with a DT change this fixes GPIO IRQ operation on the A523\nfamily of SoCs, as for instance used for the SD card detection.\n\nSigned-off-by: Andre Przywara <andre.przywara@arm.com>\nFixes: b8a51e95b376 (\"pinctrl: sunxi: Add support for the secondary A523 GPIO ports\")\n---\n drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c | 1 -\n drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c | 1 -\n 2 files changed, 2 deletions(-)", "diff": "diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c\nindex 69cd2b4ebd7d..462aa1c4a5fa 100644\n--- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c\n+++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c\n@@ -26,7 +26,6 @@ static const u8 a523_r_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =\n static struct sunxi_pinctrl_desc a523_r_pinctrl_data = {\n \t.irq_banks = ARRAY_SIZE(a523_r_irq_bank_map),\n \t.irq_bank_map = a523_r_irq_bank_map,\n-\t.irq_read_needs_mux = true,\n \t.io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,\n \t.pin_base = PL_BASE,\n };\ndiff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c\nindex 7d2308c37d29..b6f78f1f30ac 100644\n--- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c\n+++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c\n@@ -26,7 +26,6 @@ static const u8 a523_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =\n static struct sunxi_pinctrl_desc a523_pinctrl_data = {\n \t.irq_banks = ARRAY_SIZE(a523_irq_bank_map),\n \t.irq_bank_map = a523_irq_bank_map,\n-\t.irq_read_needs_mux = true,\n \t.io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,\n };\n \n", "prefixes": [ "v2", "1/3" ] }