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GET /api/patches/2216820/?format=api
{ "id": 2216820, "url": "http://patchwork.ozlabs.org/api/patches/2216820/?format=api", "web_url": "http://patchwork.ozlabs.org/project/buildroot/patch/20260327075314.1821824-1-neal.frager@amd.com/", "project": { "id": 27, "url": "http://patchwork.ozlabs.org/api/projects/27/?format=api", "name": "Buildroot development", "link_name": "buildroot", "list_id": "buildroot.buildroot.org", "list_email": "buildroot@buildroot.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327075314.1821824-1-neal.frager@amd.com>", "list_archive_url": null, "date": "2026-03-27T07:53:14", "name": "[RFC,1/1] board/qemu/microblaze: replace gcc work around with Linux patch", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7bbbfbf9a0a6228dc2c0d59a7793c7e24d90aa72", "submitter": { "id": 83687, "url": "http://patchwork.ozlabs.org/api/people/83687/?format=api", "name": "Neal Frager", "email": "neal.frager@amd.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/buildroot/patch/20260327075314.1821824-1-neal.frager@amd.com/mbox/", "series": [ { "id": 497729, "url": "http://patchwork.ozlabs.org/api/series/497729/?format=api", "web_url": "http://patchwork.ozlabs.org/project/buildroot/list/?series=497729", "date": "2026-03-27T07:53:14", "name": "[RFC,1/1] board/qemu/microblaze: replace gcc work around with Linux patch", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497729/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216820/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216820/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<buildroot-bounces@buildroot.org>", "X-Original-To": [ "incoming-buildroot@patchwork.ozlabs.org", "buildroot@buildroot.org" ], "Delivered-To": [ "patchwork-incoming-buildroot@legolas.ozlabs.org", "buildroot@buildroot.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=buildroot.org header.i=@buildroot.org\n header.a=rsa-sha256 header.s=default header.b=mgzlSzGg;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=buildroot.org\n (client-ip=2605:bc80:3010::136; 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Ip=[165.204.84.17];\n Helo=[satlexmb08.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL6PEPF0001AB4A.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DS0PR12MB8019", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=amd.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=HK03jZMKKnoLrvrL0I+o0IJtoyFL4YNKZeQGas7B9oQ=;\n b=bLywITG901+D/qtMUx6LeOZyPlyqJkQlMV/BWPOnraVFNczmlzS32uaCfbpn4O1p4jg9TH6VBz5YgbiYxiAC3I0UsrZ4MeCVkNjisLpZPeeSm50qTzN9dREQtHur+6DiYg79cxXPmkC4jXeRJioEIF8l6Rs6StQas7a/9StSwUA=", "X-Mailman-Original-Authentication-Results": [ "smtp3.osuosl.org;\n dmarc=pass (p=quarantine dis=none)\n header.from=amd.com", "smtp3.osuosl.org;\n dkim=pass (1024-bit key,\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=bLywITG9" ], "Subject": "[Buildroot] [RFC PATCH 1/1] board/qemu/microblaze: replace gcc work\n around with Linux patch", "X-BeenThere": "buildroot@buildroot.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Discussion and development of buildroot <buildroot.buildroot.org>", "List-Unsubscribe": "<https://lists.buildroot.org/mailman/options/buildroot>,\n <mailto:buildroot-request@buildroot.org?subject=unsubscribe>", "List-Archive": "<http://lists.buildroot.org/pipermail/buildroot/>", "List-Post": "<mailto:buildroot@buildroot.org>", "List-Help": "<mailto:buildroot-request@buildroot.org?subject=help>", "List-Subscribe": "<https://lists.buildroot.org/mailman/listinfo/buildroot>,\n <mailto:buildroot-request@buildroot.org?subject=subscribe>", "From": "Neal Frager via buildroot <buildroot@buildroot.org>", "Reply-To": "Neal Frager <neal.frager@amd.com>", "Cc": "Neal Frager <neal.frager@amd.com>, ju.o@free.fr,\n thomas.petazzoni@bootlin.com, romain.naour@smile.fr, michal.simek@amd.com,\n romain.naour@gmail.com", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "buildroot-bounces@buildroot.org", "Sender": "\"buildroot\" <buildroot-bounces@buildroot.org>" }, "content": "The microblaze issue identified with gcc 15 is actually a Linux kernel issue\nwith the entry.S not allocating enough stack space for the register params.\n\nThe Linux patch included with this solution is not complete, but is being\nshared to demonstrate that patching the Linux kernel fixes the issue.\n\nPlease apply this patch set and test with gcc v15.2.0 and provide feedback\nregarding how to proceed.\n\nTo test:\n$ make qemu_microblazeel_mmu_defconfig\n+ BR2_GCC_VERSION_15_X=y\n$ make\n$ qemu-system-microblazeel -M petalogix-s3adsp1800 -kernel output/images/linux.bin -serial stdio\n\nSigned-off-by: Neal Frager <neal.frager@amd.com>\n---\n ...allocate-stack-space-for-register-pa.patch | 105 ++++++++++++++++++\n configs/qemu_microblazebe_mmu_defconfig | 2 +-\n configs/qemu_microblazeel_mmu_defconfig | 2 +-\n ...-config-microblaze-fix-ira-for-GCC15.patch | 56 ----------\n 4 files changed, 107 insertions(+), 58 deletions(-)\n create mode 100644 board/qemu/microblaze/patches/linux/0001-arch-microblaze-allocate-stack-space-for-register-pa.patch\n delete mode 100644 package/gcc/15.2.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch", "diff": "diff --git a/board/qemu/microblaze/patches/linux/0001-arch-microblaze-allocate-stack-space-for-register-pa.patch b/board/qemu/microblaze/patches/linux/0001-arch-microblaze-allocate-stack-space-for-register-pa.patch\nnew file mode 100644\nindex 0000000000..9ead2a0661\n--- /dev/null\n+++ b/board/qemu/microblaze/patches/linux/0001-arch-microblaze-allocate-stack-space-for-register-pa.patch\n@@ -0,0 +1,105 @@\n+From 13393e499729bd369a2ab01b86d6e0d30444e30f Mon Sep 17 00:00:00 2001\n+From: Neal Frager <neal.frager@amd.com>\n+Date: Fri, 27 Mar 2026 07:02:39 +0000\n+Subject: [PATCH] arch: microblaze: allocate stack space for register params\n+\n+C functions are invoked with arguments without allocating stack space for\n+register params (for potential register spills). As a result kernel built\n+with gcc v15 boot hangs at the point of starting init -.\n+\n+This patch adds necessary stack space for few C function calls from entry.S\n+(not all). After this patch, the kernel boots all the way to login prompt and\n+root login works. Simple commands like ps work and show normal output.\n+\n+Signed-off-by: Neal Frager <neal.frager@amd.com>\n+---\n+ arch/microblaze/kernel/entry.S | 20 ++++++++++++++------\n+ 1 file changed, 14 insertions(+), 6 deletions(-)\n+\n+diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S\n+index 582d7256d815..2f9604640486 100644\n+--- a/arch/microblaze/kernel/entry.S\n++++ b/arch/microblaze/kernel/entry.S\n+@@ -339,6 +339,9 @@ C_ENTRY(mb_invalidate_icache):\n+ * Trap entered via brki instruction, so BIP bit is set, and interrupts\n+ * are masked. This is nice, means we don't have to CLI before state save\n+ */\n++\n++#define SYSCALL_ARGS_SIZE 36\n++\n+ C_ENTRY(_user_exception):\n+ \tswi\tr1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */\n+ \taddi\tr14, r14, 4\t/* return address is 4 byte after call */\n+@@ -422,16 +425,19 @@ C_ENTRY(_user_exception):\n+ \tlwi\tr12, r12, sys_call_table\n+ \t/* where the trap should return need -8 to adjust for rtsd r15, 8 */\n+ \taddi\tr15, r0, ret_from_trap-8\n++\taddik \tr1, r1, -SYSCALL_ARGS_SIZE\n+ \tbra\tr12\n+ \n+ \t/* The syscall number is invalid, return an error. */\n+ 5:\n+-\tbraid\tret_from_trap\n++\tbraid\tret_from_trap2\n+ \taddi\tr3, r0, -ENOSYS;\n+ \n+ /* Entry point used to return from a syscall/trap */\n+ /* We re-enable BIP bit before state restore */\n+ C_ENTRY(ret_from_trap):\n++\taddik\tr1, r1, SYSCALL_ARGS_SIZE\n++C_ENTRY(ret_from_trap2):\n+ \tswi\tr3, r1, PT_R3\n+ \tswi\tr4, r1, PT_R4\n+ \n+@@ -504,7 +510,7 @@ C_ENTRY(ret_from_fork):\n+ \tbralid\tr15, schedule_tail; /* ...which is schedule_tail's arg */\n+ \tadd\tr5, r3, r0;\t/* switch_thread returns the prev task */\n+ \t\t\t\t/* ( in the delay slot ) */\n+-\tbrid\tret_from_trap;\t/* Do normal trap return */\n++\tbrid\tret_from_trap2; /* Do normal trap return */\n+ \tadd\tr3, r0, r0;\t/* Child's fork call should return 0. */\n+ \n+ C_ENTRY(ret_from_kernel_thread):\n+@@ -513,13 +519,13 @@ C_ENTRY(ret_from_kernel_thread):\n+ \t\t\t\t/* ( in the delay slot ) */\n+ \tbrald\tr15, r20\t/* fn was left in r20 */\n+ \taddk\tr5, r0, r19\t/* ... and argument - in r19 */\n+-\tbrid\tret_from_trap\n++\tbrid\tret_from_trap2\n+ \tadd\tr3, r0, r0\n+ \n+ C_ENTRY(sys_rt_sigreturn_wrapper):\n+ \taddik\tr30, r0, 0\t\t/* no restarts */\n+ \tbrid\tsys_rt_sigreturn\t/* Do real work */\n+-\taddik\tr5, r1, 0;\t\t/* add user context as 1st arg */\n++\taddik\tr5, r1, SYSCALL_ARGS_SIZE;\t/* add user context as 1st arg */\n+ \n+ /*\n+ * HW EXCEPTION rutine start\n+@@ -729,11 +735,13 @@ C_ENTRY(_interrupt):\n+ \tlwi\tCURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));\n+ \ttovirt(r1,r1)\n+ \taddik\tr15, r0, irq_call;\n++\taddik \tr1, r1, -8\n+ irq_call:rtbd\tr0, do_IRQ;\n+-\taddik\tr5, r1, 0;\n++\taddik\tr5, r1, 8;\n+ \n+ /* MS: we are in virtual mode */\n+ ret_from_irq:\n++\taddik \tr1, r1, 8\n+ \tlwi\tr11, r1, PT_MODE;\n+ \tbnei\tr11, 2f;\n+ \n+@@ -1302,7 +1310,7 @@ type_SYSCALL_PREEMPT:\n+ .global microblaze_trap_handlers\n+ microblaze_trap_handlers:\n+ \t/* Exact matches come first */\n+-\t.word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL\n++\t.word ret_from_trap; .word ret_from_trap2 ; .word type_SYSCALL\n+ \t.word ret_from_irq ; .word ret_from_irq ; .word type_IRQ\n+ \t/* Fuzzy matches go here */\n+ \t.word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT\n+-- \n+2.25.1\n+\ndiff --git a/configs/qemu_microblazebe_mmu_defconfig b/configs/qemu_microblazebe_mmu_defconfig\nindex cc6871e212..0a7487fb37 100644\n--- a/configs/qemu_microblazebe_mmu_defconfig\n+++ b/configs/qemu_microblazebe_mmu_defconfig\n@@ -1,6 +1,6 @@\n BR2_microblazebe=y\n BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_18=y\n-BR2_GLOBAL_PATCH_DIR=\"board/qemu/patches\"\n+BR2_GLOBAL_PATCH_DIR=\"board/qemu/patches board/qemu/microblaze/patches\"\n BR2_DOWNLOAD_FORCE_CHECK_HASHES=y\n BR2_TARGET_GENERIC_GETTY_PORT=\"ttyUL0\"\n BR2_SYSTEM_DHCP=\"eth0\"\ndiff --git a/configs/qemu_microblazeel_mmu_defconfig b/configs/qemu_microblazeel_mmu_defconfig\nindex 8945a775d0..bfb5aae405 100644\n--- a/configs/qemu_microblazeel_mmu_defconfig\n+++ b/configs/qemu_microblazeel_mmu_defconfig\n@@ -1,6 +1,6 @@\n BR2_microblazeel=y\n BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_18=y\n-BR2_GLOBAL_PATCH_DIR=\"board/qemu/patches\"\n+BR2_GLOBAL_PATCH_DIR=\"board/qemu/patches board/qemu/microblaze/patches\"\n BR2_DOWNLOAD_FORCE_CHECK_HASHES=y\n BR2_TARGET_GENERIC_GETTY_PORT=\"ttyUL0\"\n BR2_SYSTEM_DHCP=\"eth0\"\ndiff --git a/package/gcc/15.2.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch b/package/gcc/15.2.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch\ndeleted file mode 100644\nindex 663aab7218..0000000000\n--- a/package/gcc/15.2.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch\n+++ /dev/null\n@@ -1,56 +0,0 @@\n-From d2fdbd8c4abe67eea86877dfb3b3b9d8508c165f Mon Sep 17 00:00:00 2001\n-From: Romain Naour <romain.naour@gmail.com>\n-Date: Wed, 6 Aug 2025 22:32:30 +0200\n-Subject: [PATCH] gcc/config/microblaze: fix ira for GCC15\n-\n-Add new hooks for callee-save on microblaze defined by [1] and\n-return 1 to restore the old behavior prior to the commit [3].\n-\n-Tested with qemu_microblazeel_mmu_defconfig and used to generate\n-Microblaze toolchains for the Bootlin toolchains 2025.08-1 [4][5].\n-\n-Upstream: suggested in the bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121432#c10\n-\n-[1] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b191e8bdecf881d11c1544c441e38f4c18392a15\n-[2] https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/i386/i386.cc;h=3128973ba79cccfc6761f451dcb716b9558cc4da;hb=d3ff498c478acefce35de04402f99171b4f64a1a#l20606\n-[3] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=3b9b8d6cfdf59337f4b7ce10ce92a98044b2657b\n-[4] https://lore.kernel.org/buildroot/87sehzndtp.fsf@dell.be.48ers.dk/T/#mce7decd0b3f6a41008d5de577538a8525c91b374\n-[5] https://toolchains.bootlin.com/\n-\n-Signed-off-by: Romain Naour <romain.naour@gmail.com>\n----\n- gcc/config/microblaze/microblaze.cc | 11 +++++++++++\n- 1 file changed, 11 insertions(+)\n-\n-diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc\n-index 78b9428ef3b..84ea7e8d55a 100644\n---- a/gcc/config/microblaze/microblaze.cc\n-+++ b/gcc/config/microblaze/microblaze.cc\n-@@ -3228,6 +3228,14 @@ microblaze_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,\n- return NO_REGS;\n- }\n- \n-+/* Implement TARGET_CALLEE_SAVE_COST. */\n-+static int\n-+microblaze_callee_save_cost (spill_cost_type, unsigned int hard_regno, machine_mode,\n-+\t\t unsigned int, int mem_cost, const HARD_REG_SET &, bool)\n-+{\n-+ return 1;\n-+}\n-+\n- static void\n- microblaze_globalize_label (FILE * stream, const char *name)\n- {\n-@@ -4066,6 +4074,9 @@ microblaze_starting_frame_offset (void)\n- #undef TARGET_SECONDARY_RELOAD\n- #define TARGET_SECONDARY_RELOAD\t\tmicroblaze_secondary_reload\n- \n-+#undef TARGET_CALLEE_SAVE_COST\n-+#define TARGET_CALLEE_SAVE_COST microblaze_callee_save_cost\n-+\n- #undef TARGET_ASM_OUTPUT_MI_THUNK\n- #define TARGET_ASM_OUTPUT_MI_THUNK microblaze_asm_output_mi_thunk\n- \n--- \n-2.50.1\n-\n", "prefixes": [ "RFC", "1/1" ] }