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GET /api/patches/2216819/?format=api
{ "id": 2216819, "url": "http://patchwork.ozlabs.org/api/patches/2216819/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260327074658.2963328-1-poros@redhat.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327074658.2963328-1-poros@redhat.com>", "list_archive_url": null, "date": "2026-03-27T07:46:58", "name": "[iwl-net] ice: fix PTP timestamping broken by SyncE code on E825C", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "4fed4137185f7244e10f64ec49b5e37330576606", "submitter": { "id": 74657, "url": "http://patchwork.ozlabs.org/api/people/74657/?format=api", "name": "Petr Oros", "email": "poros@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260327074658.2963328-1-poros@redhat.com/mbox/", "series": [ { "id": 497728, "url": "http://patchwork.ozlabs.org/api/series/497728/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=497728", "date": "2026-03-27T07:46:58", "name": "[iwl-net] ice: fix PTP timestamping broken by SyncE code on E825C", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497728/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216819/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216819/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=Mkon+We1;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::136; 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client-ip=170.10.129.124;\n helo=us-smtp-delivery-124.mimecast.com; envelope-from=poros@redhat.com;\n receiver=<UNKNOWN>", "DMARC-Filter": "OpenDMARC Filter v1.4.2 smtp2.osuosl.org EEE1740B9E", "X-MC-Unique": "LCiNJ1KkO36QsokeeGwf6A-1", "X-Mimecast-MFC-AGG-ID": "LCiNJ1KkO36QsokeeGwf6A_1774597629", "From": "Petr Oros <poros@redhat.com>", "To": "netdev@vger.kernel.org", "Date": "Fri, 27 Mar 2026 08:46:58 +0100", "Message-ID": "<20260327074658.2963328-1-poros@redhat.com>", "MIME-Version": "1.0", "X-Scanned-By": "MIMEDefang 3.4.1 on 10.30.177.93", "X-Mimecast-MFC-PROC-ID": "TIrfLNm46LOZzNQQZPicR2qLWLNUQ44ylBl7KIVqgHc_1774597629", "X-Mimecast-Originator": "redhat.com", "Content-Transfer-Encoding": "8bit", "content-type": "text/plain; charset=\"US-ASCII\"; x-default=true", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=redhat.com;\n s=mimecast20190719; t=1774597636;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding;\n bh=+Ya0OKIOhrl1q5883EggLqKidONP4W3BL2eswWDJDRg=;\n b=RDc1VrqoO45G3FRc8WGjRKGT9nd7AM1QmI8bvm39D9cMCOudlHq5YX0SHot1hCroZT5XBA\n VPzGqnkIhHN1PBApIxSGfVvGTthXnw6dEZzFyakk32WbfhMHmm6IJSec554OL9HVFFuFm8\n ALvngfcv0IshEPstXegimPm3cNoI924=", "X-Mailman-Original-Authentication-Results": [ "smtp2.osuosl.org;\n dmarc=pass (p=quarantine dis=none)\n header.from=redhat.com", "smtp2.osuosl.org;\n dkim=pass (1024-bit key,\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=RDc1Vrqo" ], "Subject": "[Intel-wired-lan] [PATCH iwl-net] ice: fix PTP timestamping broken\n by SyncE code on E825C", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "Ivan Vecera <ivecera@redhat.com>,\n Przemek Kitszel <przemyslaw.kitszel@intel.com>,\n Richard Cochran <richardcochran@gmail.com>,\n Eric Dumazet <edumazet@google.com>,\n stable@vger.kernel.org,\n Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,\n Aleksandr Loktionov <aleksandr.loktionov@intel.com>,\n Andrew Lunn <andrew+netdev@lunn.ch>,\n Tony Nguyen <anthony.l.nguyen@intel.com>,\n intel-wired-lan@lists.osuosl.org, Jakub Kicinski <kuba@kernel.org>,\n Paolo Abeni <pabeni@redhat.com>, \"David S. Miller\" <davem@davemloft.net>,\n linux-kernel@vger.kernel.org", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "The E825C SyncE support added in commit ad1df4f2d591 (\"ice: dpll:\nSupport E825-C SyncE and dynamic pin discovery\") introduced a SyncE\nreconfiguration block in ice_ptp_link_change() that prevents\nice_ptp_port_phy_restart() from being called in several error paths.\nWithout the PHY restart, PTP timestamps stop working after any link\nchange event.\n\nThere are three ways the PHY restart gets blocked:\n\n1. When DPLL initialization fails (e.g. missing ACPI firmware node\n properties), ICE_FLAG_DPLL is not set and the function returns early\n before reaching the PHY restart.\n\n2. When ice_tspll_bypass_mux_active_e825c() fails to read the CGU\n register, WARN_ON_ONCE fires and the function returns early.\n\n3. When ice_tspll_cfg_synce_ethdiv_e825c() fails to configure the\n clock divider for an active pin, same early return.\n\nSyncE and PTP are independent features. SyncE reconfiguration failures\nmust not prevent the PTP PHY restart that is essential for timestamp\nrecovery after link changes.\n\nFix by making the entire SyncE block conditional on ICE_FLAG_DPLL\nwithout an early return, and replacing the WARN_ON_ONCE + return error\nhandling inside the loop with dev_err_once + break. The function always\nproceeds to ice_ptp_port_phy_restart() regardless of SyncE errors.\n\nFixes: ad1df4f2d591 (\"ice: dpll: Support E825-C SyncE and dynamic pin discovery\")\nSigned-off-by: Petr Oros <poros@redhat.com>\n---\n drivers/net/ethernet/intel/ice/ice_ptp.c | 22 ++++++++++++----------\n 1 file changed, 12 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c\nindex 094e96219f4565..60bc47099432a2 100644\n--- a/drivers/net/ethernet/intel/ice/ice_ptp.c\n+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c\n@@ -1296,12 +1296,10 @@ void ice_ptp_link_change(struct ice_pf *pf, bool linkup)\n \tif (pf->hw.reset_ongoing)\n \t\treturn;\n \n-\tif (hw->mac_type == ICE_MAC_GENERIC_3K_E825) {\n+\tif (hw->mac_type == ICE_MAC_GENERIC_3K_E825 &&\n+\t test_bit(ICE_FLAG_DPLL, pf->flags)) {\n \t\tint pin, err;\n \n-\t\tif (!test_bit(ICE_FLAG_DPLL, pf->flags))\n-\t\t\treturn;\n-\n \t\tmutex_lock(&pf->dplls.lock);\n \t\tfor (pin = 0; pin < ICE_SYNCE_CLK_NUM; pin++) {\n \t\t\tenum ice_synce_clk clk_pin;\n@@ -1314,15 +1312,19 @@ void ice_ptp_link_change(struct ice_pf *pf, bool linkup)\n \t\t\t\t\t\t\t\tport_num,\n \t\t\t\t\t\t\t\t&active,\n \t\t\t\t\t\t\t\tclk_pin);\n-\t\t\tif (WARN_ON_ONCE(err)) {\n-\t\t\t\tmutex_unlock(&pf->dplls.lock);\n-\t\t\t\treturn;\n+\t\t\tif (err) {\n+\t\t\t\tdev_err_once(ice_pf_to_dev(pf),\n+\t\t\t\t\t \"Failed to read SyncE bypass mux for pin %d, err %d\\n\",\n+\t\t\t\t\t pin, err);\n+\t\t\t\tbreak;\n \t\t\t}\n \n \t\t\terr = ice_tspll_cfg_synce_ethdiv_e825c(hw, clk_pin);\n-\t\t\tif (active && WARN_ON_ONCE(err)) {\n-\t\t\t\tmutex_unlock(&pf->dplls.lock);\n-\t\t\t\treturn;\n+\t\t\tif (active && err) {\n+\t\t\t\tdev_err_once(ice_pf_to_dev(pf),\n+\t\t\t\t\t \"Failed to configure SyncE ETH divider for pin %d, err %d\\n\",\n+\t\t\t\t\t pin, err);\n+\t\t\t\tbreak;\n \t\t\t}\n \t\t}\n \t\tmutex_unlock(&pf->dplls.lock);\n", "prefixes": [ "iwl-net" ] }