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GET /api/patches/2216807/?format=api
HTTP 200 OK
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{
    "id": 2216807,
    "url": "http://patchwork.ozlabs.org/api/patches/2216807/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260327073046.134085-2-aleksandr.loktionov@intel.com/",
    "project": {
        "id": 46,
        "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api",
        "name": "Intel Wired Ethernet development",
        "link_name": "intel-wired-lan",
        "list_id": "intel-wired-lan.osuosl.org",
        "list_email": "intel-wired-lan@osuosl.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260327073046.134085-2-aleksandr.loktionov@intel.com>",
    "list_archive_url": null,
    "date": "2026-03-27T07:30:36",
    "name": "[iwl-next] ixgbe: add bounds check for debugfs register access",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "abf2b8bb370a598399e28d5fc50771128231dade",
    "submitter": {
        "id": 75597,
        "url": "http://patchwork.ozlabs.org/api/people/75597/?format=api",
        "name": "Loktionov, Aleksandr",
        "email": "aleksandr.loktionov@intel.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260327073046.134085-2-aleksandr.loktionov@intel.com/mbox/",
    "series": [
        {
            "id": 497716,
            "url": "http://patchwork.ozlabs.org/api/series/497716/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=497716",
            "date": "2026-03-27T07:30:36",
            "name": "[iwl-next] ixgbe: add bounds check for debugfs register access",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/497716/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2216807/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2216807/checks/",
    "tags": {},
    "related": [],
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        "X-ExtLoop1": "1",
        "From": "Aleksandr Loktionov <aleksandr.loktionov@intel.com>",
        "To": "intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com,\n aleksandr.loktionov@intel.com",
        "Cc": "netdev@vger.kernel.org,\n\tPaul Greenwalt <paul.greenwalt@intel.com>",
        "Date": "Fri, 27 Mar 2026 08:30:36 +0100",
        "Message-ID": "<20260327073046.134085-2-aleksandr.loktionov@intel.com>",
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        ],
        "Subject": "[Intel-wired-lan] [PATCH iwl-next] ixgbe: add bounds check for\n debugfs register access",
        "X-BeenThere": "intel-wired-lan@osuosl.org",
        "X-Mailman-Version": "2.1.30",
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        "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>",
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        "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>"
    },
    "content": "From: Paul Greenwalt <paul.greenwalt@intel.com>\n\nPrevent out-of-bounds MMIO accesses triggered through user-controlled\nregister offsets.  IXGBE_HFDR (0x15FE8) is the highest valid MMIO\nregister in the ixgbe register map; any offset beyond it would address\nunmapped memory.\n\nAdd a defense-in-depth check at two levels:\n\n1. ixgbe_read_reg() -- the noinline register read accessor.  A\n   WARN_ON_ONCE() guard here catches any future code path (including\n   ioctl extensions) that might inadvertently pass an out-of-range\n   offset without relying on higher layers to catch it first.\n   ixgbe_write_reg() is a static inline called from the TX/RX hot path;\n   adding WARN_ON_ONCE there would inline the check at every call site,\n   so only the read path gets this guard.\n\n2. ixgbe_dbg_reg_ops_write() -- the debugfs 'reg_ops' interface is the\n   only current path where a raw, user-supplied offset enters the driver.\n   Gating it before invoking the register accessors provides a clean,\n   user-visible failure (silent ignore with no kernel splat) for\n   deliberately malformed debugfs writes.\n\nAdd a reg <= IXGBE_HFDR guard to both the read and write paths in\nixgbe_dbg_reg_ops_write(), and a WARN_ON_ONCE + early-return guard to\nixgbe_read_reg().\n\nSigned-off-by: Paul Greenwalt <paul.greenwalt@intel.com>\nSigned-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c | 6 ++++--\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c    | 2 ++\n 2 files changed, 6 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c\nindex 5b1cf49d..a6a19c0 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c\n@@ -86,7 +86,8 @@ static ssize_t ixgbe_dbg_reg_ops_write(struct file *filp,\n \t\tu32 reg, value;\n \t\tint cnt;\n \t\tcnt = sscanf(&ixgbe_dbg_reg_ops_buf[5], \"%x %x\", &reg, &value);\n-\t\tif (cnt == 2) {\n+\t\t/* check format and bounds check register access */\n+\t\tif (cnt == 2 && reg <= IXGBE_HFDR) {\n \t\t\tIXGBE_WRITE_REG(&adapter->hw, reg, value);\n \t\t\tvalue = IXGBE_READ_REG(&adapter->hw, reg);\n \t\t\te_dev_info(\"write: 0x%08x = 0x%08x\\n\", reg, value);\n@@ -97,7 +98,8 @@ static ssize_t ixgbe_dbg_reg_ops_write(struct file *filp,\n \t\tu32 reg, value;\n \t\tint cnt;\n \t\tcnt = sscanf(&ixgbe_dbg_reg_ops_buf[4], \"%x\", &reg);\n-\t\tif (cnt == 1) {\n+\t\t/* check format and bounds check register access */\n+\t\tif (cnt == 1 && reg <= IXGBE_HFDR) {\n \t\t\tvalue = IXGBE_READ_REG(&adapter->hw, reg);\n \t\t\te_dev_info(\"read 0x%08x = 0x%08x\\n\", reg, value);\n \t\t} else {\n\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex 210c7b9..4a1f3c2 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -354,4 +354,6 @@ u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)\n \tif (ixgbe_removed(reg_addr))\n \t\treturn IXGBE_FAILED_READ_REG;\n+\tif (WARN_ON_ONCE(reg > IXGBE_HFDR))\n+\t\treturn IXGBE_FAILED_READ_REG;\n \tif (unlikely(hw->phy.nw_mng_if_sel &\n \t\t     IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {\n",
    "prefixes": [
        "iwl-next"
    ]
}