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GET /api/patches/2216752/?format=api
{ "id": 2216752, "url": "http://patchwork.ozlabs.org/api/patches/2216752/?format=api", "web_url": "http://patchwork.ozlabs.org/project/sparclinux/patch/20260327061704.3707577-13-hch@lst.de/", "project": { "id": 10, "url": "http://patchwork.ozlabs.org/api/projects/10/?format=api", "name": "Linux SPARC Development ", "link_name": "sparclinux", "list_id": "sparclinux.vger.kernel.org", "list_email": "sparclinux@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327061704.3707577-13-hch@lst.de>", "list_archive_url": null, "date": "2026-03-27T06:16:44", "name": "[12/28] arm: move the XOR code to lib/raid/", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9326f25b8ea88a28550e63117c3663e9a21bcde7", "submitter": { "id": 82, "url": "http://patchwork.ozlabs.org/api/people/82/?format=api", "name": "Christoph Hellwig", "email": "hch@lst.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/sparclinux/patch/20260327061704.3707577-13-hch@lst.de/mbox/", "series": [ { "id": 497694, "url": "http://patchwork.ozlabs.org/api/series/497694/?format=api", "web_url": "http://patchwork.ozlabs.org/project/sparclinux/list/?series=497694", "date": "2026-03-27T06:16:33", "name": "[01/28] xor: assert that xor_blocks is not call from interrupt context", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497694/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216752/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216752/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <SRS0=lcvp=B3=vger.kernel.org=sparclinux+bounces-6587-patchwork-incoming=ozlabs.org@ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "sparclinux@vger.kernel.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "patchwork-incoming@ozlabs.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256\n header.s=bombadil.20210309 header.b=4/CsEyLJ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=ozlabs.org\n (client-ip=150.107.74.76; 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arc=none smtp.client-ip=198.137.202.133" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding:\n\tMIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender\n\t:Reply-To:Content-Type:Content-ID:Content-Description;\n\tbh=ry2shtzl2BSBD299Iewxm9iaU+3NWMfzJH2Uml5DqNo=; b=4/CsEyLJw6jSNFfOpC5a6SQC8q\n\tdg8CjgXJ5CrcUQ4YJl3EOzTdn2NdnrGZijc+M/avU0OWPJ3seXC9lsop20rk3bJZ91h8zXNYFxQtZ\n\tbpF3AoWLxZliqk/WM7twYaNBlbrUCv6k6gfVW09tGoIFW7ARmB1m6YV3D60BuoH90toTt00aXB76b\n\tKTDS+IUNRWJnwgVurDlEOxM9qeGFBusjLmN8V33gEAreNDEMcDVIWrfPorAEcLLz5JTHHZzuFmEvH\n\tQwRJGWASs16VT1Wub0mdbpAV2c8gZTfhI8GUsmsKHFrEExqiMhd7YFy60aAdZ2URv4XhRqY5bgP82\n\tfidn0yag==;", "From": "Christoph Hellwig <hch@lst.de>", "To": "Andrew Morton <akpm@linux-foundation.org>", "Cc": "Richard Henderson <richard.henderson@linaro.org>,\n\tMatt Turner <mattst88@gmail.com>,\n\tMagnus Lindholm <linmag7@gmail.com>,\n\tRussell King <linux@armlinux.org.uk>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will@kernel.org>,\n\tArd Biesheuvel <ardb@kernel.org>,\n\tHuacai Chen <chenhuacai@kernel.org>,\n\tWANG Xuerui <kernel@xen0n.name>,\n\tMadhavan Srinivasan <maddy@linux.ibm.com>,\n\tMichael Ellerman <mpe@ellerman.id.au>,\n\tNicholas Piggin <npiggin@gmail.com>,\n\t\"Christophe Leroy (CS GROUP)\" <chleroy@kernel.org>,\n\tPaul Walmsley <pjw@kernel.org>,\n\tPalmer Dabbelt <palmer@dabbelt.com>,\n\tAlbert Ou <aou@eecs.berkeley.edu>,\n\tAlexandre Ghiti <alex@ghiti.fr>,\n\tHeiko Carstens <hca@linux.ibm.com>,\n\tVasily Gorbik <gor@linux.ibm.com>,\n\tAlexander Gordeev <agordeev@linux.ibm.com>,\n\tChristian Borntraeger <borntraeger@linux.ibm.com>,\n\tSven Schnelle <svens@linux.ibm.com>,\n\t\"David S. Miller\" <davem@davemloft.net>,\n\tAndreas Larsson <andreas@gaisler.com>,\n\tRichard Weinberger <richard@nod.at>,\n\tAnton Ivanov <anton.ivanov@cambridgegreys.com>,\n\tJohannes Berg <johannes@sipsolutions.net>,\n\tThomas Gleixner <tglx@kernel.org>,\n\tIngo Molnar <mingo@redhat.com>,\n\tBorislav Petkov <bp@alien8.de>,\n\tDave Hansen <dave.hansen@linux.intel.com>,\n\tx86@kernel.org,\n\t\"H. Peter Anvin\" <hpa@zytor.com>,\n\tHerbert Xu <herbert@gondor.apana.org.au>,\n\tDan Williams <dan.j.williams@intel.com>,\n\tChris Mason <clm@fb.com>,\n\tDavid Sterba <dsterba@suse.com>,\n\tArnd Bergmann <arnd@arndb.de>,\n\tSong Liu <song@kernel.org>,\n\tYu Kuai <yukuai@fnnas.com>,\n\tLi Nan <linan122@huawei.com>,\n\t\"Theodore Ts'o\" <tytso@mit.edu>,\n\t\"Jason A. Donenfeld\" <Jason@zx2c4.com>,\n\tlinux-alpha@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tloongarch@lists.linux.dev,\n\tlinuxppc-dev@lists.ozlabs.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-s390@vger.kernel.org,\n\tsparclinux@vger.kernel.org,\n\tlinux-um@lists.infradead.org,\n\tlinux-crypto@vger.kernel.org,\n\tlinux-btrfs@vger.kernel.org,\n\tlinux-arch@vger.kernel.org,\n\tlinux-raid@vger.kernel.org", "Subject": "[PATCH 12/28] arm: move the XOR code to lib/raid/", "Date": "Fri, 27 Mar 2026 07:16:44 +0100", "Message-ID": "<20260327061704.3707577-13-hch@lst.de>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260327061704.3707577-1-hch@lst.de>", "References": "<20260327061704.3707577-1-hch@lst.de>", "Precedence": "bulk", "X-Mailing-List": "sparclinux@vger.kernel.org", "List-Id": "<sparclinux.vger.kernel.org>", "List-Subscribe": "<mailto:sparclinux+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:sparclinux+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-SRS-Rewrite": "SMTP reverse-path rewritten from <hch@infradead.org> by\n bombadil.infradead.org. See http://www.infradead.org/rpr.html", "X-Spam-Status": "No, score=-0.2 required=5.0 tests=ARC_SIGNED,ARC_VALID,\n\tDKIM_SIGNED,DKIM_VALID,DMARC_NONE,HEADER_FROM_DIFFERENT_DOMAINS,\n\tMAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on gandalf.ozlabs.org" }, "content": "Move the optimized XOR into lib/raid and include it it in the main\nxor.ko instead of building a separate module for it.\n\nSigned-off-by: Christoph Hellwig <hch@lst.de>\n---\n arch/arm/include/asm/xor.h | 190 +-----------------\n arch/arm/lib/Makefile | 5 -\n lib/raid/xor/Makefile | 8 +\n lib/raid/xor/arm/xor-neon-glue.c | 58 ++++++\n {arch/arm/lib => lib/raid/xor/arm}/xor-neon.c | 10 +-\n lib/raid/xor/arm/xor.c | 136 +++++++++++++\n 6 files changed, 205 insertions(+), 202 deletions(-)\n create mode 100644 lib/raid/xor/arm/xor-neon-glue.c\n rename {arch/arm/lib => lib/raid/xor/arm}/xor-neon.c (74%)\n create mode 100644 lib/raid/xor/arm/xor.c", "diff": "diff --git a/arch/arm/include/asm/xor.h b/arch/arm/include/asm/xor.h\nindex b2dcd49186e2..989c55872ef6 100644\n--- a/arch/arm/include/asm/xor.h\n+++ b/arch/arm/include/asm/xor.h\n@@ -1,198 +1,12 @@\n /* SPDX-License-Identifier: GPL-2.0-only */\n /*\n- * arch/arm/include/asm/xor.h\n- *\n * Copyright (C) 2001 Russell King\n */\n #include <asm-generic/xor.h>\n-#include <asm/hwcap.h>\n #include <asm/neon.h>\n \n-#define __XOR(a1, a2) a1 ^= a2\n-\n-#define GET_BLOCK_2(dst) \\\n-\t__asm__(\"ldmia\t%0, {%1, %2}\" \\\n-\t\t: \"=r\" (dst), \"=r\" (a1), \"=r\" (a2) \\\n-\t\t: \"0\" (dst))\n-\n-#define GET_BLOCK_4(dst) \\\n-\t__asm__(\"ldmia\t%0, {%1, %2, %3, %4}\" \\\n-\t\t: \"=r\" (dst), \"=r\" (a1), \"=r\" (a2), \"=r\" (a3), \"=r\" (a4) \\\n-\t\t: \"0\" (dst))\n-\n-#define XOR_BLOCK_2(src) \\\n-\t__asm__(\"ldmia\t%0!, {%1, %2}\" \\\n-\t\t: \"=r\" (src), \"=r\" (b1), \"=r\" (b2) \\\n-\t\t: \"0\" (src)); \\\n-\t__XOR(a1, b1); __XOR(a2, b2);\n-\n-#define XOR_BLOCK_4(src) \\\n-\t__asm__(\"ldmia\t%0!, {%1, %2, %3, %4}\" \\\n-\t\t: \"=r\" (src), \"=r\" (b1), \"=r\" (b2), \"=r\" (b3), \"=r\" (b4) \\\n-\t\t: \"0\" (src)); \\\n-\t__XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)\n-\n-#define PUT_BLOCK_2(dst) \\\n-\t__asm__ __volatile__(\"stmia\t%0!, {%2, %3}\" \\\n-\t\t: \"=r\" (dst) \\\n-\t\t: \"0\" (dst), \"r\" (a1), \"r\" (a2))\n-\n-#define PUT_BLOCK_4(dst) \\\n-\t__asm__ __volatile__(\"stmia\t%0!, {%2, %3, %4, %5}\" \\\n-\t\t: \"=r\" (dst) \\\n-\t\t: \"0\" (dst), \"r\" (a1), \"r\" (a2), \"r\" (a3), \"r\" (a4))\n-\n-static void\n-xor_arm4regs_2(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2)\n-{\n-\tunsigned int lines = bytes / sizeof(unsigned long) / 4;\n-\tregister unsigned int a1 __asm__(\"r4\");\n-\tregister unsigned int a2 __asm__(\"r5\");\n-\tregister unsigned int a3 __asm__(\"r6\");\n-\tregister unsigned int a4 __asm__(\"r10\");\n-\tregister unsigned int b1 __asm__(\"r8\");\n-\tregister unsigned int b2 __asm__(\"r9\");\n-\tregister unsigned int b3 __asm__(\"ip\");\n-\tregister unsigned int b4 __asm__(\"lr\");\n-\n-\tdo {\n-\t\tGET_BLOCK_4(p1);\n-\t\tXOR_BLOCK_4(p2);\n-\t\tPUT_BLOCK_4(p1);\n-\t} while (--lines);\n-}\n-\n-static void\n-xor_arm4regs_3(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3)\n-{\n-\tunsigned int lines = bytes / sizeof(unsigned long) / 4;\n-\tregister unsigned int a1 __asm__(\"r4\");\n-\tregister unsigned int a2 __asm__(\"r5\");\n-\tregister unsigned int a3 __asm__(\"r6\");\n-\tregister unsigned int a4 __asm__(\"r10\");\n-\tregister unsigned int b1 __asm__(\"r8\");\n-\tregister unsigned int b2 __asm__(\"r9\");\n-\tregister unsigned int b3 __asm__(\"ip\");\n-\tregister unsigned int b4 __asm__(\"lr\");\n-\n-\tdo {\n-\t\tGET_BLOCK_4(p1);\n-\t\tXOR_BLOCK_4(p2);\n-\t\tXOR_BLOCK_4(p3);\n-\t\tPUT_BLOCK_4(p1);\n-\t} while (--lines);\n-}\n-\n-static void\n-xor_arm4regs_4(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3,\n-\t const unsigned long * __restrict p4)\n-{\n-\tunsigned int lines = bytes / sizeof(unsigned long) / 2;\n-\tregister unsigned int a1 __asm__(\"r8\");\n-\tregister unsigned int a2 __asm__(\"r9\");\n-\tregister unsigned int b1 __asm__(\"ip\");\n-\tregister unsigned int b2 __asm__(\"lr\");\n-\n-\tdo {\n-\t\tGET_BLOCK_2(p1);\n-\t\tXOR_BLOCK_2(p2);\n-\t\tXOR_BLOCK_2(p3);\n-\t\tXOR_BLOCK_2(p4);\n-\t\tPUT_BLOCK_2(p1);\n-\t} while (--lines);\n-}\n-\n-static void\n-xor_arm4regs_5(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3,\n-\t const unsigned long * __restrict p4,\n-\t const unsigned long * __restrict p5)\n-{\n-\tunsigned int lines = bytes / sizeof(unsigned long) / 2;\n-\tregister unsigned int a1 __asm__(\"r8\");\n-\tregister unsigned int a2 __asm__(\"r9\");\n-\tregister unsigned int b1 __asm__(\"ip\");\n-\tregister unsigned int b2 __asm__(\"lr\");\n-\n-\tdo {\n-\t\tGET_BLOCK_2(p1);\n-\t\tXOR_BLOCK_2(p2);\n-\t\tXOR_BLOCK_2(p3);\n-\t\tXOR_BLOCK_2(p4);\n-\t\tXOR_BLOCK_2(p5);\n-\t\tPUT_BLOCK_2(p1);\n-\t} while (--lines);\n-}\n-\n-static struct xor_block_template xor_block_arm4regs = {\n-\t.name\t= \"arm4regs\",\n-\t.do_2\t= xor_arm4regs_2,\n-\t.do_3\t= xor_arm4regs_3,\n-\t.do_4\t= xor_arm4regs_4,\n-\t.do_5\t= xor_arm4regs_5,\n-};\n-\n-#ifdef CONFIG_KERNEL_MODE_NEON\n-\n-extern struct xor_block_template const xor_block_neon_inner;\n-\n-static void\n-xor_neon_2(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2)\n-{\n-\tkernel_neon_begin();\n-\txor_block_neon_inner.do_2(bytes, p1, p2);\n-\tkernel_neon_end();\n-}\n-\n-static void\n-xor_neon_3(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3)\n-{\n-\tkernel_neon_begin();\n-\txor_block_neon_inner.do_3(bytes, p1, p2, p3);\n-\tkernel_neon_end();\n-}\n-\n-static void\n-xor_neon_4(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3,\n-\t const unsigned long * __restrict p4)\n-{\n-\tkernel_neon_begin();\n-\txor_block_neon_inner.do_4(bytes, p1, p2, p3, p4);\n-\tkernel_neon_end();\n-}\n-\n-static void\n-xor_neon_5(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3,\n-\t const unsigned long * __restrict p4,\n-\t const unsigned long * __restrict p5)\n-{\n-\tkernel_neon_begin();\n-\txor_block_neon_inner.do_5(bytes, p1, p2, p3, p4, p5);\n-\tkernel_neon_end();\n-}\n-\n-static struct xor_block_template xor_block_neon = {\n-\t.name\t= \"neon\",\n-\t.do_2\t= xor_neon_2,\n-\t.do_3\t= xor_neon_3,\n-\t.do_4\t= xor_neon_4,\n-\t.do_5\t= xor_neon_5\n-};\n-\n-#endif /* CONFIG_KERNEL_MODE_NEON */\n+extern struct xor_block_template xor_block_arm4regs;\n+extern struct xor_block_template xor_block_neon;\n \n #define arch_xor_init arch_xor_init\n static __always_inline void __init arch_xor_init(void)\ndiff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile\nindex 0ca5aae1bcc3..9295055cdfc9 100644\n--- a/arch/arm/lib/Makefile\n+++ b/arch/arm/lib/Makefile\n@@ -39,9 +39,4 @@ endif\n $(obj)/csumpartialcopy.o:\t$(obj)/csumpartialcopygeneric.S\n $(obj)/csumpartialcopyuser.o:\t$(obj)/csumpartialcopygeneric.S\n \n-ifeq ($(CONFIG_KERNEL_MODE_NEON),y)\n- CFLAGS_xor-neon.o\t\t+= $(CC_FLAGS_FPU)\n- obj-$(CONFIG_XOR_BLOCKS)\t+= xor-neon.o\n-endif\n-\n obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o\ndiff --git a/lib/raid/xor/Makefile b/lib/raid/xor/Makefile\nindex 6d03c27c37c7..fb760edae54b 100644\n--- a/lib/raid/xor/Makefile\n+++ b/lib/raid/xor/Makefile\n@@ -9,3 +9,11 @@ xor-y\t\t\t\t+= xor-8regs-prefetch.o\n xor-y\t\t\t\t+= xor-32regs-prefetch.o\n \n xor-$(CONFIG_ALPHA)\t\t+= alpha/xor.o\n+xor-$(CONFIG_ARM)\t\t+= arm/xor.o\n+ifeq ($(CONFIG_ARM),y)\n+xor-$(CONFIG_KERNEL_MODE_NEON)\t+= arm/xor-neon.o arm/xor-neon-glue.o\n+endif\n+\n+\n+CFLAGS_arm/xor-neon.o\t\t+= $(CC_FLAGS_FPU)\n+CFLAGS_REMOVE_arm/xor-neon.o\t+= $(CC_FLAGS_NO_FPU)\ndiff --git a/lib/raid/xor/arm/xor-neon-glue.c b/lib/raid/xor/arm/xor-neon-glue.c\nnew file mode 100644\nindex 000000000000..c7b162b383a2\n--- /dev/null\n+++ b/lib/raid/xor/arm/xor-neon-glue.c\n@@ -0,0 +1,58 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+/*\n+ * Copyright (C) 2001 Russell King\n+ */\n+#include <linux/raid/xor_impl.h>\n+#include <asm/xor.h>\n+\n+extern struct xor_block_template const xor_block_neon_inner;\n+\n+static void\n+xor_neon_2(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2)\n+{\n+\tkernel_neon_begin();\n+\txor_block_neon_inner.do_2(bytes, p1, p2);\n+\tkernel_neon_end();\n+}\n+\n+static void\n+xor_neon_3(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2,\n+\t const unsigned long * __restrict p3)\n+{\n+\tkernel_neon_begin();\n+\txor_block_neon_inner.do_3(bytes, p1, p2, p3);\n+\tkernel_neon_end();\n+}\n+\n+static void\n+xor_neon_4(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2,\n+\t const unsigned long * __restrict p3,\n+\t const unsigned long * __restrict p4)\n+{\n+\tkernel_neon_begin();\n+\txor_block_neon_inner.do_4(bytes, p1, p2, p3, p4);\n+\tkernel_neon_end();\n+}\n+\n+static void\n+xor_neon_5(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2,\n+\t const unsigned long * __restrict p3,\n+\t const unsigned long * __restrict p4,\n+\t const unsigned long * __restrict p5)\n+{\n+\tkernel_neon_begin();\n+\txor_block_neon_inner.do_5(bytes, p1, p2, p3, p4, p5);\n+\tkernel_neon_end();\n+}\n+\n+struct xor_block_template xor_block_neon = {\n+\t.name\t= \"neon\",\n+\t.do_2\t= xor_neon_2,\n+\t.do_3\t= xor_neon_3,\n+\t.do_4\t= xor_neon_4,\n+\t.do_5\t= xor_neon_5\n+};\ndiff --git a/arch/arm/lib/xor-neon.c b/lib/raid/xor/arm/xor-neon.c\nsimilarity index 74%\nrename from arch/arm/lib/xor-neon.c\nrename to lib/raid/xor/arm/xor-neon.c\nindex b5be50567991..c9d4378b0f0e 100644\n--- a/arch/arm/lib/xor-neon.c\n+++ b/lib/raid/xor/arm/xor-neon.c\n@@ -1,16 +1,9 @@\n // SPDX-License-Identifier: GPL-2.0-only\n /*\n- * linux/arch/arm/lib/xor-neon.c\n- *\n * Copyright (C) 2013 Linaro Ltd <ard.biesheuvel@linaro.org>\n */\n \n-#include <linux/raid/xor.h>\n #include <linux/raid/xor_impl.h>\n-#include <linux/module.h>\n-\n-MODULE_DESCRIPTION(\"NEON accelerated XOR implementation\");\n-MODULE_LICENSE(\"GPL\");\n \n #ifndef __ARM_NEON__\n #error You should compile this file with '-march=armv7-a -mfloat-abi=softfp -mfpu=neon'\n@@ -27,7 +20,7 @@ MODULE_LICENSE(\"GPL\");\n #endif\n \n #define NO_TEMPLATE\n-#include \"../../../lib/raid/xor/xor-8regs.c\"\n+#include \"../xor-8regs.c\"\n \n struct xor_block_template const xor_block_neon_inner = {\n \t.name\t= \"__inner_neon__\",\n@@ -36,4 +29,3 @@ struct xor_block_template const xor_block_neon_inner = {\n \t.do_4\t= xor_8regs_4,\n \t.do_5\t= xor_8regs_5,\n };\n-EXPORT_SYMBOL(xor_block_neon_inner);\ndiff --git a/lib/raid/xor/arm/xor.c b/lib/raid/xor/arm/xor.c\nnew file mode 100644\nindex 000000000000..2263341dbbcd\n--- /dev/null\n+++ b/lib/raid/xor/arm/xor.c\n@@ -0,0 +1,136 @@\n+// SPDX-License-Identifier: GPL-2.0-only\n+/*\n+ * Copyright (C) 2001 Russell King\n+ */\n+#include <linux/raid/xor_impl.h>\n+#include <asm/xor.h>\n+\n+#define __XOR(a1, a2) a1 ^= a2\n+\n+#define GET_BLOCK_2(dst) \\\n+\t__asm__(\"ldmia\t%0, {%1, %2}\" \\\n+\t\t: \"=r\" (dst), \"=r\" (a1), \"=r\" (a2) \\\n+\t\t: \"0\" (dst))\n+\n+#define GET_BLOCK_4(dst) \\\n+\t__asm__(\"ldmia\t%0, {%1, %2, %3, %4}\" \\\n+\t\t: \"=r\" (dst), \"=r\" (a1), \"=r\" (a2), \"=r\" (a3), \"=r\" (a4) \\\n+\t\t: \"0\" (dst))\n+\n+#define XOR_BLOCK_2(src) \\\n+\t__asm__(\"ldmia\t%0!, {%1, %2}\" \\\n+\t\t: \"=r\" (src), \"=r\" (b1), \"=r\" (b2) \\\n+\t\t: \"0\" (src)); \\\n+\t__XOR(a1, b1); __XOR(a2, b2);\n+\n+#define XOR_BLOCK_4(src) \\\n+\t__asm__(\"ldmia\t%0!, {%1, %2, %3, %4}\" \\\n+\t\t: \"=r\" (src), \"=r\" (b1), \"=r\" (b2), \"=r\" (b3), \"=r\" (b4) \\\n+\t\t: \"0\" (src)); \\\n+\t__XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)\n+\n+#define PUT_BLOCK_2(dst) \\\n+\t__asm__ __volatile__(\"stmia\t%0!, {%2, %3}\" \\\n+\t\t: \"=r\" (dst) \\\n+\t\t: \"0\" (dst), \"r\" (a1), \"r\" (a2))\n+\n+#define PUT_BLOCK_4(dst) \\\n+\t__asm__ __volatile__(\"stmia\t%0!, {%2, %3, %4, %5}\" \\\n+\t\t: \"=r\" (dst) \\\n+\t\t: \"0\" (dst), \"r\" (a1), \"r\" (a2), \"r\" (a3), \"r\" (a4))\n+\n+static void\n+xor_arm4regs_2(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2)\n+{\n+\tunsigned int lines = bytes / sizeof(unsigned long) / 4;\n+\tregister unsigned int a1 __asm__(\"r4\");\n+\tregister unsigned int a2 __asm__(\"r5\");\n+\tregister unsigned int a3 __asm__(\"r6\");\n+\tregister unsigned int a4 __asm__(\"r10\");\n+\tregister unsigned int b1 __asm__(\"r8\");\n+\tregister unsigned int b2 __asm__(\"r9\");\n+\tregister unsigned int b3 __asm__(\"ip\");\n+\tregister unsigned int b4 __asm__(\"lr\");\n+\n+\tdo {\n+\t\tGET_BLOCK_4(p1);\n+\t\tXOR_BLOCK_4(p2);\n+\t\tPUT_BLOCK_4(p1);\n+\t} while (--lines);\n+}\n+\n+static void\n+xor_arm4regs_3(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2,\n+\t const unsigned long * __restrict p3)\n+{\n+\tunsigned int lines = bytes / sizeof(unsigned long) / 4;\n+\tregister unsigned int a1 __asm__(\"r4\");\n+\tregister unsigned int a2 __asm__(\"r5\");\n+\tregister unsigned int a3 __asm__(\"r6\");\n+\tregister unsigned int a4 __asm__(\"r10\");\n+\tregister unsigned int b1 __asm__(\"r8\");\n+\tregister unsigned int b2 __asm__(\"r9\");\n+\tregister unsigned int b3 __asm__(\"ip\");\n+\tregister unsigned int b4 __asm__(\"lr\");\n+\n+\tdo {\n+\t\tGET_BLOCK_4(p1);\n+\t\tXOR_BLOCK_4(p2);\n+\t\tXOR_BLOCK_4(p3);\n+\t\tPUT_BLOCK_4(p1);\n+\t} while (--lines);\n+}\n+\n+static void\n+xor_arm4regs_4(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2,\n+\t const unsigned long * __restrict p3,\n+\t const unsigned long * __restrict p4)\n+{\n+\tunsigned int lines = bytes / sizeof(unsigned long) / 2;\n+\tregister unsigned int a1 __asm__(\"r8\");\n+\tregister unsigned int a2 __asm__(\"r9\");\n+\tregister unsigned int b1 __asm__(\"ip\");\n+\tregister unsigned int b2 __asm__(\"lr\");\n+\n+\tdo {\n+\t\tGET_BLOCK_2(p1);\n+\t\tXOR_BLOCK_2(p2);\n+\t\tXOR_BLOCK_2(p3);\n+\t\tXOR_BLOCK_2(p4);\n+\t\tPUT_BLOCK_2(p1);\n+\t} while (--lines);\n+}\n+\n+static void\n+xor_arm4regs_5(unsigned long bytes, unsigned long * __restrict p1,\n+\t const unsigned long * __restrict p2,\n+\t const unsigned long * __restrict p3,\n+\t const unsigned long * __restrict p4,\n+\t const unsigned long * __restrict p5)\n+{\n+\tunsigned int lines = bytes / sizeof(unsigned long) / 2;\n+\tregister unsigned int a1 __asm__(\"r8\");\n+\tregister unsigned int a2 __asm__(\"r9\");\n+\tregister unsigned int b1 __asm__(\"ip\");\n+\tregister unsigned int b2 __asm__(\"lr\");\n+\n+\tdo {\n+\t\tGET_BLOCK_2(p1);\n+\t\tXOR_BLOCK_2(p2);\n+\t\tXOR_BLOCK_2(p3);\n+\t\tXOR_BLOCK_2(p4);\n+\t\tXOR_BLOCK_2(p5);\n+\t\tPUT_BLOCK_2(p1);\n+\t} while (--lines);\n+}\n+\n+struct xor_block_template xor_block_arm4regs = {\n+\t.name\t= \"arm4regs\",\n+\t.do_2\t= xor_arm4regs_2,\n+\t.do_3\t= xor_arm4regs_3,\n+\t.do_4\t= xor_arm4regs_4,\n+\t.do_5\t= xor_arm4regs_5,\n+};\n", "prefixes": [ "12/28" ] }