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GET /api/patches/2216732/?format=api
{ "id": 2216732, "url": "http://patchwork.ozlabs.org/api/patches/2216732/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260327061704.3707577-21-hch@lst.de/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20260327061704.3707577-21-hch@lst.de>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20260327061704.3707577-21-hch@lst.de/", "date": "2026-03-27T06:16:52", "name": "[20/28] xor: avoid indirect calls for arm64-optimized ops", "commit_ref": null, "pull_url": null, "state": "handled-elsewhere", "archived": false, "hash": "f19836a94c181d77c371c7df122d1b40c985c039", "submitter": { "id": 82, "url": "http://patchwork.ozlabs.org/api/people/82/?format=api", "name": "Christoph Hellwig", "email": "hch@lst.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260327061704.3707577-21-hch@lst.de/mbox/", "series": [ { "id": 497693, "url": "http://patchwork.ozlabs.org/api/series/497693/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=497693", "date": "2026-03-27T06:16:33", "name": "[01/28] xor: assert that xor_blocks is not call from interrupt context", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497693/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216732/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216732/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linuxppc-dev+bounces-18890-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256\n header.s=bombadil.20210309 header.b=G9bmXSk5;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding:\n\tMIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender\n\t:Reply-To:Content-Type:Content-ID:Content-Description;\n\tbh=vfRQfd6HX2UIy1GEtF4WxXFvmD5740u62PQfhFgAIN8=; b=G9bmXSk5lWRDcT6MwzHIpW2cMk\n\tUAJCcqzFNv0zZUhqVAbwLCxEVQkdGWtWKAd/wKpyf/kuBW89AREn9l6BRkXoovrjMID1CBl4c3tSF\n\ths8DUiRJ6VDlqwRPAudWFx4pc0bpcSUbub7ywFHqwDsGmaPF0FDqJUwh2F8R2s4jJzCrHBk96xYfx\n\trsWTIx4se/FGxHE29+kj27+FtqMFwcGTTjAYHJxizzMTerlyTsej2nE7UYRSIzXD/TGrxRkozW0vL\n\tN9M0xXo5Q0KQuBYONEskmOfKAEhS+YR5nlf+zBqvL28HkNO6sWKlrlHL5Xjg+uPyT3jX3r0fUfRpG\n\tTQWgxDmg==;", "From": "Christoph Hellwig <hch@lst.de>", "To": "Andrew Morton <akpm@linux-foundation.org>", "Cc": "Richard Henderson <richard.henderson@linaro.org>,\n\tMatt Turner <mattst88@gmail.com>,\n\tMagnus Lindholm <linmag7@gmail.com>,\n\tRussell King <linux@armlinux.org.uk>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will@kernel.org>,\n\tArd Biesheuvel <ardb@kernel.org>,\n\tHuacai Chen <chenhuacai@kernel.org>,\n\tWANG Xuerui <kernel@xen0n.name>,\n\tMadhavan Srinivasan <maddy@linux.ibm.com>,\n\tMichael Ellerman <mpe@ellerman.id.au>,\n\tNicholas Piggin <npiggin@gmail.com>,\n\t\"Christophe Leroy (CS GROUP)\" <chleroy@kernel.org>,\n\tPaul Walmsley <pjw@kernel.org>,\n\tPalmer Dabbelt <palmer@dabbelt.com>,\n\tAlbert Ou <aou@eecs.berkeley.edu>,\n\tAlexandre Ghiti <alex@ghiti.fr>,\n\tHeiko Carstens <hca@linux.ibm.com>,\n\tVasily Gorbik <gor@linux.ibm.com>,\n\tAlexander Gordeev <agordeev@linux.ibm.com>,\n\tChristian Borntraeger <borntraeger@linux.ibm.com>,\n\tSven Schnelle <svens@linux.ibm.com>,\n\t\"David S. Miller\" <davem@davemloft.net>,\n\tAndreas Larsson <andreas@gaisler.com>,\n\tRichard Weinberger <richard@nod.at>,\n\tAnton Ivanov <anton.ivanov@cambridgegreys.com>,\n\tJohannes Berg <johannes@sipsolutions.net>,\n\tThomas Gleixner <tglx@kernel.org>,\n\tIngo Molnar <mingo@redhat.com>,\n\tBorislav Petkov <bp@alien8.de>,\n\tDave Hansen <dave.hansen@linux.intel.com>,\n\tx86@kernel.org,\n\t\"H. Peter Anvin\" <hpa@zytor.com>,\n\tHerbert Xu <herbert@gondor.apana.org.au>,\n\tDan Williams <dan.j.williams@intel.com>,\n\tChris Mason <clm@fb.com>,\n\tDavid Sterba <dsterba@suse.com>,\n\tArnd Bergmann <arnd@arndb.de>,\n\tSong Liu <song@kernel.org>,\n\tYu Kuai <yukuai@fnnas.com>,\n\tLi Nan <linan122@huawei.com>,\n\t\"Theodore Ts'o\" <tytso@mit.edu>,\n\t\"Jason A. Donenfeld\" <Jason@zx2c4.com>,\n\tlinux-alpha@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tloongarch@lists.linux.dev,\n\tlinuxppc-dev@lists.ozlabs.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-s390@vger.kernel.org,\n\tsparclinux@vger.kernel.org,\n\tlinux-um@lists.infradead.org,\n\tlinux-crypto@vger.kernel.org,\n\tlinux-btrfs@vger.kernel.org,\n\tlinux-arch@vger.kernel.org,\n\tlinux-raid@vger.kernel.org", "Subject": "[PATCH 20/28] xor: avoid indirect calls for arm64-optimized ops", "Date": "Fri, 27 Mar 2026 07:16:52 +0100", "Message-ID": "<20260327061704.3707577-21-hch@lst.de>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260327061704.3707577-1-hch@lst.de>", "References": "<20260327061704.3707577-1-hch@lst.de>", "X-Mailing-List": "linuxppc-dev@lists.ozlabs.org", "List-Id": "<linuxppc-dev.lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev+help@lists.ozlabs.org>", "List-Owner": "<mailto:linuxppc-dev+owner@lists.ozlabs.org>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Archive": "<https://lore.kernel.org/linuxppc-dev/>,\n <https://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Subscribe": "<mailto:linuxppc-dev+subscribe@lists.ozlabs.org>,\n <mailto:linuxppc-dev+subscribe-digest@lists.ozlabs.org>,\n <mailto:linuxppc-dev+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:linuxppc-dev+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-SRS-Rewrite": "SMTP reverse-path rewritten from <hch@infradead.org> by\n bombadil.infradead.org. See http://www.infradead.org/rpr.html", "X-Spam-Status": "No, score=0.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tHEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE,SPF_NONE\n\tautolearn=disabled version=4.0.1 OzLabs 8", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "Remove the inner xor_block_templates, and instead have two separate\nactual template that call into the neon-enabled compilation unit.\n\nSigned-off-by: Christoph Hellwig <hch@lst.de>\n---\n arch/arm64/include/asm/xor.h | 13 ++--\n lib/raid/xor/arm64/xor-neon-glue.c | 95 +++++++++++++++---------------\n lib/raid/xor/arm64/xor-neon.c | 73 +++++++++--------------\n lib/raid/xor/arm64/xor-neon.h | 30 ++++++++++\n 4 files changed, 114 insertions(+), 97 deletions(-)\n create mode 100644 lib/raid/xor/arm64/xor-neon.h", "diff": "diff --git a/arch/arm64/include/asm/xor.h b/arch/arm64/include/asm/xor.h\nindex 81718f010761..4782c760bcac 100644\n--- a/arch/arm64/include/asm/xor.h\n+++ b/arch/arm64/include/asm/xor.h\n@@ -7,15 +7,18 @@\n #include <asm-generic/xor.h>\n #include <asm/simd.h>\n \n-extern struct xor_block_template xor_block_arm64;\n-void __init xor_neon_init(void);\n+extern struct xor_block_template xor_block_neon;\n+extern struct xor_block_template xor_block_eor3;\n \n #define arch_xor_init arch_xor_init\n static __always_inline void __init arch_xor_init(void)\n {\n-\txor_neon_init();\n \txor_register(&xor_block_8regs);\n \txor_register(&xor_block_32regs);\n-\tif (cpu_has_neon())\n-\t\txor_register(&xor_block_arm64);\n+\tif (cpu_has_neon()) {\n+\t\tif (cpu_have_named_feature(SHA3))\n+\t\t\txor_register(&xor_block_eor3);\n+\t\telse\n+\t\t\txor_register(&xor_block_neon);\n+\t}\n }\ndiff --git a/lib/raid/xor/arm64/xor-neon-glue.c b/lib/raid/xor/arm64/xor-neon-glue.c\nindex 067a2095659a..08c3e3573388 100644\n--- a/lib/raid/xor/arm64/xor-neon-glue.c\n+++ b/lib/raid/xor/arm64/xor-neon-glue.c\n@@ -7,51 +7,54 @@\n #include <linux/raid/xor_impl.h>\n #include <asm/simd.h>\n #include <asm/xor.h>\n+#include \"xor-neon.h\"\n \n-extern struct xor_block_template const xor_block_inner_neon;\n-\n-static void\n-xor_neon_2(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2)\n-{\n-\tscoped_ksimd()\n-\t\txor_block_inner_neon.do_2(bytes, p1, p2);\n-}\n-\n-static void\n-xor_neon_3(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3)\n-{\n-\tscoped_ksimd()\n-\t\txor_block_inner_neon.do_3(bytes, p1, p2, p3);\n-}\n-\n-static void\n-xor_neon_4(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3,\n-\t const unsigned long * __restrict p4)\n-{\n-\tscoped_ksimd()\n-\t\txor_block_inner_neon.do_4(bytes, p1, p2, p3, p4);\n-}\n-\n-static void\n-xor_neon_5(unsigned long bytes, unsigned long * __restrict p1,\n-\t const unsigned long * __restrict p2,\n-\t const unsigned long * __restrict p3,\n-\t const unsigned long * __restrict p4,\n-\t const unsigned long * __restrict p5)\n-{\n-\tscoped_ksimd()\n-\t\txor_block_inner_neon.do_5(bytes, p1, p2, p3, p4, p5);\n-}\n-\n-struct xor_block_template xor_block_arm64 = {\n-\t.name = \"arm64_neon\",\n-\t.do_2 = xor_neon_2,\n-\t.do_3 = xor_neon_3,\n-\t.do_4 = xor_neon_4,\n-\t.do_5\t= xor_neon_5\n+#define XOR_TEMPLATE(_name)\t\t\t\t\t\t\\\n+static void\t\t\t\t\t\t\t\t\\\n+xor_##_name##_2(unsigned long bytes, unsigned long * __restrict p1,\t\\\n+\t const unsigned long * __restrict p2)\t\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tscoped_ksimd()\t\t\t\t\t\t\t\\\n+\t\t__xor_##_name##_2(bytes, p1, p2);\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+static void\t\t\t\t\t\t\t\t\\\n+xor_##_name##_3(unsigned long bytes, unsigned long * __restrict p1,\t\\\n+\t const unsigned long * __restrict p2,\t\t\t\t\\\n+\t const unsigned long * __restrict p3)\t\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tscoped_ksimd()\t\t\t\t\t\t\t\\\n+\t\t__xor_##_name##_3(bytes, p1, p2, p3);\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+static void\t\t\t\t\t\t\t\t\\\n+xor_##_name##_4(unsigned long bytes, unsigned long * __restrict p1,\t\\\n+\t const unsigned long * __restrict p2,\t\t\t\t\\\n+\t const unsigned long * __restrict p3,\t\t\t\t\\\n+\t const unsigned long * __restrict p4)\t\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tscoped_ksimd()\t\t\t\t\t\t\t\\\n+\t\t__xor_##_name##_4(bytes, p1, p2, p3, p4);\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+static void\t\t\t\t\t\t\t\t\\\n+xor_##_name##_5(unsigned long bytes, unsigned long * __restrict p1,\t\\\n+\t const unsigned long * __restrict p2,\t\t\t\t\\\n+\t const unsigned long * __restrict p3,\t\t\t\t\\\n+\t const unsigned long * __restrict p4,\t\t\t\t\\\n+\t const unsigned long * __restrict p5)\t\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tscoped_ksimd()\t\t\t\t\t\t\t\\\n+\t\t__xor_##_name##_5(bytes, p1, p2, p3, p4, p5);\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+struct xor_block_template xor_block_##_name = {\t\t\t\t\\\n+\t.name = __stringify(_name),\t\t\t\t\t\\\n+\t.do_2 = xor_##_name##_2,\t\t\t\t\t\\\n+\t.do_3 = xor_##_name##_3,\t\t\t\t\t\\\n+\t.do_4 = xor_##_name##_4,\t\t\t\t\t\\\n+\t.do_5\t= xor_##_name##_5\t\t\t\t\t\\\n };\n+\n+XOR_TEMPLATE(neon);\n+XOR_TEMPLATE(eor3);\ndiff --git a/lib/raid/xor/arm64/xor-neon.c b/lib/raid/xor/arm64/xor-neon.c\nindex 8d2d185090db..61194c292917 100644\n--- a/lib/raid/xor/arm64/xor-neon.c\n+++ b/lib/raid/xor/arm64/xor-neon.c\n@@ -8,9 +8,10 @@\n #include <linux/cache.h>\n #include <asm/neon-intrinsics.h>\n #include <asm/xor.h>\n+#include \"xor-neon.h\"\n \n-static void xor_arm64_neon_2(unsigned long bytes, unsigned long * __restrict p1,\n-\tconst unsigned long * __restrict p2)\n+void __xor_neon_2(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2)\n {\n \tuint64_t *dp1 = (uint64_t *)p1;\n \tuint64_t *dp2 = (uint64_t *)p2;\n@@ -36,9 +37,9 @@ static void xor_arm64_neon_2(unsigned long bytes, unsigned long * __restrict p1,\n \t} while (--lines > 0);\n }\n \n-static void xor_arm64_neon_3(unsigned long bytes, unsigned long * __restrict p1,\n-\tconst unsigned long * __restrict p2,\n-\tconst unsigned long * __restrict p3)\n+void __xor_neon_3(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3)\n {\n \tuint64_t *dp1 = (uint64_t *)p1;\n \tuint64_t *dp2 = (uint64_t *)p2;\n@@ -72,10 +73,10 @@ static void xor_arm64_neon_3(unsigned long bytes, unsigned long * __restrict p1,\n \t} while (--lines > 0);\n }\n \n-static void xor_arm64_neon_4(unsigned long bytes, unsigned long * __restrict p1,\n-\tconst unsigned long * __restrict p2,\n-\tconst unsigned long * __restrict p3,\n-\tconst unsigned long * __restrict p4)\n+void __xor_neon_4(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4)\n {\n \tuint64_t *dp1 = (uint64_t *)p1;\n \tuint64_t *dp2 = (uint64_t *)p2;\n@@ -117,11 +118,11 @@ static void xor_arm64_neon_4(unsigned long bytes, unsigned long * __restrict p1,\n \t} while (--lines > 0);\n }\n \n-static void xor_arm64_neon_5(unsigned long bytes, unsigned long * __restrict p1,\n-\tconst unsigned long * __restrict p2,\n-\tconst unsigned long * __restrict p3,\n-\tconst unsigned long * __restrict p4,\n-\tconst unsigned long * __restrict p5)\n+void __xor_neon_5(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4,\n+\t\tconst unsigned long * __restrict p5)\n {\n \tuint64_t *dp1 = (uint64_t *)p1;\n \tuint64_t *dp2 = (uint64_t *)p2;\n@@ -171,14 +172,6 @@ static void xor_arm64_neon_5(unsigned long bytes, unsigned long * __restrict p1,\n \t} while (--lines > 0);\n }\n \n-struct xor_block_template xor_block_inner_neon __ro_after_init = {\n-\t.name\t= \"__inner_neon__\",\n-\t.do_2\t= xor_arm64_neon_2,\n-\t.do_3\t= xor_arm64_neon_3,\n-\t.do_4\t= xor_arm64_neon_4,\n-\t.do_5\t= xor_arm64_neon_5,\n-};\n-\n static inline uint64x2_t eor3(uint64x2_t p, uint64x2_t q, uint64x2_t r)\n {\n \tuint64x2_t res;\n@@ -189,10 +182,9 @@ static inline uint64x2_t eor3(uint64x2_t p, uint64x2_t q, uint64x2_t r)\n \treturn res;\n }\n \n-static void xor_arm64_eor3_3(unsigned long bytes,\n-\tunsigned long * __restrict p1,\n-\tconst unsigned long * __restrict p2,\n-\tconst unsigned long * __restrict p3)\n+void __xor_eor3_3(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3)\n {\n \tuint64_t *dp1 = (uint64_t *)p1;\n \tuint64_t *dp2 = (uint64_t *)p2;\n@@ -224,11 +216,10 @@ static void xor_arm64_eor3_3(unsigned long bytes,\n \t} while (--lines > 0);\n }\n \n-static void xor_arm64_eor3_4(unsigned long bytes,\n-\tunsigned long * __restrict p1,\n-\tconst unsigned long * __restrict p2,\n-\tconst unsigned long * __restrict p3,\n-\tconst unsigned long * __restrict p4)\n+void __xor_eor3_4(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4)\n {\n \tuint64_t *dp1 = (uint64_t *)p1;\n \tuint64_t *dp2 = (uint64_t *)p2;\n@@ -268,12 +259,11 @@ static void xor_arm64_eor3_4(unsigned long bytes,\n \t} while (--lines > 0);\n }\n \n-static void xor_arm64_eor3_5(unsigned long bytes,\n-\tunsigned long * __restrict p1,\n-\tconst unsigned long * __restrict p2,\n-\tconst unsigned long * __restrict p3,\n-\tconst unsigned long * __restrict p4,\n-\tconst unsigned long * __restrict p5)\n+void __xor_eor3_5(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4,\n+\t\tconst unsigned long * __restrict p5)\n {\n \tuint64_t *dp1 = (uint64_t *)p1;\n \tuint64_t *dp2 = (uint64_t *)p2;\n@@ -314,12 +304,3 @@ static void xor_arm64_eor3_5(unsigned long bytes,\n \t\tdp5 += 8;\n \t} while (--lines > 0);\n }\n-\n-void __init xor_neon_init(void)\n-{\n-\tif (cpu_have_named_feature(SHA3)) {\n-\t\txor_block_inner_neon.do_3 = xor_arm64_eor3_3;\n-\t\txor_block_inner_neon.do_4 = xor_arm64_eor3_4;\n-\t\txor_block_inner_neon.do_5 = xor_arm64_eor3_5;\n-\t}\n-}\ndiff --git a/lib/raid/xor/arm64/xor-neon.h b/lib/raid/xor/arm64/xor-neon.h\nnew file mode 100644\nindex 000000000000..cec0ac846fea\n--- /dev/null\n+++ b/lib/raid/xor/arm64/xor-neon.h\n@@ -0,0 +1,30 @@\n+/* SPDX-License-Identifier: GPL-2.0-only */\n+\n+void __xor_neon_2(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2);\n+void __xor_neon_3(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3);\n+void __xor_neon_4(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4);\n+void __xor_neon_5(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4,\n+\t\tconst unsigned long * __restrict p5);\n+\n+#define __xor_eor3_2\t__xor_neon_2\n+void __xor_eor3_3(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3);\n+void __xor_eor3_4(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4);\n+void __xor_eor3_5(unsigned long bytes, unsigned long * __restrict p1,\n+\t\tconst unsigned long * __restrict p2,\n+\t\tconst unsigned long * __restrict p3,\n+\t\tconst unsigned long * __restrict p4,\n+\t\tconst unsigned long * __restrict p5);\n", "prefixes": [ "20/28" ] }