Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2216724/?format=api
{ "id": 2216724, "url": "http://patchwork.ozlabs.org/api/patches/2216724/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260327061704.3707577-18-hch@lst.de/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20260327061704.3707577-18-hch@lst.de>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20260327061704.3707577-18-hch@lst.de/", "date": "2026-03-27T06:16:49", "name": "[17/28] sparc: move the XOR code to lib/raid/", "commit_ref": null, "pull_url": null, "state": "handled-elsewhere", "archived": false, "hash": "015d69f7a4a60ba72233f0057bfa8dc6cc0e842a", "submitter": { "id": 82, "url": "http://patchwork.ozlabs.org/api/people/82/?format=api", "name": "Christoph Hellwig", "email": "hch@lst.de" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260327061704.3707577-18-hch@lst.de/mbox/", "series": [ { "id": 497693, "url": "http://patchwork.ozlabs.org/api/series/497693/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=497693", "date": "2026-03-27T06:16:33", "name": "[01/28] xor: assert that xor_blocks is not call from interrupt context", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497693/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216724/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216724/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linuxppc-dev+bounces-18887-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256\n header.s=bombadil.20210309 header.b=DtPuA1Bk;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; helo=lists.ozlabs.org;\n envelope-from=linuxppc-dev+bounces-18887-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)", "lists.ozlabs.org;\n arc=none smtp.remote-ip=\"2607:7c80:54:3::133\"", "lists.ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=lst.de", "lists.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256\n header.s=bombadil.20210309 header.b=DtPuA1Bk;\n\tdkim-atps=neutral", "lists.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=bombadil.srs.infradead.org\n (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org;\n envelope-from=batv+7b1de7ca9b09bfe890a7+8251+infradead.org+hch@bombadil.srs.infradead.org;\n receiver=lists.ozlabs.org)" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org\n [IPv6:2404:9400:21b9:f100::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhrBw5Wmsz1xy1\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 17:21:44 +1100 (AEDT)", "from boromir.ozlabs.org (localhost [127.0.0.1])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4fhrBw4YHcz3bl6;\n\tFri, 27 Mar 2026 17:21:44 +1100 (AEDT)", "from bombadil.infradead.org (bombadil.infradead.org\n [IPv6:2607:7c80:54:3::133])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 4fhrBv75SDz3bl1\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 27 Mar 2026 17:21:43 +1100 (AEDT)", "from\n 2a02-8389-2341-5b80-d601-7564-c2e0-491c.cable.dynamic.v6.surfer.at\n ([2a02:8389:2341:5b80:d601:7564:c2e0:491c] helo=localhost)\n\tby bombadil.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux))\n\tid 1w60ZS-00000006mmn-2zgc;\n\tFri, 27 Mar 2026 06:21:27 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1774592504;\n\tcv=none;\n b=D3Ea7aCFbPNLw2BEsGq2XC/2hd7u0khaTEbawCwvFKt5h9a/LttEC6zBEy55E/WqY9yYPb/0aNdL7c6CPxz+zE/UeXdychQKu8x2N3kRyx8FZxYxTc3wILqRggEnXhJBrA1PrJNvo2ddYMt7dGpihx3ZpN5/nhfRD2mMc5f8vr5BcBgJ5YqW92e9PBRrGUZsobnAXHsaimNW3f++BpPr1nxH7KbF/4vf1KyT9hVAG4bnWVBAaGyB/RyHwzqX3bzTZk0yhrwIRHoQPotPLjA3IviP1+COzoF6jiAMZEZgpj9oHGhCFLIA4ZLfW0WG20HlCUtNWhuZqJ1gk4+PmMjAxA==", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707;\n\tt=1774592504; c=relaxed/relaxed;\n\tbh=TEJqE0da2sBbiONNO3v6zKUvRiCT9+M3qH0kneUzSyM=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=LbKb/tlzSFcjfJ3+1GOgGqCi0BGghHmApU9cGiJyfMeiCpY1rCGsYE3ber+LvCwDii0qjnHmDEIIjkRW0j3yi9vwm0mq76Lhqhbzw7uWDfZwMHcHKfsPAbSFxFQgL5zT81J/Lj8tyYSCbI4y7QeE7OkqHmNA4lcTrl6QCgrdCu1qmcbXXG7cAGg61fH7FFSWjrSxJ130k1a3xzMOjr2lTd5QtYGDVjmxvasqwP5ODuuTCEBkx5a/fJfLst3pvEAlQ8lopCY0f5bdJncX8Vo325fAC60gjL76lWd8CFOYfbmVuttiIa/IY8TEmzzelASmcxsokNJCpbYIxCzaoLLxLA==", "ARC-Authentication-Results": "i=1; lists.ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=lst.de; dkim=pass (2048-bit key;\n secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256\n header.s=bombadil.20210309 header.b=DtPuA1Bk; dkim-atps=neutral;\n spf=none (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org;\n envelope-from=batv+7b1de7ca9b09bfe890a7+8251+infradead.org+hch@bombadil.srs.infradead.org;\n receiver=lists.ozlabs.org) smtp.mailfrom=bombadil.srs.infradead.org", "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding:\n\tMIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender\n\t:Reply-To:Content-Type:Content-ID:Content-Description;\n\tbh=TEJqE0da2sBbiONNO3v6zKUvRiCT9+M3qH0kneUzSyM=; b=DtPuA1BkAVwRXGe+Pj26N9PA85\n\t+pRBTHkvDAgjUvlypy7ToqbgMEIS/ajNfQum6QU7A2FyaCxwX9TDElnC4sr8AJWDDVrTGvdqBU4GA\n\tarF+bI7n6E67DnhDPLjf6rNSaqTv1vu/ev9dT0PVytzn4Fu1naa7M/wYNhCdMaSmHEVIeFkNThZbE\n\tcdaNnBPFtSYGJHxU9IQ4sGSvJEkatGzwkwnvNA5wUDCyjtQ3geQST38YiGncsAxkVmbJvOypEobuz\n\tLckB0Of79cDRpm94lLB9oI9heWkXQj/FDWwpt3AwKJRG9Xh3eg13sJx6CE73D1c9k6a7sdTUlu/Bk\n\tE65grkew==;", "From": "Christoph Hellwig <hch@lst.de>", "To": "Andrew Morton <akpm@linux-foundation.org>", "Cc": "Richard Henderson <richard.henderson@linaro.org>,\n\tMatt Turner <mattst88@gmail.com>,\n\tMagnus Lindholm <linmag7@gmail.com>,\n\tRussell King <linux@armlinux.org.uk>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will@kernel.org>,\n\tArd Biesheuvel <ardb@kernel.org>,\n\tHuacai Chen <chenhuacai@kernel.org>,\n\tWANG Xuerui <kernel@xen0n.name>,\n\tMadhavan Srinivasan <maddy@linux.ibm.com>,\n\tMichael Ellerman <mpe@ellerman.id.au>,\n\tNicholas Piggin <npiggin@gmail.com>,\n\t\"Christophe Leroy (CS GROUP)\" <chleroy@kernel.org>,\n\tPaul Walmsley <pjw@kernel.org>,\n\tPalmer Dabbelt <palmer@dabbelt.com>,\n\tAlbert Ou <aou@eecs.berkeley.edu>,\n\tAlexandre Ghiti <alex@ghiti.fr>,\n\tHeiko Carstens <hca@linux.ibm.com>,\n\tVasily Gorbik <gor@linux.ibm.com>,\n\tAlexander Gordeev <agordeev@linux.ibm.com>,\n\tChristian Borntraeger <borntraeger@linux.ibm.com>,\n\tSven Schnelle <svens@linux.ibm.com>,\n\t\"David S. Miller\" <davem@davemloft.net>,\n\tAndreas Larsson <andreas@gaisler.com>,\n\tRichard Weinberger <richard@nod.at>,\n\tAnton Ivanov <anton.ivanov@cambridgegreys.com>,\n\tJohannes Berg <johannes@sipsolutions.net>,\n\tThomas Gleixner <tglx@kernel.org>,\n\tIngo Molnar <mingo@redhat.com>,\n\tBorislav Petkov <bp@alien8.de>,\n\tDave Hansen <dave.hansen@linux.intel.com>,\n\tx86@kernel.org,\n\t\"H. Peter Anvin\" <hpa@zytor.com>,\n\tHerbert Xu <herbert@gondor.apana.org.au>,\n\tDan Williams <dan.j.williams@intel.com>,\n\tChris Mason <clm@fb.com>,\n\tDavid Sterba <dsterba@suse.com>,\n\tArnd Bergmann <arnd@arndb.de>,\n\tSong Liu <song@kernel.org>,\n\tYu Kuai <yukuai@fnnas.com>,\n\tLi Nan <linan122@huawei.com>,\n\t\"Theodore Ts'o\" <tytso@mit.edu>,\n\t\"Jason A. Donenfeld\" <Jason@zx2c4.com>,\n\tlinux-alpha@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tloongarch@lists.linux.dev,\n\tlinuxppc-dev@lists.ozlabs.org,\n\tlinux-riscv@lists.infradead.org,\n\tlinux-s390@vger.kernel.org,\n\tsparclinux@vger.kernel.org,\n\tlinux-um@lists.infradead.org,\n\tlinux-crypto@vger.kernel.org,\n\tlinux-btrfs@vger.kernel.org,\n\tlinux-arch@vger.kernel.org,\n\tlinux-raid@vger.kernel.org", "Subject": "[PATCH 17/28] sparc: move the XOR code to lib/raid/", "Date": "Fri, 27 Mar 2026 07:16:49 +0100", "Message-ID": "<20260327061704.3707577-18-hch@lst.de>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260327061704.3707577-1-hch@lst.de>", "References": "<20260327061704.3707577-1-hch@lst.de>", "X-Mailing-List": "linuxppc-dev@lists.ozlabs.org", "List-Id": "<linuxppc-dev.lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev+help@lists.ozlabs.org>", "List-Owner": "<mailto:linuxppc-dev+owner@lists.ozlabs.org>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Archive": "<https://lore.kernel.org/linuxppc-dev/>,\n <https://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Subscribe": "<mailto:linuxppc-dev+subscribe@lists.ozlabs.org>,\n <mailto:linuxppc-dev+subscribe-digest@lists.ozlabs.org>,\n <mailto:linuxppc-dev+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:linuxppc-dev+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-SRS-Rewrite": "SMTP reverse-path rewritten from <hch@infradead.org> by\n bombadil.infradead.org. See http://www.infradead.org/rpr.html", "X-Spam-Status": "No, score=0.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tHEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE,SPF_NONE\n\tautolearn=disabled version=4.0.1 OzLabs 8", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "Move the optimized XOR into lib/raid and include it it in xor.ko\ninstead of always building it into the main kernel image.\n\nThe code should probably be split into separate files for the two\nimplementations, but for now this just does the trivial move.\n\nSigned-off-by: Christoph Hellwig <hch@lst.de>\n---\n arch/sparc/include/asm/asm-prototypes.h | 1 -\n arch/sparc/include/asm/xor.h | 45 ++++++++++++++++---\n arch/sparc/lib/Makefile | 2 +-\n lib/raid/xor/Makefile | 2 +\n .../raid/xor/sparc/xor-sparc32.c | 23 ++--------\n .../raid/xor/sparc/xor-sparc64-glue.c | 26 +++--------\n .../xor.S => lib/raid/xor/sparc/xor-sparc64.S | 10 -----\n 7 files changed, 52 insertions(+), 57 deletions(-)\n rename arch/sparc/include/asm/xor_32.h => lib/raid/xor/sparc/xor-sparc32.c (93%)\n rename arch/sparc/include/asm/xor_64.h => lib/raid/xor/sparc/xor-sparc64-glue.c (74%)\n rename arch/sparc/lib/xor.S => lib/raid/xor/sparc/xor-sparc64.S (98%)", "diff": "diff --git a/arch/sparc/include/asm/asm-prototypes.h b/arch/sparc/include/asm/asm-prototypes.h\nindex 08810808ca6d..bbd1a8afaabf 100644\n--- a/arch/sparc/include/asm/asm-prototypes.h\n+++ b/arch/sparc/include/asm/asm-prototypes.h\n@@ -14,7 +14,6 @@\n #include <asm/oplib.h>\n #include <asm/pgtable.h>\n #include <asm/trap_block.h>\n-#include <asm/xor.h>\n \n void *__memscan_zero(void *, size_t);\n void *__memscan_generic(void *, int, size_t);\ndiff --git a/arch/sparc/include/asm/xor.h b/arch/sparc/include/asm/xor.h\nindex f4c651e203c4..f923b009fc24 100644\n--- a/arch/sparc/include/asm/xor.h\n+++ b/arch/sparc/include/asm/xor.h\n@@ -1,9 +1,44 @@\n /* SPDX-License-Identifier: GPL-2.0 */\n+/*\n+ * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)\n+ * Copyright (C) 2006 David S. Miller <davem@davemloft.net>\n+ */\n #ifndef ___ASM_SPARC_XOR_H\n #define ___ASM_SPARC_XOR_H\n+\n #if defined(__sparc__) && defined(__arch64__)\n-#include <asm/xor_64.h>\n-#else\n-#include <asm/xor_32.h>\n-#endif\n-#endif\n+#include <asm/spitfire.h>\n+\n+extern struct xor_block_template xor_block_VIS;\n+extern struct xor_block_template xor_block_niagara;\n+\n+#define arch_xor_init arch_xor_init\n+static __always_inline void __init arch_xor_init(void)\n+{\n+\t/* Force VIS for everything except Niagara. */\n+\tif (tlb_type == hypervisor &&\n+\t (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||\n+\t sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||\n+\t sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||\n+\t sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||\n+\t sun4v_chip_type == SUN4V_CHIP_NIAGARA5))\n+\t\txor_force(&xor_block_niagara);\n+\telse\n+\t\txor_force(&xor_block_VIS);\n+}\n+#else /* sparc64 */\n+\n+/* For grins, also test the generic routines. */\n+#include <asm-generic/xor.h>\n+\n+extern struct xor_block_template xor_block_SPARC;\n+\n+#define arch_xor_init arch_xor_init\n+static __always_inline void __init arch_xor_init(void)\n+{\n+\txor_register(&xor_block_8regs);\n+\txor_register(&xor_block_32regs);\n+\txor_register(&xor_block_SPARC);\n+}\n+#endif /* !sparc64 */\n+#endif /* ___ASM_SPARC_XOR_H */\ndiff --git a/arch/sparc/lib/Makefile b/arch/sparc/lib/Makefile\nindex 783bdec0d7be..dd10cdd6f062 100644\n--- a/arch/sparc/lib/Makefile\n+++ b/arch/sparc/lib/Makefile\n@@ -48,7 +48,7 @@ lib-$(CONFIG_SPARC64) += GENmemcpy.o GENcopy_from_user.o GENcopy_to_user.o\n lib-$(CONFIG_SPARC64) += GENpatch.o GENpage.o GENbzero.o\n \n lib-$(CONFIG_SPARC64) += copy_in_user.o memmove.o\n-lib-$(CONFIG_SPARC64) += mcount.o ipcsum.o xor.o hweight.o ffs.o\n+lib-$(CONFIG_SPARC64) += mcount.o ipcsum.o hweight.o ffs.o\n \n obj-$(CONFIG_SPARC64) += iomap.o\n obj-$(CONFIG_SPARC32) += atomic32.o\ndiff --git a/lib/raid/xor/Makefile b/lib/raid/xor/Makefile\nindex 9e729b50e775..3a7c887d08ee 100644\n--- a/lib/raid/xor/Makefile\n+++ b/lib/raid/xor/Makefile\n@@ -18,6 +18,8 @@ xor-$(CONFIG_CPU_HAS_LSX)\t+= loongarch/xor_simd.o\n xor-$(CONFIG_CPU_HAS_LSX)\t+= loongarch/xor_simd_glue.o\n xor-$(CONFIG_ALTIVEC)\t\t+= powerpc/xor_vmx.o powerpc/xor_vmx_glue.o\n xor-$(CONFIG_RISCV_ISA_V)\t+= riscv/xor.o riscv/xor-glue.o\n+xor-$(CONFIG_SPARC32)\t\t+= sparc/xor-sparc32.o\n+xor-$(CONFIG_SPARC64)\t\t+= sparc/xor-sparc64.o sparc/xor-sparc64-glue.o\n \n \n CFLAGS_arm/xor-neon.o\t\t+= $(CC_FLAGS_FPU)\ndiff --git a/arch/sparc/include/asm/xor_32.h b/lib/raid/xor/sparc/xor-sparc32.c\nsimilarity index 93%\nrename from arch/sparc/include/asm/xor_32.h\nrename to lib/raid/xor/sparc/xor-sparc32.c\nindex 8fbf0c07ec28..b65a75a6e59d 100644\n--- a/arch/sparc/include/asm/xor_32.h\n+++ b/lib/raid/xor/sparc/xor-sparc32.c\n@@ -1,16 +1,12 @@\n-/* SPDX-License-Identifier: GPL-2.0-or-later */\n-/*\n- * include/asm/xor.h\n- *\n- * Optimized RAID-5 checksumming functions for 32-bit Sparc.\n- */\n-\n+// SPDX-License-Identifier: GPL-2.0-or-later\n /*\n * High speed xor_block operation for RAID4/5 utilizing the\n * ldd/std SPARC instructions.\n *\n * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz)\n */\n+#include <linux/raid/xor_impl.h>\n+#include <asm/xor.h>\n \n static void\n sparc_2(unsigned long bytes, unsigned long * __restrict p1,\n@@ -248,21 +244,10 @@ sparc_5(unsigned long bytes, unsigned long * __restrict p1,\n \t} while (--lines > 0);\n }\n \n-static struct xor_block_template xor_block_SPARC = {\n+struct xor_block_template xor_block_SPARC = {\n \t.name\t= \"SPARC\",\n \t.do_2\t= sparc_2,\n \t.do_3\t= sparc_3,\n \t.do_4\t= sparc_4,\n \t.do_5\t= sparc_5,\n };\n-\n-/* For grins, also test the generic routines. */\n-#include <asm-generic/xor.h>\n-\n-#define arch_xor_init arch_xor_init\n-static __always_inline void __init arch_xor_init(void)\n-{\n-\txor_register(&xor_block_8regs);\n-\txor_register(&xor_block_32regs);\n-\txor_register(&xor_block_SPARC);\n-}\ndiff --git a/arch/sparc/include/asm/xor_64.h b/lib/raid/xor/sparc/xor-sparc64-glue.c\nsimilarity index 74%\nrename from arch/sparc/include/asm/xor_64.h\nrename to lib/raid/xor/sparc/xor-sparc64-glue.c\nindex e0482ecc0a68..3c67c8c3a0e8 100644\n--- a/arch/sparc/include/asm/xor_64.h\n+++ b/lib/raid/xor/sparc/xor-sparc64-glue.c\n@@ -1,7 +1,5 @@\n-/* SPDX-License-Identifier: GPL-2.0-or-later */\n+// SPDX-License-Identifier: GPL-2.0-or-later\n /*\n- * include/asm/xor.h\n- *\n * High speed xor_block operation for RAID4/5 utilizing the\n * UltraSparc Visual Instruction Set and Niagara block-init\n * twin-load instructions.\n@@ -10,7 +8,8 @@\n * Copyright (C) 2006 David S. Miller <davem@davemloft.net>\n */\n \n-#include <asm/spitfire.h>\n+#include <linux/raid/xor_impl.h>\n+#include <asm/xor.h>\n \n void xor_vis_2(unsigned long bytes, unsigned long * __restrict p1,\n \t const unsigned long * __restrict p2);\n@@ -29,7 +28,7 @@ void xor_vis_5(unsigned long bytes, unsigned long * __restrict p1,\n \n /* XXX Ugh, write cheetah versions... -DaveM */\n \n-static struct xor_block_template xor_block_VIS = {\n+struct xor_block_template xor_block_VIS = {\n .name\t= \"VIS\",\n .do_2\t= xor_vis_2,\n .do_3\t= xor_vis_3,\n@@ -52,25 +51,10 @@ void xor_niagara_5(unsigned long bytes, unsigned long * __restrict p1,\n \t\t const unsigned long * __restrict p4,\n \t\t const unsigned long * __restrict p5);\n \n-static struct xor_block_template xor_block_niagara = {\n+struct xor_block_template xor_block_niagara = {\n .name\t= \"Niagara\",\n .do_2\t= xor_niagara_2,\n .do_3\t= xor_niagara_3,\n .do_4\t= xor_niagara_4,\n .do_5\t= xor_niagara_5,\n };\n-\n-#define arch_xor_init arch_xor_init\n-static __always_inline void __init arch_xor_init(void)\n-{\n-\t/* Force VIS for everything except Niagara. */\n-\tif (tlb_type == hypervisor &&\n-\t (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||\n-\t sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||\n-\t sun4v_chip_type == SUN4V_CHIP_NIAGARA3 ||\n-\t sun4v_chip_type == SUN4V_CHIP_NIAGARA4 ||\n-\t sun4v_chip_type == SUN4V_CHIP_NIAGARA5))\n-\t\txor_force(&xor_block_niagara);\n-\telse\n-\t\txor_force(&xor_block_VIS);\n-}\ndiff --git a/arch/sparc/lib/xor.S b/lib/raid/xor/sparc/xor-sparc64.S\nsimilarity index 98%\nrename from arch/sparc/lib/xor.S\nrename to lib/raid/xor/sparc/xor-sparc64.S\nindex 35461e3b2a9b..a7b74d473bd4 100644\n--- a/arch/sparc/lib/xor.S\n+++ b/lib/raid/xor/sparc/xor-sparc64.S\n@@ -1,7 +1,5 @@\n /* SPDX-License-Identifier: GPL-2.0 */\n /*\n- * arch/sparc64/lib/xor.S\n- *\n * High speed xor_block operation for RAID4/5 utilizing the\n * UltraSparc Visual Instruction Set and Niagara store-init/twin-load.\n *\n@@ -92,7 +90,6 @@ ENTRY(xor_vis_2)\n \tretl\n \t wr\t%g0, 0, %fprs\n ENDPROC(xor_vis_2)\n-EXPORT_SYMBOL(xor_vis_2)\n \n ENTRY(xor_vis_3)\n \trd\t%fprs, %o5\n@@ -159,7 +156,6 @@ ENTRY(xor_vis_3)\n \tretl\n \t wr\t%g0, 0, %fprs\n ENDPROC(xor_vis_3)\n-EXPORT_SYMBOL(xor_vis_3)\n \n ENTRY(xor_vis_4)\n \trd\t%fprs, %o5\n@@ -245,7 +241,6 @@ ENTRY(xor_vis_4)\n \tretl\n \t wr\t%g0, 0, %fprs\n ENDPROC(xor_vis_4)\n-EXPORT_SYMBOL(xor_vis_4)\n \n ENTRY(xor_vis_5)\n \tsave\t%sp, -192, %sp\n@@ -352,7 +347,6 @@ ENTRY(xor_vis_5)\n \tret\n \t restore\n ENDPROC(xor_vis_5)\n-EXPORT_SYMBOL(xor_vis_5)\n \n \t/* Niagara versions. */\n ENTRY(xor_niagara_2) /* %o0=bytes, %o1=dest, %o2=src */\n@@ -399,7 +393,6 @@ ENTRY(xor_niagara_2) /* %o0=bytes, %o1=dest, %o2=src */\n \tret\n \t restore\n ENDPROC(xor_niagara_2)\n-EXPORT_SYMBOL(xor_niagara_2)\n \n ENTRY(xor_niagara_3) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2 */\n \tsave\t\t%sp, -192, %sp\n@@ -461,7 +454,6 @@ ENTRY(xor_niagara_3) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2 */\n \tret\n \t restore\n ENDPROC(xor_niagara_3)\n-EXPORT_SYMBOL(xor_niagara_3)\n \n ENTRY(xor_niagara_4) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */\n \tsave\t\t%sp, -192, %sp\n@@ -544,7 +536,6 @@ ENTRY(xor_niagara_4) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */\n \tret\n \t restore\n ENDPROC(xor_niagara_4)\n-EXPORT_SYMBOL(xor_niagara_4)\n \n ENTRY(xor_niagara_5) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3, %o5=src4 */\n \tsave\t\t%sp, -192, %sp\n@@ -643,4 +634,3 @@ ENTRY(xor_niagara_5) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3, %o5=s\n \tret\n \t restore\n ENDPROC(xor_niagara_5)\n-EXPORT_SYMBOL(xor_niagara_5)\n", "prefixes": [ "17/28" ] }