Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2216672/?format=api
{ "id": 2216672, "url": "http://patchwork.ozlabs.org/api/patches/2216672/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327035422.4020455-3-den@valinux.co.jp/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327035422.4020455-3-den@valinux.co.jp>", "list_archive_url": null, "date": "2026-03-27T03:54:17", "name": "[v12,2/7] PCI: dwc: Record integrated eDMA register window", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "981bb241d0180d4809748f98c919e4076d16bb26", "submitter": { "id": 91573, "url": "http://patchwork.ozlabs.org/api/people/91573/?format=api", "name": "Koichiro Den", "email": "den@valinux.co.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260327035422.4020455-3-den@valinux.co.jp/mbox/", "series": [ { "id": 497685, "url": "http://patchwork.ozlabs.org/api/series/497685/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497685", "date": "2026-03-27T03:54:17", "name": "PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback", "version": 12, "mbox": "http://patchwork.ozlabs.org/series/497685/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216672/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216672/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51245-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.a=rsa-sha256 header.s=selector1 header.b=Kvgu+wLd;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; helo=sto.lore.kernel.org;\n envelope-from=linux-pci+bounces-51245-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.b=\"Kvgu+wLd\"", "smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=52.101.125.142", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=valinux.co.jp", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=valinux.co.jp", "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=valinux.co.jp;" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhmx95nmkz1xy1\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 14:54:37 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 3066F303E828\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 27 Mar 2026 03:54:34 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5EA8021CFF6;\n\tFri, 27 Mar 2026 03:54:33 +0000 (UTC)", "from TYVP286CU001.outbound.protection.outlook.com\n (mail-japaneastazon11021142.outbound.protection.outlook.com [52.101.125.142])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 3845D36C5BC;\n\tFri, 27 Mar 2026 03:54:30 +0000 (UTC)", "from TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10)\n by TY7P286MB7090.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:323::16) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9745.20; Fri, 27 Mar\n 2026 03:54:26 +0000", "from TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM\n ([fe80::2305:327c:28ec:9b32]) by TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM\n ([fe80::2305:327c:28ec:9b32%5]) with mapi id 15.20.9745.019; Fri, 27 Mar 2026\n 03:54:26 +0000" ], "ARC-Seal": [ "i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774583673; cv=fail;\n b=P9EpfArqxtyIP5bL1BQIs6ARvyfTn4vtSlHWGveF/SThssNTCtb4XVGoUCUt9QnT3tFgZiGY3Vwx+/GXgqQjhQGfN6ILJ3xZBMxSByMMFsFsttXgYVndQjOBpe/wFgpgi/nmEmVVBDVVmSRhCQP7mPGJhBhqokpu8RZkcxWgrrk=", "i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=teETyLYKLKBI6AiIEalzbmQ3gZ60SlF3JFnJTprJa0HavYuQ6BesCUpX8Ix9iLQaSWFzdDBpK7gZ+6LV5yEbuCyghDf0N6+dhjNKJfJeURsVbG4bewHzWWj4NGyCZMYOJlCceYUtbB1pqVOzZuco2nYEl5TCdXIDC36EHT/u00IRAwZu/YL3ph7j/+eZRHlKqxHRRnXgOslxUuDgTjTFe/AzYQA8x6h1wp3QKWOTqsOrzOYxsUB0PbR8lXOc0kam31fonHCQ6aouC/Eho6dcbJdOMmnC8mcHFxgmmCvzHxhDgVrZhoJ1iXblU+MK9WIwMhDMbWiCu7oApUo24mmV+w==" ], "ARC-Message-Signature": [ "i=2; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774583673; c=relaxed/simple;\n\tbh=7W7EAIrRY8jLga8ADH/lj9w0euD505H+9+XgdpG2QbQ=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t Content-Type:MIME-Version;\n b=dyiw9xdU2SkrSaWj7V3KNyiQjbsL/cjJqAKRsIiD9XGkro9g5VPKg+FNe6naj9IUnG2fuCiKYmg+8vIsMbRja5xUbSyy8lTLQTvYaplaEaxnGK9bWSzQx1cuX4JkBbd/SbbZFKhrIVAyCRIQvSnnlaG6vZKMuQ9Xo7c6q4CCmZM=", "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=EfCIC7CzZdwcLUlJhEa1n8/0yHBVwev+g2VgjAz+QQ8=;\n b=T5DsGmTIXQUBmcRtOMPhWUTHXCKR5q8eDVfiV/34FzUsbdKX/suN5q/jy/s6CYXDpwLny8AWyuXdp88+xK0BrAqGO3a9B8/YxgZmnzKeSzmQGwDtKobHPjLr+LSbTmiEBnE7nybSB5lNlI95Kr8rtzxqbkfzNrq749EiuphfQFGKqcDlyC2lu70Bzu0OiYM0zQ3UO/4se7rmc22B5cpat3x4/M/KGyGmWAlvYUH6Bz/cRi0GdAvZtA6WUUD3vftJBwnKNOVgXaNoDHIhleyLQJwDLc/mV/C3Va5+uGWlbULGrcEnipb0rW683byjO4M0VBch3J28GZ3bHTyWBvy5Ow==" ], "ARC-Authentication-Results": [ "i=2; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=valinux.co.jp;\n spf=pass smtp.mailfrom=valinux.co.jp;\n dkim=pass (1024-bit key) header.d=valinux.co.jp header.i=@valinux.co.jp\n header.b=Kvgu+wLd; arc=fail smtp.client-ip=52.101.125.142", "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=valinux.co.jp; dmarc=pass action=none\n header.from=valinux.co.jp; dkim=pass header.d=valinux.co.jp; arc=none" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=valinux.co.jp;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=EfCIC7CzZdwcLUlJhEa1n8/0yHBVwev+g2VgjAz+QQ8=;\n b=Kvgu+wLdkRyI6qilvvn0IXM1W3V9ftmUfRKHQiWBAnniH98ZwEAurpIVVdNzabDikeJeIrZ8+eA0ZRJTdWm9EXtKhin1r8gCNaJuvu2n6s9ieuo2uUyFI0t20E0j18pv/Y4XcIvDPWYjXDVWLt0zPRtrgWjcZlkd3WhtSRnZyG4=", "From": "Koichiro Den <den@valinux.co.jp>", "To": "Jingoo Han <jingoohan1@gmail.com>,\n Manivannan Sadhasivam <mani@kernel.org>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>,\n Kishon Vijay Abraham I <kishon@kernel.org>, Jon Mason <jdmason@kudzu.us>,\n Dave Jiang <dave.jiang@intel.com>, Allen Hubbe <allenbh@gmail.com>,\n Niklas Cassel <cassel@kernel.org>, Frank Li <Frank.Li@nxp.com>,\n Bhanu Seshu Kumar Valluri <bhanuseshukumar@gmail.com>,\n Marco Crivellari <marco.crivellari@suse.com>,\n Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com>,\n Manikanta Maddireddy <mmaddireddy@nvidia.com>", "Cc": "linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tntb@lists.linux.dev", "Subject": "[PATCH v12 2/7] PCI: dwc: Record integrated eDMA register window", "Date": "Fri, 27 Mar 2026 12:54:17 +0900", "Message-ID": "<20260327035422.4020455-3-den@valinux.co.jp>", "X-Mailer": "git-send-email 2.51.0", "In-Reply-To": "<20260327035422.4020455-1-den@valinux.co.jp>", "References": "<20260327035422.4020455-1-den@valinux.co.jp>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "TYWP286CA0019.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:400:262::6) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:405:38f::10)", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "TY7P286MB7722:EE_|TY7P286MB7090:EE_", "X-MS-Office365-Filtering-Correlation-Id": "29f5e902-0219-4e59-c13e-08de8bb48a7a", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|366016|1800799024|10070799003|376014|7416014|921020|18002099003|22082099003|56012099003;", "X-Microsoft-Antispam-Message-Info": "\n\ts2PWmoHP4pHMo2abkEXldGK+XNPqLmXjta8gBK+cXEEu2QCTkoa4O6UL2U3RQiiQpR13xBZ4RlGQyDXJkxfjhyevXNpAsrytkSEc4N7/hPJwZXFbvpJikEwhivu9csIgFPEwjgU6Id2O3NO12+GYWkxm56HixECb9eW5d4nsM2F5ZfwIHzhB8v2bJOdpboCE0uRXI+Ux1VoDk2SeU0IZi3FHZdOXelCysblg7+Ztr2JFt4UZ7MOy35HtR9bSr6xMYEVyx+8303vAd5zvwwrHOjrpKZm+0cH1kaZsj6pTdbn/td9WfSU3pC2WVoj1Ldq/vZr0AeMKg1vAugveYd7lWX3ZDHg8q2hiO8HXdAzYyRKb9Sj1ukqGdNM1idnLqg5T6LdRU1qr71gWOuIkgBR8HTb8r+wuqUq217YURZfOJ5fZoB6rMRrK8OuJCLyBDErJtE6JgoUtiAP3cfMEMhpu6e3xdG+p8+asADVz0+YuQ2BDCUjtcCKWZ7rwCEx2FGnrHh2hcnxoGdrVjXoxnCXq+w1qWTNobhkDVs4U1pBiWY+KdJaqejDutUQPtOOfM9Qns6ciIvecrp7XqFkC3RVCWfpQLrh53aHjM/WfbvMQ/ulwctu6WtrtUOJoSygB7mi785Tz93x5iNwTC9egP23yYdjkWqBfyKlzHUiwLoTj95d35m1FA7HO2EpWQj9n3DC5XqQNW3vtPwWthChOCIy8tvE56ISKyj3R81M0+k3m1oAH8GHjIU3LFrIbonuCkl1yHMfP1kRSY6Kfv2gIVhPKqQ==", "X-Forefront-Antispam-Report": "\n\tCIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(10070799003)(376014)(7416014)(921020)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1102;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n MGlMqALBgxHs1eEs8Gvr0HQldrT6ByfYHxqJAPRLe66wKEWuksd/iNHax6HgEECVz14ZudaPe9ZaI7kwjJFqwAtmZyDhVSiIClEHnrldNeh1Sz5OrkSBYbGlQzMP2u2QVlY3IjMz69ZMrgqq9VScpyh7xyckFp35IwJYIZA0pB1efru9bO2Aii4myYEo7Q8hce0CGwn5wSVGIQnV0g5jMB3nrPAZey1GkUPlR8VfApk5uYdvIcRAsnGGHjTjOeMdwiASE04kPFzi/t0a7woQlhr3b9JRYfBiejJLdQ1a87saoVQddv7XGpdLCM3BiHN+ZJ+sV7d4l25DdrlD+5QlU8xPrfKie6SLV9vuFE8vYWxGIgmaPbgsF8OHV0JCT4xMF5oUNykU1xQRToM9VpJKrqWK5vroUfHILsupmWOl3L8FFhq34M1ICZdZgf8rKjaAXoC0dHN64qUqcZjb8EcEGOzqsh8o+cZWePuSu6SOBWk7dHrYK8mVYWUJ9pvVXwvYz3orsRSzhoq0yI8f8IhXJH0dPudlyfxAFyOFjplDBO93IXS8eSRlyrgavEUDNF+AtTd5Sj40de1AUSI40GaB6clLvyP3jY/d2yrLJQpXvxitT3ZHstE/RRzcFxVTVjysgpW87MdSELHw2QAaooOdYeVEXp0WFMieiSv0kO+WV0Ng9kGFUL6fG2cNzSn+ZKsrnydKVYXJSX0edv06TiP0Hicy4E33GKIELIoJrhHA9Vj+HFCS+dU35gVy1xzzEKfq/RrWMVkl0tUhmXBDGp19TwT0AOoNfL1YGPaXi3DWw7gy3pqeU4YNt6KhvPvU7M+8raGyQvLO20j0m74daj36TcoWmAUN613MsDAyUX4pxSRIT85RreGa56/tp8sKwISjIgE08q3UK99w9xEoJWZVY5Ncssqie0OG1j7gGFRORJayLz4Xq6HMvKvaGQumhVfcl8rbngoNlPIhZh6Ai7GOKufszZXdMyWji18fdh35LHBQLPP4OYkp1RQXykJtn+yIAqUxQHq9/90R9fWvBzvLcir355anxWJ32oTBMDpQrZjZTYJlemDhHzDDGBW1Etk100gV94m9RxBp2jciN45tAUNGD6eK75CXsdFWfhFMfVWRnAvKV38QcZjw2yn6WyNrfqwSQ4jnDo4VBhuKDh0I6MyTYVt5qnVntJ5rzESCw3LS72O5rJVHIQiqw9OOHDkaHVZKZvz+/O4rAka91qDKEO264zkxMVPOmH5fZvOUNAO+iiukOuqTjS8uQUBQf2jV8jbGcOkavrZEQxP4KPLZSiN1HRmmJ2ju91CpQ+N7a6bw+XdMDZ5wuszZ+WmLwY4IHeWQPKj3B5IxfEpVMH3Ppby2F66n00P6P7SdAxsRQNG409XsGHmnrYR6QJJBpSK3m7wQAbeiOX7QEeLPHxkFiDcBRgpHze3bjJkadvPr1ash40cNr2eY2xG4yjEndwrZ/uua8WZriS3eDnmhD72nuYx055GQ6n9s4+NRjA/ydHDtt9rNNoqWRCLC6Q2paABbg7EujuEXv/faBCZIBJNHsEHuXCS0rnn36PpoBUACT/T1ybFudOUwAE7s5BWwiDUcby5WqZDvPMrcCBO/SNZ7nCQyr2p2rbAHOPw8If6gXiRR8qkmOzYXvE1z78f5CR/mmt6G6EovGpKXncQssWQdmkMeAltQQbI0n8fruIsDpk6oIQe/LgcjiiQ+njs5gjgRgxWfMEVX9dZwMGms5zJL7U7QZgPk/EMZgCtp0vkcRjqLyikEz7YfAy7i0S8Q3wqq", "X-OriginatorOrg": "valinux.co.jp", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 29f5e902-0219-4e59-c13e-08de8bb48a7a", "X-MS-Exchange-CrossTenant-AuthSource": "TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Mar 2026 03:54:26.7476\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "7a57bee8-f73d-4c5f-a4f7-d72c91c8c111", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n wY/MP4J6njkJIqg6tAfOn9yP/V3oZ8tlSYqa0Ih75vkrE2TY36KqEHYmKKSU9qUxv1ba+jgYaw6ndm0yzIcSUg==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "TY7P286MB7090" }, "content": "Some DesignWare PCIe controllers integrate an eDMA block whose registers\nare located in a dedicated register window.\n\nThe EP-side aux-resource code exposes an interrupt-emulation doorbell\nregister (DOORBELL_MMIO) from that window. Its location is derived from\nthe start of the eDMA register window plus the doorbell offset already\nprovided by dw-edma, and the window size is used to validate the\ncomputed register location.\n\nRecord the physical base and size of the integrated eDMA register window\nin struct dw_pcie so the EP-side DesignWare aux-resource provider can\nconstruct that doorbell resource.\n\nReviewed-by: Frank Li <Frank.Li@nxp.com>\nTested-by: Niklas Cassel <cassel@kernel.org>\nSigned-off-by: Koichiro Den <den@valinux.co.jp>\n---\n drivers/pci/controller/dwc/pcie-designware.c | 4 ++++\n drivers/pci/controller/dwc/pcie-designware.h | 2 ++\n 2 files changed, 6 insertions(+)", "diff": "diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c\nindex 5741c09dde7f..f82ed189f6ae 100644\n--- a/drivers/pci/controller/dwc/pcie-designware.c\n+++ b/drivers/pci/controller/dwc/pcie-designware.c\n@@ -162,8 +162,12 @@ int dw_pcie_get_resources(struct dw_pcie *pci)\n \t\t\tpci->edma.reg_base = devm_ioremap_resource(pci->dev, res);\n \t\t\tif (IS_ERR(pci->edma.reg_base))\n \t\t\t\treturn PTR_ERR(pci->edma.reg_base);\n+\t\t\tpci->edma_reg_phys = res->start;\n+\t\t\tpci->edma_reg_size = resource_size(res);\n \t\t} else if (pci->atu_size >= 2 * DEFAULT_DBI_DMA_OFFSET) {\n \t\t\tpci->edma.reg_base = pci->atu_base + DEFAULT_DBI_DMA_OFFSET;\n+\t\t\tpci->edma_reg_phys = pci->atu_phys_addr + DEFAULT_DBI_DMA_OFFSET;\n+\t\t\tpci->edma_reg_size = pci->atu_size - DEFAULT_DBI_DMA_OFFSET;\n \t\t}\n \t}\n \ndiff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h\nindex ae6389dd9caa..52f26663e8b1 100644\n--- a/drivers/pci/controller/dwc/pcie-designware.h\n+++ b/drivers/pci/controller/dwc/pcie-designware.h\n@@ -541,6 +541,8 @@ struct dw_pcie {\n \tint\t\t\tmax_link_speed;\n \tu8\t\t\tn_fts[2];\n \tstruct dw_edma_chip\tedma;\n+\tphys_addr_t\t\tedma_reg_phys;\n+\tresource_size_t\t\tedma_reg_size;\n \tbool\t\t\tl1ss_support;\t/* L1 PM Substates support */\n \tstruct clk_bulk_data\tapp_clks[DW_PCIE_NUM_APP_CLKS];\n \tstruct clk_bulk_data\tcore_clks[DW_PCIE_NUM_CORE_CLKS];\n", "prefixes": [ "v12", "2/7" ] }