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GET /api/patches/2216515/?format=api
{ "id": 2216515, "url": "http://patchwork.ozlabs.org/api/patches/2216515/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/patch/20260326-winbond-v6-18-rc1-cont-read-v2-8-643de97a68a3@bootlin.com/", "project": { "id": 3, "url": "http://patchwork.ozlabs.org/api/projects/3/?format=api", "name": "Linux MTD development", "link_name": "linux-mtd", "list_id": "linux-mtd.lists.infradead.org", "list_email": "linux-mtd@lists.infradead.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260326-winbond-v6-18-rc1-cont-read-v2-8-643de97a68a3@bootlin.com>", "list_archive_url": null, "date": "2026-03-26T16:25:55", "name": "[v2,08/11] mtd: spinand: winbond: Add support for continuous reads on W35NxxJW", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "294cf58b7c2b7d067beefabfec6db1f0bc8c0448", "submitter": { "id": 73368, "url": "http://patchwork.ozlabs.org/api/people/73368/?format=api", "name": "Miquel Raynal", "email": "miquel.raynal@bootlin.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-mtd/patch/20260326-winbond-v6-18-rc1-cont-read-v2-8-643de97a68a3@bootlin.com/mbox/", "series": [ { "id": 497619, "url": "http://patchwork.ozlabs.org/api/series/497619/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/list/?series=497619", "date": "2026-03-26T16:25:47", "name": "[v2,01/11] mtd: spinand: Drop a too strong limitation", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497619/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216515/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216515/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=ofhE6yEW;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=ISDYqAUz;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id\n\t:MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=WUw5cGD47T8zKxYhqCJBPc1ztPXviRTNXCB9cgY7QV4=; b=ofhE6yEWijkri6\n\tkytQk3eO2k6THOIAfIvrO+WdY4SxI+i0yJ31fgY10lcgAUpsnbosnpSIlUxvhL2n4uZE1LSiEC50o\n\tAX/lKXwa2SQ802B21QoilihQFL5FQYpoC4o13CLdlJZgPfxkMtvmi9V3jaq7A0ikGjVFRemTGWZJc\n\tAnrsxEbM7ybJTfACz9VUSdXVDPc3coRrxfhGhvGgjM6tD0CdBmoaTTQSBuSurUAXaAfPwp4fHWenY\n\t2fS46L8I8OYrb8Jce6gwKiyhbXq2Szuk70atBiFhC25ffCN8+s29Gfyyt/QdjgMdrMCvadpS8evFA\n\tmdeVfgYCGdd602/3t6Sg==;", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1774542377; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=PjiqCAer8dc/ymhlc49FengV+fEKdf1NUEYJuqvysio=;\n\tb=ISDYqAUzCXiSKEhOwaeLxZH24u8R+ua5npYysPiz5lqHCdowOZE/2+KsxVlaJ5Kgc5sSJm\n\t2bTIorlHLN9YtOWR1sVmtZ4NQ8lb2dxtMpIPyhNInWr0Z2cvpFfLENHRwMS00MyBNLM/6Z\n\tNjQ3zQ4aoYdV8yEtL/+Wk9Imb9EQZ1G79T+2RnZIwpz4yreFBpZL6TBjRjZykv96gamMZ1\n\tuJpOjJH4J9+9tDIDDbUs5QW3NoPL8GW8Si/OMM1DvgWk2q9DeOKIPMgzCBqXQrNk22eEkW\n\tGba1X5zZAsRv8+zsE2tjs+avLmrs8oD7axbGUz+03CHEfK9TdkBT8nu27EMNcw==" ], "From": "Miquel Raynal <miquel.raynal@bootlin.com>", "Date": "Thu, 26 Mar 2026 17:25:55 +0100", "Subject": "[PATCH v2 08/11] mtd: spinand: winbond: Add support for continuous\n reads on W35NxxJW", "MIME-Version": "1.0", "Message-Id": "\n <20260326-winbond-v6-18-rc1-cont-read-v2-8-643de97a68a3@bootlin.com>", "References": "\n <20260326-winbond-v6-18-rc1-cont-read-v2-0-643de97a68a3@bootlin.com>", "In-Reply-To": "\n <20260326-winbond-v6-18-rc1-cont-read-v2-0-643de97a68a3@bootlin.com>", "To": "Mark Brown <broonie@kernel.org>, Richard Weinberger <richard@nod.at>,\n Vignesh Raghavendra <vigneshr@ti.com>, Michael Walle <mwalle@kernel.org>,\n Miquel Raynal <miquel.raynal@bootlin.com>", "Cc": "Pratyush Yadav <pratyush@kernel.org>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Steam Lin <STLin2@winbond.com>, Santhosh Kumar K <s-k6@ti.com>,\n linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-mtd@lists.infradead.org", "X-Mailer": "b4 0.14.3", "X-Last-TLS-Session-Version": "TLSv1.3", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260326_092619_734878_518C2744 ", "X-CRM114-Status": "GOOD ( 20.33 )", "X-Spam-Score": "-2.1 (--)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: W35N{01,02,04}JW support being read continuously under\n certain\n circumstances. A bit must be set in their configuration register,\n and a specific\n read from cache operation, a bit shorter than usual beca [...]\n Content analysis details: (-2.1 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n 0.0 RCVD_IN_VALIDITY_RPBL_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to\n Validity was blocked. See\n https://knowledge.validity.com/hc/en-us/articles/20961730681243\n for more information.\n [185.171.202.116 listed in\n bl.score.senderscore.com]\n 0.0 RCVD_IN_VALIDITY_CERTIFIED_BLOCKED RBL: ADMINISTRATOR NOTICE: The\n query to Validity was blocked. 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See\n https://knowledge.validity.com/hc/en-us/articles/20961730681243\n for more information.\n [185.171.202.116 listed in\n sa-accredit.habeas.com]\n -0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]", "X-BeenThere": "linux-mtd@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "Linux MTD discussion mailing list <linux-mtd.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-mtd>,\n <mailto:linux-mtd-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-mtd/>", "List-Post": "<mailto:linux-mtd@lists.infradead.org>", "List-Help": "<mailto:linux-mtd-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-mtd>,\n <mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-mtd\" <linux-mtd-bounces@lists.infradead.org>", "Errors-To": "linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "W35N{01,02,04}JW support being read continuously under certain\ncircumstances. A bit must be set in their configuration register, and\na specific read from cache operation, a bit shorter than usual because\nit no longer requires the address cycles, must be used for the occasion.\n\nSetting the \"enable\" bit is already supported by the core, aside from\nthe subtlety of making sure the HFREQ bit is also set in octal DTR mode\nabove 90MHz. However, handling two different read from cache templates\ninvolves creating a list of read from cache variants adapted the\ncontinuous reads, ie. without address cycles.\n\nUnfortunately, these operations, despite being very close to their\noriginal read from cache cousins, are often unsupported by smart SPI\ncontroller drivers because reading from cache historically allowed\nchanging the offset at which the host would start by providing a 2-byte\ncolumn address. In order to prevent issues with this, it has been\ndecided to implement these variants with a single \"ignored\" address byte\n(respectively two in the octal DTR case), further reducing the amount of\ndummy cycles needed before the first bit of data.\n\nEnabling continuous reads has a side effect: the ECC status register now\nmay also return the value b11, which means that more than 1\nuncorrectable error happened during the read. This non standard\nbehaviour requires to re-implement, almost identically the \"get ECC\"\nhelper from the core, with just an extra case for this value (it is\nprefixed \"w25w35nxxjw\" because all these chips have the same behaviour).\n\nSpeed gain is substantial, see below. The flash_speed -C benchmark has\nbeen run on a TI AM62A7 LP SK with CPU power management disabled,\nmounted with a W35N01JW chip.\n\n1S-8S-8S:\n\n 1 page read speed is 15058 KiB/s\n 2 page read speed is 15058 KiB/s\n 3 page read speed is 16800 KiB/s\n 4 page read speed is 17066 KiB/s\n 5 page read speed is 18461 KiB/s\n 6 page read speed is 18461 KiB/s\n 7 page read speed is 19384 KiB/s\n 8 page read speed is 19692 KiB/s\n 9 page read speed is 19384 KiB/s\n 10 page read speed is 20000 KiB/s\n 11 page read speed is 20000 KiB/s\n 12 page read speed is 20000 KiB/s\n 13 page read speed is 20800 KiB/s\n 14 page read speed is 20363 KiB/s\n 15 page read speed is 20000 KiB/s\n 16 page read speed is 19692 KiB/s\n 32 page read speed is 19692 KiB/s\n 64 page read speed is 19692 KiB/s\n\n8D-8D-8D:\n\n 1 page read speed is 23272 KiB/s\n 2 page read speed is 23272 KiB/s\n 3 page read speed is 28000 KiB/s\n 4 page read speed is 32000 KiB/s\n 5 page read speed is 34285 KiB/s\n 6 page read speed is 34285 KiB/s\n 7 page read speed is 36000 KiB/s\n 8 page read speed is 36571 KiB/s\n 9 page read speed is 36000 KiB/s\n 10 page read speed is 34285 KiB/s\n 11 page read speed is 36666 KiB/s\n 12 page read speed is 40000 KiB/s\n 13 page read speed is 41600 KiB/s\n 14 page read speed is 37333 KiB/s\n 15 page read speed is 40000 KiB/s\n 16 page read speed is 36571 KiB/s\n 32 page read speed is 42666 KiB/s\n 64 page read speed is 42666 KiB/s\n\nSigned-off-by: Miquel Raynal <miquel.raynal@bootlin.com>\n---\nNot all configurations have been tested/validated yet.\n---\n drivers/mtd/nand/spi/winbond.c | 126 ++++++++++++++++++++++++++++++++++++-----\n 1 file changed, 111 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c\nindex f4d4ffaa1f62..6c11f59a9f8d 100644\n--- a/drivers/mtd/nand/spi/winbond.c\n+++ b/drivers/mtd/nand/spi/winbond.c\n@@ -15,9 +15,11 @@\n \n #define SPINAND_MFR_WINBOND\t\t0xEF\n \n+#define WINBOND_CFG_HFREQ\t\tBIT(0)\n #define WINBOND_CFG_BUF_READ\t\tBIT(3)\n \n #define W25N04KV_STATUS_ECC_5_8_BITFLIPS\t(3 << 4)\n+#define W25W35NXXJW_STATUS_ECC_MULT_UNCOR\t(3 << 4)\n \n #define W25N0XJW_SR4\t\t\t0xD0\n #define W25N0XJW_SR4_HS\t\t\tBIT(2)\n@@ -29,6 +31,49 @@\n #define W35N01JW_VCR_IO_MODE_OCTAL_DDR\t\t0xC7\n #define W35N01JW_VCR_DUMMY_CLOCK_REG\t0x01\n \n+/*\n+ * Winbond chips ignore the address bytes during continuous reads, and\n+ * because the dummy cycles are enough they indicate dropping the\n+ * address cycles from the continuous read from cache variants. This is\n+ * very poorly supported by SPI controller drivers which are \"wired\" to\n+ * always at least provide the column. Keep using address cycles, but\n+ * reduce the number of dummy cycles accordingly.\n+ */\n+#define WINBOND_CONT_READ_FROM_CACHE_FAST_1S_1S_1S_OP(ndummy, buf, len, freq) \\\n+\tSPI_MEM_OP(SPI_MEM_OP_CMD(0x0b, 1),\t\t\t\t\\\n+\t\t SPI_MEM_OP_ADDR(1, 0, 1),\t\t\t\t\\\n+\t\t SPI_MEM_OP_DUMMY(ndummy - 1, 1),\t\t\t\\\n+\t\t SPI_MEM_OP_DATA_IN(len, buf, 1),\t\t\t\\\n+\t\t SPI_MEM_OP_MAX_FREQ(freq))\n+\n+#define WINBOND_CONT_READ_FROM_CACHE_1S_1S_8S_OP(ndummy, buf, len, freq) \\\n+\tSPI_MEM_OP(SPI_MEM_OP_CMD(0x8b, 1),\t\t\t\t\\\n+\t\t SPI_MEM_OP_ADDR(1, 0, 1),\t\t\t\t\\\n+\t\t SPI_MEM_OP_DUMMY(ndummy - 1, 1),\t\t\t\\\n+\t\t SPI_MEM_OP_DATA_IN(len, buf, 8),\t\t\t\\\n+\t\t SPI_MEM_OP_MAX_FREQ(freq))\n+\n+#define WINBOND_CONT_READ_FROM_CACHE_1S_1D_8D_OP(ndummy, buf, len, freq) \\\n+\tSPI_MEM_OP(SPI_MEM_OP_CMD(0x9d, 1),\t\t\t\t\\\n+\t\t SPI_MEM_DTR_OP_ADDR(1, 0, 1),\t\t\t\\\n+\t\t SPI_MEM_DTR_OP_DUMMY(ndummy - 1, 1),\t\t\t\\\n+\t\t SPI_MEM_DTR_OP_DATA_IN(len, buf, 8),\t\t\t\\\n+\t\t SPI_MEM_OP_MAX_FREQ(freq))\n+\n+#define WINBOND_CONT_READ_FROM_CACHE_1S_8S_8S_OP(ndummy, buf, len, freq) \\\n+\tSPI_MEM_OP(SPI_MEM_OP_CMD(0xcb, 1),\t\t\t\t\\\n+\t\t SPI_MEM_OP_ADDR(1, 0, 8),\t\t\t\t\\\n+\t\t SPI_MEM_OP_DUMMY(ndummy - 1, 8),\t\t\t\\\n+\t\t SPI_MEM_OP_DATA_IN(len, buf, 8),\t\t\t\\\n+\t\t SPI_MEM_OP_MAX_FREQ(freq))\n+\n+#define WINBOND_CONT_READ_FROM_CACHE_8D_8D_8D_OP(ndummy, buf, len, freq) \\\n+\tSPI_MEM_OP(SPI_MEM_DTR_OP_RPT_CMD(0x9d, 8),\t\t\t\\\n+\t\t SPI_MEM_DTR_OP_ADDR(2, 0, 8),\t\t\t\\\n+\t\t SPI_MEM_DTR_OP_DUMMY(ndummy - 2, 8),\t\t\t\\\n+\t\t SPI_MEM_DTR_OP_DATA_IN(len, buf, 8),\t\t\t\\\n+\t\t SPI_MEM_OP_MAX_FREQ(freq))\n+\n /*\n * \"X2\" in the core is equivalent to \"dual output\" in the datasheets,\n * \"X4\" in the core is equivalent to \"quad output\" in the datasheets.\n@@ -49,6 +94,19 @@ static SPINAND_OP_VARIANTS(read_cache_octal_variants,\n \t\tSPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),\n \t\tSPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));\n \n+static SPINAND_OP_VARIANTS(cont_read_cache_octal_variants,\n+\t\tWINBOND_CONT_READ_FROM_CACHE_8D_8D_8D_OP(24, NULL, 0, 120 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_8D_8D_8D_OP(16, NULL, 0, 86 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_1D_8D_OP(3, NULL, 0, 120 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_1D_8D_OP(2, NULL, 0, 105 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_8S_8S_OP(20, NULL, 0, 0),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_8S_8S_OP(16, NULL, 0, 162 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_8S_8S_OP(12, NULL, 0, 124 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_8S_8S_OP(8, NULL, 0, 86 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_1S_8S_OP(2, NULL, 0, 0),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_1S_1S_8S_OP(1, NULL, 0, 133 * HZ_PER_MHZ),\n+\t\tWINBOND_CONT_READ_FROM_CACHE_FAST_1S_1S_1S_OP(1, NULL, 0, 0));\n+\n static SPINAND_OP_VARIANTS(write_cache_octal_variants,\n \t\tSPINAND_PROG_LOAD_8D_8D_8D_OP(true, 0, NULL, 0),\n \t\tSPINAND_PROG_LOAD_1S_8S_8S_OP(true, 0, NULL, 0),\n@@ -326,6 +384,26 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand,\n \treturn -EINVAL;\n }\n \n+static int w25w35nxxjw_ecc_get_status(struct spinand_device *spinand, u8 status)\n+{\n+\tswitch (status & STATUS_ECC_MASK) {\n+\tcase STATUS_ECC_NO_BITFLIPS:\n+\t\treturn 0;\n+\n+\tcase STATUS_ECC_HAS_BITFLIPS:\n+\t\treturn 1;\n+\n+\tcase STATUS_ECC_UNCOR_ERROR:\n+\tcase W25W35NXXJW_STATUS_ECC_MULT_UNCOR:\n+\t\treturn -EBADMSG;\n+\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\treturn -EINVAL;\n+}\n+\n static int w25n0xjw_hs_cfg(struct spinand_device *spinand,\n \t\t\t enum spinand_bus_interface iface)\n {\n@@ -451,6 +529,18 @@ static int w35n0xjw_vcr_cfg(struct spinand_device *spinand,\n \treturn 0;\n }\n \n+static int w35n0xjw_set_cont_read(struct spinand_device *spinand, bool enable)\n+{\n+\tconst struct spi_mem_op *cont_op = spinand->op_templates->cont_read_cache;\n+\tu8 mask = enable ? 0 : WINBOND_CFG_BUF_READ;\n+\n+\tif (cont_op && enable && spinand_op_is_odtr(cont_op) &&\n+\t cont_op->max_freq >= 90 * HZ_PER_MHZ)\n+\t\tmask |= WINBOND_CFG_HFREQ;\n+\n+\treturn spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ | WINBOND_CFG_HFREQ, mask);\n+}\n+\n static const struct spinand_info winbond_spinand_table[] = {\n \t/* 512M-bit densities */\n \tSPINAND_INFO(\"W25N512GW\", /* 1.8V */\n@@ -504,13 +594,15 @@ static const struct spinand_info winbond_spinand_table[] = {\n \t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdc, 0x21),\n \t\t NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 1, 1),\n \t\t NAND_ECCREQ(1, 512),\n-\t\t SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,\n-\t\t\t\t\t &write_cache_octal_variants,\n-\t\t\t\t\t &update_cache_octal_variants),\n+\t\t SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_octal_variants,\n+\t\t\t\t\t\t\t&write_cache_octal_variants,\n+\t\t\t\t\t\t\t&update_cache_octal_variants,\n+\t\t\t\t\t\t\t&cont_read_cache_octal_variants),\n \t\t 0,\n \t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n-\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n-\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n+\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, w25w35nxxjw_ecc_get_status),\n+\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg),\n+\t\t SPINAND_CONT_READ(w35n0xjw_set_cont_read)),\n \t/* 2G-bit densities */\n \tSPINAND_INFO(\"W25M02GV\", /* 2x1G-bit 3.3V */\n \t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),\n@@ -555,13 +647,15 @@ static const struct spinand_info winbond_spinand_table[] = {\n \t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),\n \t\t NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),\n \t\t NAND_ECCREQ(1, 512),\n-\t\t SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,\n-\t\t\t\t\t &write_cache_octal_variants,\n-\t\t\t\t\t &update_cache_octal_variants),\n+\t\t SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_octal_variants,\n+\t\t\t\t\t\t\t&write_cache_octal_variants,\n+\t\t\t\t\t\t\t&update_cache_octal_variants,\n+\t\t\t\t\t\t\t&cont_read_cache_octal_variants),\n \t\t 0,\n \t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n-\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n-\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n+\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, w25w35nxxjw_ecc_get_status),\n+\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg),\n+\t\t SPINAND_CONT_READ(w35n0xjw_set_cont_read)),\n \t/* 4G-bit densities */\n \tSPINAND_INFO(\"W25N04KV\", /* 3.3V */\n \t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23),\n@@ -585,13 +679,15 @@ static const struct spinand_info winbond_spinand_table[] = {\n \t\t SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),\n \t\t NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),\n \t\t NAND_ECCREQ(1, 512),\n-\t\t SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,\n-\t\t\t\t\t &write_cache_octal_variants,\n-\t\t\t\t\t &update_cache_octal_variants),\n+\t\t SPINAND_INFO_OP_VARIANTS_WITH_CONT(&read_cache_octal_variants,\n+\t\t\t\t\t\t\t&write_cache_octal_variants,\n+\t\t\t\t\t\t\t&update_cache_octal_variants,\n+\t\t\t\t\t\t\t&cont_read_cache_octal_variants),\n \t\t 0,\n \t\t SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),\n-\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),\n-\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),\n+\t\t SPINAND_ECCINFO(&w35n01jw_ooblayout, w25w35nxxjw_ecc_get_status),\n+\t\t SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg),\n+\t\t SPINAND_CONT_READ(w35n0xjw_set_cont_read)),\n };\n \n static int winbond_spinand_init(struct spinand_device *spinand)\n", "prefixes": [ "v2", "08/11" ] }