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GET /api/patches/2216382/?format=api
{ "id": 2216382, "url": "http://patchwork.ozlabs.org/api/patches/2216382/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260326110948.68908-4-akhilrajeev@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260326110948.68908-4-akhilrajeev@nvidia.com>", "list_archive_url": null, "date": "2026-03-26T11:09:40", "name": "[v4,03/10] dt-bindings: dma: nvidia,tegra186-gpc-dma: Add iommu-map property", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "c26c960e3a1dcbbd5266ea64a0287c6f8f61f66d", "submitter": { "id": 81965, "url": "http://patchwork.ozlabs.org/api/people/81965/?format=api", "name": "Akhil R", "email": "akhilrajeev@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260326110948.68908-4-akhilrajeev@nvidia.com/mbox/", "series": [ { "id": 497568, "url": "http://patchwork.ozlabs.org/api/series/497568/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=497568", "date": "2026-03-26T11:09:37", "name": "Add GPCDMA support in Tegra264", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/497568/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216382/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216382/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-tegra+bounces-13286-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=fVqMW1Is;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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pr=C", "From": "Akhil R <akhilrajeev@nvidia.com>", "To": "Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>, Rob Herring\n\t<robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley\n\t<conor+dt@kernel.org>, Thierry Reding <thierry.reding@gmail.com>, \"Jonathan\n Hunter\" <jonathanh@nvidia.com>, Laxman Dewangan <ldewangan@nvidia.com>,\n\tPhilipp Zabel <p.zabel@pengutronix.de>, <dmaengine@vger.kernel.org>,\n\t<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>", "CC": "Akhil R <akhilrajeev@nvidia.com>", "Subject": "[PATCH v4 03/10] dt-bindings: dma: nvidia,tegra186-gpc-dma: Add\n iommu-map property", "Date": "Thu, 26 Mar 2026 16:39:40 +0530", "Message-ID": "<20260326110948.68908-4-akhilrajeev@nvidia.com>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260326110948.68908-1-akhilrajeev@nvidia.com>", "References": "<20260326110948.68908-1-akhilrajeev@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-NVConfidentiality": "public", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SN1PEPF000397B1:EE_|CY3PR12MB9553:EE_", "X-MS-Office365-Filtering-Correlation-Id": "aee0b708-3fe6-4dfa-fa82-08de8b285833", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700016|921020|56012099003|18002099003|22082099003;", "X-Microsoft-Antispam-Message-Info": "\n\tP8g9594WkJBnCLDvXBffAcY/OnBLabIMZUCk0CJ4yh6LM0As320P3T8Oa1ccpwLja6HVlVhIRpxgILFeE5m2BVWvlwONguY72YHi2pbNU/ZEZ2sbrl++2o2uQ23D0z5+Yvmnly70YT7hm/qzLFFw8xgx6dSe2ideMSEuAhhT5PzsmXexFA50wBOCugc5FpbhDdcSDc29Tfdl7GjHElb44vjbd5VZ8tb9Lsf6SxxA6mHY/hUw3NclZuPH8dIvOXv/y0eNwUTaQOsPEjtfkxc0KvA0rkw0lwh9cfggkXSTF1CifkJJ+Ink3VAXmAH35TJKd3NXQvcazGtD+OpfGcukFRSRBqeMH9X0qA8F4Fddj8Q6DFHcXL2ZWrPdQj7f6h71qAD88lOFJd71fX7ihvj4ovhp9xrvzPaqFBj/VaQvU8zVNt/BeDnaEFzl3c9RwsMGuqC0Q8ynJbcU+xVshC/6RkhRvMCkJdZ+smkzqvEHfJr52GKeJ/qboOJzUqMBedyBWuPi2g8ub6Zn3QUGWx3K27SqvtEdm7mi6qkuPEkud8YjucGgHStD6WcZOrCtpW4qCB3gdSnev2JoM8bXxI24PSvv4IugBBIoHvrR7JzBhZ8lZ8vegzti0/3ir+dJ2xBNvBjgW4ANt/Bt/IBJFP81/nqOxHl1laLxeZIr1kPQGJRxENqxkkWVY7tQwiQt6LDTJijAs337Xap3G1LUOOw3TV7rOcp1OSdYG3ANXr7k7XaqfW9QZdpw16ALxuj6ZgRXMH2e3H+UhSniLK+mP/wEYGVc/1yNdjhphCUPdI1qz4wYchZT4RD/ENvs95smB6pl", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(7416014)(36860700016)(921020)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\t2Ou7slZcE9hqpoEbFzAhGeL8332nc5c0vx++XQEFLXeMRWosTt8hEWSjpj0LM/iTv6D+JS5hj6LoM++owGCWNYjrMFDPy338CSIe4ySFLdwMMMOquTRskClrqSMsu4uMvuqcz4kzrCvoCv3mjqF7EEbsVPBarfomMe+wwCDPKM8XusQNorgKLnQg+2CU5QsOhLQ9PR/GmPEygTtJjGlLH5KtQExTXft4JHsmJ0XO6edn0UpvX5I1LKF6CcTmn/g5CFZv6sDYrtZdNdy/iSCWRMxvnTPP2jAlukZBiXEclnPE2rwHIDsXmGd/oUMwMekFB4MebBeEK4RLYPomj41ViwWmDweWLK4a3fOKcHyKEQvOcW7Y2ft4oLXKGqJidklDwJAIuXuV7rBAT1/27LfYRyuxlUB5yRQzP9fME50zqbPX4FjGmyL9epT87bxDyoPI", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "26 Mar 2026 11:10:52.6882\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n aee0b708-3fe6-4dfa-fa82-08de8b285833", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tSN1PEPF000397B1.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY3PR12MB9553" }, "content": "Add iommu-map property to specify separate stream IDs for each DMA\nchannel. This enables each channel to be in its own IOMMU domain,\nkeeping memory isolated from other devices sharing the same DMA\ncontroller.\n\nDefine the constraints such that if the channel and stream IDs are\ncontiguous, a single entry can map all the channels, but if the\nchannels or stream IDs are non-contiguous support multiple entries.\n\nSigned-off-by: Akhil R <akhilrajeev@nvidia.com>\nAcked-by: Rob Herring (Arm) <robh@kernel.org>\n---\n .../devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml | 9 +++++++++\n 1 file changed, 9 insertions(+)", "diff": "diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml\nindex 9f9f1a30e139..b849d4cc2901 100644\n--- a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml\n+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml\n@@ -14,6 +14,7 @@ description: |\n maintainers:\n - Jon Hunter <jonathanh@nvidia.com>\n - Rajesh Gumasta <rgumasta@nvidia.com>\n+ - Akhil R <akhilrajeev@nvidia.com>\n \n properties:\n compatible:\n@@ -49,6 +50,14 @@ properties:\n iommus:\n maxItems: 1\n \n+ iommu-map:\n+ description:\n+ Maps DMA channel numbers to IOMMU stream IDs. A single entry can map all\n+ channels when stream IDs are contiguous. In systems where the channels or\n+ stream IDs are not contiguous, multiple entries may be needed.\n+ minItems: 1\n+ maxItems: 32\n+\n dma-coherent: true\n \n dma-channel-mask:\n", "prefixes": [ "v4", "03/10" ] }