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GET /api/patches/2216276/?format=api
{ "id": 2216276, "url": "http://patchwork.ozlabs.org/api/patches/2216276/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260326091130.321483-13-zhenzhong.duan@intel.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260326091130.321483-13-zhenzhong.duan@intel.com>", "list_archive_url": null, "date": "2026-03-26T09:11:26", "name": "[v2,12/14] intel_iommu_accel: drop _lock suffix in vtd_flush_host_piotlb_all_locked()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "294bdb33ad8305695b83ecd2b3527382baf9576b", "submitter": { "id": 81636, "url": "http://patchwork.ozlabs.org/api/people/81636/?format=api", "name": "Duan, Zhenzhong", "email": "zhenzhong.duan@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260326091130.321483-13-zhenzhong.duan@intel.com/mbox/", "series": [ { "id": 497556, "url": "http://patchwork.ozlabs.org/api/series/497556/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497556", "date": "2026-03-26T09:11:19", "name": "intel_iommu: Enable PASID support for passthrough device", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/497556/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216276/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216276/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=do1b7vf0;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fhJ3F5yvlz1yGL\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 26 Mar 2026 20:13:13 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w5glU-0002qR-M2; Thu, 26 Mar 2026 05:12:32 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w5glS-0002pc-DZ\n for qemu-devel@nongnu.org; Thu, 26 Mar 2026 05:12:30 -0400", "from mgamail.intel.com ([198.175.65.17])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1w5glQ-0003yp-RA\n for qemu-devel@nongnu.org; Thu, 26 Mar 2026 05:12:30 -0400", "from fmviesa001.fm.intel.com ([10.60.135.141])\n by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Mar 2026 02:12:28 -0700", "from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Mar 2026 02:12:24 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1774516349; x=1806052349;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=tnftdlkpoH30eEumfqQOcuwlVOaGBFj8IO2veHSBS/8=;\n b=do1b7vf0TbseMErHerqtioEyHZdngjl31vplcLhStzrZTxYHDEHDGZmO\n VWZYj5KWnzOJHDonpMwa/eH86XQprhli1PMBgxu1NSKwQjmPXZS6cYya+\n c5DlXA3Y6pw/g9z0nxiCP+a8xEGfb+gs/1rFfqnrq2v/9AdxhVDJhUAP4\n dqnFpA5PoFLpZvCyls3ZlnEUMvNpU7WvUWE3BWxnepQ+HOAMCPNT1jJHt\n 5HaSXWfuZVyFUARGmPImJYdHTfjGL1MtkPKhGs+Kd+2QCTv88yt5SA/lL\n rGt3HSBKMk1YtFo4AatemCz+klOXLTNr3jYHUf2wvf7hjR/doEnMtzFJF A==;", "X-CSE-ConnectionGUID": [ "HJg0RV0FScGhJaXKvjAnNg==", "LIMLcM28SRyijIPux5dZmQ==" ], "X-CSE-MsgGUID": [ "8pMiXrOtQAKtbFzlPp3aLg==", "0tyhCUuWQm2ws5ekpLf69A==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11740\"; a=\"75531395\"", "E=Sophos;i=\"6.23,141,1770624000\"; d=\"scan'208\";a=\"75531395\"", "E=Sophos;i=\"6.23,141,1770624000\"; d=\"scan'208\";a=\"248368609\"" ], "X-ExtLoop1": "1", "From": "Zhenzhong Duan <zhenzhong.duan@intel.com>", "To": "qemu-devel@nongnu.org", "Cc": "alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com>", "Subject": "[PATCH v2 12/14] intel_iommu_accel: drop _lock suffix in\n vtd_flush_host_piotlb_all_locked()", "Date": "Thu, 26 Mar 2026 05:11:26 -0400", "Message-ID": "<20260326091130.321483-13-zhenzhong.duan@intel.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260326091130.321483-1-zhenzhong.duan@intel.com>", "References": "<20260326091130.321483-1-zhenzhong.duan@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=198.175.65.17;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com", "X-Spam_score_int": "-43", "X-Spam_score": "-4.4", "X-Spam_bar": "----", "X-Spam_report": "(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "In order to support PASID, we have switched from looping vtd_as to vtd_hiod,\nvtd_hiod represents host passthrough device and never deferenced without BQL.\nSo we don't need extra iommu lock to protect it.\n\nSigned-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\n---\n hw/i386/intel_iommu_accel.h | 14 +++++++-------\n hw/i386/intel_iommu.c | 7 ++++---\n hw/i386/intel_iommu_accel.c | 6 +++---\n 3 files changed, 14 insertions(+), 13 deletions(-)", "diff": "diff --git a/hw/i386/intel_iommu_accel.h b/hw/i386/intel_iommu_accel.h\nindex c72856a8ff..45a12e0292 100644\n--- a/hw/i386/intel_iommu_accel.h\n+++ b/hw/i386/intel_iommu_accel.h\n@@ -24,9 +24,9 @@ typedef struct VTDAccelPASIDCacheEntry {\n bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod,\n Error **errp);\n VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as);\n-void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,\n- uint32_t pasid, hwaddr addr,\n- uint64_t npages, bool ih);\n+void vtd_flush_host_piotlb_all_accel(IntelIOMMUState *s, uint16_t domain_id,\n+ uint32_t pasid, hwaddr addr,\n+ uint64_t npages, bool ih);\n void vtd_pasid_cache_sync_accel(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info);\n void vtd_pasid_cache_reset_accel(IntelIOMMUState *s);\n void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops);\n@@ -51,10 +51,10 @@ static inline bool vtd_propagate_guest_pasid(VTDAddressSpace *vtd_as,\n return true;\n }\n \n-static inline void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s,\n- uint16_t domain_id,\n- uint32_t pasid, hwaddr addr,\n- uint64_t npages, bool ih)\n+static inline void vtd_flush_host_piotlb_all_accel(IntelIOMMUState *s,\n+ uint16_t domain_id,\n+ uint32_t pasid, hwaddr addr,\n+ uint64_t npages, bool ih)\n {\n }\n \ndiff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c\nindex f53642a611..5d0184fa0d 100644\n--- a/hw/i386/intel_iommu.c\n+++ b/hw/i386/intel_iommu.c\n@@ -3011,11 +3011,11 @@ static void vtd_piotlb_pasid_invalidate(IntelIOMMUState *s,\n info.domain_id = domain_id;\n info.pasid = pasid;\n \n+ vtd_flush_host_piotlb_all_accel(s, domain_id, pasid, 0, (uint64_t)-1,\n+ false);\n vtd_iommu_lock(s);\n g_hash_table_foreach_remove(s->iotlb, vtd_hash_remove_by_pasid,\n &info);\n- vtd_flush_host_piotlb_all_locked(s, domain_id, pasid, 0, (uint64_t)-1,\n- false);\n vtd_iommu_unlock(s);\n \n QLIST_FOREACH(vtd_as, &s->vtd_as_with_notifiers, next) {\n@@ -3045,10 +3045,11 @@ static void vtd_piotlb_page_invalidate(IntelIOMMUState *s, uint16_t domain_id,\n info.addr = addr;\n info.mask = ~((1 << am) - 1);\n \n+ vtd_flush_host_piotlb_all_accel(s, domain_id, pasid, addr, 1 << am, ih);\n+\n vtd_iommu_lock(s);\n g_hash_table_foreach_remove(s->iotlb,\n vtd_hash_remove_by_page_piotlb, &info);\n- vtd_flush_host_piotlb_all_locked(s, domain_id, pasid, addr, 1 << am, ih);\n vtd_iommu_unlock(s);\n \n vtd_iotlb_page_invalidate_notify(s, domain_id, addr, am, pasid);\ndiff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex 26543489fb..2fd26690b9 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -231,9 +231,9 @@ static void vtd_flush_host_piotlb(VTDAccelPASIDCacheEntry *vtd_pce,\n }\n }\n \n-void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,\n- uint32_t pasid, hwaddr addr,\n- uint64_t npages, bool ih)\n+void vtd_flush_host_piotlb_all_accel(IntelIOMMUState *s, uint16_t domain_id,\n+ uint32_t pasid, hwaddr addr,\n+ uint64_t npages, bool ih)\n {\n struct iommu_hwpt_vtd_s1_invalidate cache_info = { 0 };\n VTDPIOTLBInvInfo piotlb_info;\n", "prefixes": [ "v2", "12/14" ] }