Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2216124/?format=api
{ "id": 2216124, "url": "http://patchwork.ozlabs.org/api/patches/2216124/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260325211728.89204-11-philmd@linaro.org/", "project": { "id": 69, "url": "http://patchwork.ozlabs.org/api/projects/69/?format=api", "name": "QEMU powerpc development", "link_name": "qemu-ppc", "list_id": "qemu-ppc.nongnu.org", "list_email": "qemu-ppc@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325211728.89204-11-philmd@linaro.org>", "list_archive_url": null, "date": "2026-03-25T21:17:28", "name": "[PATCH-for-11.1,10/10] migration: Restrict legacy VMSTATE_UINTTL() macros to few targets", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "711b3ea89bf1df8d08ebb3b300cd812407fddbc9", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260325211728.89204-11-philmd@linaro.org/mbox/", "series": [ { "id": 497511, "url": "http://patchwork.ozlabs.org/api/series/497511/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-ppc/list/?series=497511", "date": "2026-03-25T21:17:18", "name": "migration: Reduce uses of target-specific macros", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497511/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216124/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216124/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=NscsU5NC;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fh0DG3LXjz1y1G\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 26 Mar 2026 08:19:58 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-ppc-bounces@nongnu.org>)\n\tid 1w5Vcp-0001wH-SH; Wed, 25 Mar 2026 17:18:51 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <philmd@linaro.org>) id 1w5Vck-0001pP-GI\n for qemu-ppc@nongnu.org; Wed, 25 Mar 2026 17:18:47 -0400", "from mail-wr1-x433.google.com ([2a00:1450:4864:20::433])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <philmd@linaro.org>) id 1w5Vch-00021l-QK\n for qemu-ppc@nongnu.org; Wed, 25 Mar 2026 17:18:46 -0400", "by mail-wr1-x433.google.com with SMTP id\n ffacd0b85a97d-43b41b545d9so239812f8f.2\n for <qemu-ppc@nongnu.org>; Wed, 25 Mar 2026 14:18:43 -0700 (PDT)", "from localhost.localdomain (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n ffacd0b85a97d-43b9192e352sm2748535f8f.3.2026.03.25.14.18.40\n (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256);\n Wed, 25 Mar 2026 14:18:41 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1774473522; x=1775078322; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=ELyG3CPRX3HGPrR46En7QqMJTEd390KuOAkz1dhhPqI=;\n b=NscsU5NC3OBZxW/SfQ4LW2L2k/P53CUe+2beyP/bSdjDieYvZJE5iAeWcthM2nBqyN\n 1hm4VfYYBDrQV6bAlgvGZJGkHO+lYAxTwsVTz9+bU7vCY1QebVHiy1IGAu9w3G17/XLy\n DbB27Qz61X4SM0/7sq86Kp3fnuEqR2yI4kHoD9OX8Lhdry717PZn14oQGcGxXl6iuEfF\n SwloXSk2udz+6ZfbrHgmvZa/Y8TvmIaNX0hPqRaudo9MaaL/gui+H+8TgmHo4STW3I0E\n dDZiOCSkra+CYO2gjmDNdKvaCbyI/A8QbeDsVIyPPsR9H242xCN9j/0fhICfwh553CjR\n psQA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1774473522; x=1775078322;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=ELyG3CPRX3HGPrR46En7QqMJTEd390KuOAkz1dhhPqI=;\n b=PTMC5NF2NSfC62sNO7jKpjOLqcFMOuWHIZmw/WixYndwQsUG3mOxtuanEH99Q5j8Hk\n L3KeyJMTWJuauSK8kDwr7CAIK9e96bJhm6hqXBF9fB+Mp+Cigm+lei/dRrz7Trp9CROq\n n7LaAlJEboBVW1cTd3/0Ga/66A3vWiZ2SxM2hkXK6TCDyL7zkInuJ9bqmXO2xCHtsj33\n jPVUJTz50cZZTQVZYk2iBPA/aYi1Uky3lrc8QA6VWoTkKYlfavIKsuMKjLLr6cDZkA0x\n /mf/OQXHgrvyJcGpwM7jDKmTAAexQwpxyBUdK9SCNALGUFHh/JnPeyOBDryPA/GDxz6+\n XhAQ==", "X-Forwarded-Encrypted": "i=1;\n AJvYcCXW47pZ1LfM0H+NjZLOyTxfVYneLO3qhe9cA2gnbqYMlyEgW4s5e1rbMXVtX9SOHZEVOiz+/xh+CA==@nongnu.org", "X-Gm-Message-State": "AOJu0YzzorrNVcxSiMIbxeSkBOS2Te8dRQaGvCs9uTtGAPi5FWn8Ihfk\n WjHB8OeG8/dBenXkZ9pL6WwroIjn4wks2gdFJkJEC7z8hzxADw8nBWqstMrSe2RM93Y=", "X-Gm-Gg": "ATEYQzx5O+zMtA09ukUCcypwDlujH2OEwXOPT0TfX5jMBRX0GWkmYF5Qdd7z12NN8XA\n iaeNFfDkby4nnbsLHqnqyTjQY+AdKR0UNGTZ809+GLWBhtcWCgQiS3JADbRd9ZKzJ8ONXjAbEpZ\n 99h8sZ0FJvzSz2PGv7IaXCo3cqySnFEdT+VwwERLBI5EI7pKjhAB6NyubCp/kEirbHBpzHCjZ0L\n yx3QXs+kG7RCf00XpJ10P43VRAxrCHQewwep4f+cNEAH9s2M3yPWG06WzSwDRlEIv3bY5cs8fgb\n ajRIS4Iz2nvXvIYow3ZRXy6sblw/QzjUqVdyXu3eMeUINOPIiligynXi4GHuFNNBapF06lEUlDS\n ZErx1ZXfeUQoI3jUDai0serab/kWMOf+Pq/NbWKtq/2iCv+3Z5XlQb4GP71RBOkWbA2yhxMJO/J\n SDpRyW5VJUyYK+EyY2u22vvStgqVD5/9nitRhvMxx2n7y2d3Wg/I34IYlyYN5ykHks0UYUtO9J", "X-Received": "by 2002:a05:6000:2308:b0:43b:6a16:17e with SMTP id\n ffacd0b85a97d-43b88994d97mr7991806f8f.11.1774473522203;\n Wed, 25 Mar 2026 14:18:42 -0700 (PDT)", "From": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>", "To": "qemu-devel@nongnu.org", "Cc": "Glenn Miles <milesg@linux.ibm.com>,\n Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,\n Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org,\n Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,\n Fabiano Rosas <farosas@suse.de>, Alistair Francis <alistair.francis@wdc.com>,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>,\n =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>, qemu-riscv@nongnu.org,\n Paolo Bonzini <pbonzini@redhat.com>, Artyom Tarasenko <atar4qemu@gmail.com>,\n Anton Johansson <anjo@rev.ng>, Peter Xu <peterx@redhat.com>, =?utf-8?q?Phil?=\n\t=?utf-8?q?ippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>,\n Zhao Liu <zhao1.liu@intel.com>, Jiaxun Yang <jiaxun.yang@flygoat.com>,\n Palmer Dabbelt <palmer@dabbelt.com>, Weiwei Li <liwei1518@gmail.com>,\n Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,\n Chao Liu <chao.liu.zevorn@gmail.com>, Chinmay Rath <rathc@linux.ibm.com>", "Subject": "[PATCH-for-11.1 10/10] migration: Restrict legacy VMSTATE_UINTTL()\n macros to few targets", "Date": "Wed, 25 Mar 2026 22:17:28 +0100", "Message-ID": "<20260325211728.89204-11-philmd@linaro.org>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260325211728.89204-1-philmd@linaro.org>", "References": "<20260325211728.89204-1-philmd@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::433;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-ppc@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<qemu-ppc.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-ppc>", "List-Post": "<mailto:qemu-ppc@nongnu.org>", "List-Help": "<mailto:qemu-ppc-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-ppc>,\n <mailto:qemu-ppc-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Only 5 base targets use VMSTATE_UINTTL (MIPS, PPC, X86, SPARC and\nRISCV). In order to build a single binary (preliminary step toward\nheterogeneous emulation) we need to remove it, but it will take some\ntime. Add a temporary TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API\ndefinition to keep targets not using these macros clean while we keep\ncleaning the last few targets one by one, preventing legacy uses to\ncreep back in.\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n configs/targets/i386-softmmu.mak | 1 +\n configs/targets/mips-softmmu.mak | 1 +\n configs/targets/mips64-softmmu.mak | 1 +\n configs/targets/mips64el-softmmu.mak | 1 +\n configs/targets/mipsel-softmmu.mak | 1 +\n configs/targets/ppc-softmmu.mak | 1 +\n configs/targets/ppc64-softmmu.mak | 1 +\n configs/targets/riscv32-softmmu.mak | 1 +\n configs/targets/riscv64-softmmu.mak | 1 +\n configs/targets/sparc-softmmu.mak | 1 +\n configs/targets/sparc64-softmmu.mak | 1 +\n configs/targets/x86_64-softmmu.mak | 1 +\n include/migration/cpu.h | 24 +++++++++++-------------\n target/ppc/machine.c | 1 +\n scripts/make-config-poison.sh | 1 +\n 15 files changed, 25 insertions(+), 13 deletions(-)", "diff": "diff --git a/configs/targets/i386-softmmu.mak b/configs/targets/i386-softmmu.mak\nindex 38a8f85201f..048ae17fdc5 100644\n--- a/configs/targets/i386-softmmu.mak\n+++ b/configs/targets/i386-softmmu.mak\n@@ -4,3 +4,4 @@ TARGET_KVM_HAVE_RESET_PARKED_VCPU=y\n TARGET_XML_FILES= i386-32bit.xml\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/mips-softmmu.mak b/configs/targets/mips-softmmu.mak\nindex 95397af9442..81990d21880 100644\n--- a/configs/targets/mips-softmmu.mak\n+++ b/configs/targets/mips-softmmu.mak\n@@ -2,3 +2,4 @@ TARGET_ARCH=mips\n TARGET_BIG_ENDIAN=y\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/mips64-softmmu.mak b/configs/targets/mips64-softmmu.mak\nindex f9cc41b9ed4..2f7873af06d 100644\n--- a/configs/targets/mips64-softmmu.mak\n+++ b/configs/targets/mips64-softmmu.mak\n@@ -3,3 +3,4 @@ TARGET_BASE_ARCH=mips\n TARGET_BIG_ENDIAN=y\n TARGET_LONG_BITS=64\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/mips64el-softmmu.mak b/configs/targets/mips64el-softmmu.mak\nindex 4e7dedc5f30..62e74f77ba5 100644\n--- a/configs/targets/mips64el-softmmu.mak\n+++ b/configs/targets/mips64el-softmmu.mak\n@@ -2,3 +2,4 @@ TARGET_ARCH=mips64\n TARGET_BASE_ARCH=mips\n TARGET_LONG_BITS=64\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/mipsel-softmmu.mak b/configs/targets/mipsel-softmmu.mak\nindex b0fba8a9d0a..57e556b93b8 100644\n--- a/configs/targets/mipsel-softmmu.mak\n+++ b/configs/targets/mipsel-softmmu.mak\n@@ -1,3 +1,4 @@\n TARGET_ARCH=mips\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/ppc-softmmu.mak b/configs/targets/ppc-softmmu.mak\nindex 867898bd47c..1e28d40b440 100644\n--- a/configs/targets/ppc-softmmu.mak\n+++ b/configs/targets/ppc-softmmu.mak\n@@ -3,3 +3,4 @@ TARGET_BIG_ENDIAN=y\n TARGET_KVM_HAVE_GUEST_DEBUG=y\n TARGET_XML_FILES= power-core.xml power-fpu.xml power-altivec.xml power-spe.xml\n TARGET_LONG_BITS=32\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/ppc64-softmmu.mak b/configs/targets/ppc64-softmmu.mak\nindex 10d7a2681e7..8c7171f9d5e 100644\n--- a/configs/targets/ppc64-softmmu.mak\n+++ b/configs/targets/ppc64-softmmu.mak\n@@ -6,3 +6,4 @@ TARGET_XML_FILES= power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml\n # all boards require libfdt\n TARGET_NEED_FDT=y\n TARGET_LONG_BITS=64\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/riscv32-softmmu.mak b/configs/targets/riscv32-softmmu.mak\nindex 26080599be7..a9cd8ae89ee 100644\n--- a/configs/targets/riscv32-softmmu.mak\n+++ b/configs/targets/riscv32-softmmu.mak\n@@ -5,3 +5,4 @@ TARGET_XML_FILES= riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri\n TARGET_NEED_FDT=y\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/riscv64-softmmu.mak b/configs/targets/riscv64-softmmu.mak\nindex 5059c550480..3f97cd6dfa5 100644\n--- a/configs/targets/riscv64-softmmu.mak\n+++ b/configs/targets/riscv64-softmmu.mak\n@@ -6,3 +6,4 @@ TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri\n TARGET_NEED_FDT=y\n TARGET_LONG_BITS=64\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/sparc-softmmu.mak b/configs/targets/sparc-softmmu.mak\nindex 126ce12abb0..0630fa54b43 100644\n--- a/configs/targets/sparc-softmmu.mak\n+++ b/configs/targets/sparc-softmmu.mak\n@@ -4,3 +4,4 @@ TARGET_XML_FILES=sparc32-cpu.xml sparc32-fpu.xml sparc32-cp0.xml\n TARGET_LONG_BITS=32\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/sparc64-softmmu.mak b/configs/targets/sparc64-softmmu.mak\nindex 4e621fb8e39..500db845ea9 100644\n--- a/configs/targets/sparc64-softmmu.mak\n+++ b/configs/targets/sparc64-softmmu.mak\n@@ -5,3 +5,4 @@ TARGET_XML_FILES=sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml\n TARGET_LONG_BITS=64\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/configs/targets/x86_64-softmmu.mak b/configs/targets/x86_64-softmmu.mak\nindex c7f8746b4f5..18b3575e4e2 100644\n--- a/configs/targets/x86_64-softmmu.mak\n+++ b/configs/targets/x86_64-softmmu.mak\n@@ -5,3 +5,4 @@ TARGET_KVM_HAVE_RESET_PARKED_VCPU=y\n TARGET_XML_FILES= i386-64bit.xml i386-64bit-apx.xml\n TARGET_LONG_BITS=64\n TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y\n+TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API=y\ndiff --git a/include/migration/cpu.h b/include/migration/cpu.h\nindex 05a1ddde343..4c8c9c34cc8 100644\n--- a/include/migration/cpu.h\n+++ b/include/migration/cpu.h\n@@ -3,25 +3,23 @@\n #ifndef MIGRATION_CPU_H\n #define MIGRATION_CPU_H\n \n+#ifdef TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API\n+\n #include \"exec/cpu-defs.h\"\n-#include \"migration/qemu-file-types.h\"\n #include \"migration/vmstate.h\"\n \n #if TARGET_LONG_BITS == 64\n-#define VMSTATE_UINTTL_V(_f, _s, _v) \\\n- VMSTATE_UINT64_V(_f, _s, _v)\n-#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \\\n- VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v)\n+#define VMSTATE_UINTTL(_f, _s) \\\n+ VMSTATE_UINT64_V(_f, _s, 0)\n+#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \\\n+ VMSTATE_UINT64_ARRAY_V(_f, _s, _n, 0)\n #else\n-#define VMSTATE_UINTTL_V(_f, _s, _v) \\\n- VMSTATE_UINT32_V(_f, _s, _v)\n-#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \\\n- VMSTATE_UINT32_ARRAY_V(_f, _s, _n, _v)\n+#define VMSTATE_UINTTL(_f, _s) \\\n+ VMSTATE_UINT32_V(_f, _s, 0)\n+#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \\\n+ VMSTATE_UINT32_ARRAY_V(_f, _s, _n, 0)\n #endif\n \n-#define VMSTATE_UINTTL(_f, _s) \\\n- VMSTATE_UINTTL_V(_f, _s, 0)\n-#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \\\n- VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, 0)\n+#endif /* TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API */\n \n #endif\ndiff --git a/target/ppc/machine.c b/target/ppc/machine.c\nindex 49cfdc6d674..f6169a128dc 100644\n--- a/target/ppc/machine.c\n+++ b/target/ppc/machine.c\n@@ -5,6 +5,7 @@\n #include \"helper_regs.h\"\n #include \"mmu-hash64.h\"\n #include \"migration/cpu.h\"\n+#include \"migration/qemu-file-types.h\"\n #include \"qapi/error.h\"\n #include \"kvm_ppc.h\"\n #include \"power8-pmu.h\"\ndiff --git a/scripts/make-config-poison.sh b/scripts/make-config-poison.sh\nindex b4d61e8bc9e..a1c5fa77d9d 100755\n--- a/scripts/make-config-poison.sh\n+++ b/scripts/make-config-poison.sh\n@@ -12,6 +12,7 @@ exec sed -n \\\n -e '/CONFIG_SOFTMMU/d' \\\n -e '/TARGET_NOT_USING_LEGACY_LDST_PHYS_API/d' \\\n -e '/TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API/d' \\\n+ -e '/TARGET_USING_LEGACY_MIGRATION_VMSTATE_UINTTL_API/d' \\\n -e '/^#define / {' \\\n -e 's///' \\\n -e 's/ .*//' \\\n", "prefixes": [ "PATCH-for-11.1", "10/10" ] }