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GET /api/patches/2216099/?format=api
{ "id": 2216099, "url": "http://patchwork.ozlabs.org/api/patches/2216099/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260325192601.239554-7-jonathanh@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325192601.239554-7-jonathanh@nvidia.com>", "list_archive_url": null, "date": "2026-03-25T19:25:56", "name": "[06/10] soc/tegra: pmc: Add AOWAKE regs for Tegra264", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "547f590ac71789c0f52461b716ab520d80db57fb", "submitter": { "id": 66273, "url": "http://patchwork.ozlabs.org/api/people/66273/?format=api", "name": "Jon Hunter", "email": "jonathanh@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260325192601.239554-7-jonathanh@nvidia.com/mbox/", "series": [ { "id": 497504, "url": "http://patchwork.ozlabs.org/api/series/497504/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=497504", "date": "2026-03-25T19:25:50", "name": "soc/tegra: pmc: Fixes and updates for Tegra264", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497504/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216099/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216099/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-tegra+bounces-13249-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=n8CrJDYK;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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pr=C", "From": "Jon Hunter <jonathanh@nvidia.com>", "To": "Thierry Reding <thierry.reding@gmail.com>", "CC": "<linux-tegra@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com>", "Subject": "[PATCH 06/10] soc/tegra: pmc: Add AOWAKE regs for Tegra264", "Date": "Wed, 25 Mar 2026 19:25:56 +0000", "Message-ID": "<20260325192601.239554-7-jonathanh@nvidia.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260325192601.239554-1-jonathanh@nvidia.com>", "References": "<20260325192601.239554-1-jonathanh@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-NVConfidentiality": "public", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL02EPF0001A0FA:EE_|SJ2PR12MB8036:EE_", "X-MS-Office365-Filtering-Correlation-Id": "554b1c81-9649-42f0-fc43-08de8aa47586", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|1800799024|36860700016|376014|82310400026|56012099003|18002099003|22082099003;", "X-Microsoft-Antispam-Message-Info": "\n\tudTByI/RMd37A7hztEiscuqf+GFQJ5tk3dE0UqKoJkyy+aeOuAfv33AhnPhx982lzIpHCs9s70VZ5XXvGATLbFjX3jSvveAl0xtMprrUy1wIM+QZzp5KBTDN6i2rJ4HwDZpPuHRI+DArR0r/o69s3aeEaF6QQ2+S5G+1W80JOX6O4U7Kwse3rpDfQ0I+cl7nOB6k2fpIK5VaNDrkvXfztrQ7LT4zc6i2bQpF7F7kjThhr1DeYJD81cPQKfgkz/pNnFC6YaJZPdaUyg7Ui2KLrpQ7SjGW1YKu3mtaPfI5BFqZTZh144lOgkeVs4l0DyZRFQnrArXxCYVq3joLj1u4ljaEojMMvP3Cn1hxDGY6vJ7R003fAhWmSL7YXUe8ULYEnPRfYw9WmUxOGwltJv+587nGksZ61zvaxeJOgtBCZNbr9zEeAS9KwVO9QCqQJU9Ko5g+hxjfKUn6SiRB7viupOWN2Hy+RgNcYTtpew0UmK0ZaXN2BV38h1wXPHO1gWTDNt/+IA5sEon4y08ZYgpcg2uS0I7F2Pw2dkxISMGx/6qDIbZD9ZrJCwVGh8VXsncbZYuZShibAnpgjJCYXwSrZFKRm2+U6CRqaZ+p4t6qwMQkZ4G1wE2lpBDlDyLfOC9KG/jKVGfsArC63+GhqBjHSN8UCODKkDbq0D0aMzpiebz9NN3fRSzC9eQIY8uGrOeJqezBVy5HSFY6Ybau0y5jIe7/pSQeq81nq74O1JnommnYAqCS3eviccVHkFU+4E2gOGIvFGN39AVSddqK57rhdg==", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700016)(376014)(82310400026)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tx1lVGCDOd1hxBUXB+nw5MkQ8oT436M159yyj7cOsPBeAdY22asmWht38pRB0Xu2G38iquwiLhD1RaQ4ZK0//6O4jP6BhHuUPkG6a3uror/9WO4kApVTUOKejj5uVqn6n8HnI0//x2ZBxmn1lybxrXbqQpJa/0+7xIzqkBvJzhQN5w7ADxXCpRGlxJZNnKaj2uxsrvPgfMksEeoQek/A/Z+In2szhHAYCybtG+5MnSgYGlqJXZj4yp9s4Dz2BF9hPot6+fhYm0vny0N+htxJNVW2ax5fusutAl7hwOCEdrzy2zuvW9veeXu+FlW7svbrFgfNF4yGFKoD/YkXzpOm6Q48G8zdUmEBnosjm2eZGyEVPtYtThFZS7HNcbJp2F7170bYhN/DxKtQovVPqfTYc7QOqLnuGqEoVGiXL8gLFTiwxudksbx4c0Orr4c73jYss", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "25 Mar 2026 19:26:48.2419\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 554b1c81-9649-42f0-fc43-08de8aa47586", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tBL02EPF0001A0FA.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SJ2PR12MB8036" }, "content": "Populate the AOWAKE register offsets for Tegra264.\n\nSigned-off-by: Jon Hunter <jonathanh@nvidia.com>\n---\n drivers/soc/tegra/pmc.c | 8 ++++++++\n 1 file changed, 8 insertions(+)", "diff": "diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c\nindex 42176abb96ea..7a5262705d69 100644\n--- a/drivers/soc/tegra/pmc.c\n+++ b/drivers/soc/tegra/pmc.c\n@@ -4538,6 +4538,14 @@ static const struct tegra_pmc_regs tegra264_pmc_regs = {\n \t.rst_source_mask = 0x1fc,\n \t.rst_level_shift = 0x0,\n \t.rst_level_mask = 0x3,\n+\t.aowake_mask_w = 0x200,\n+\t.aowake_status_w = 0x410,\n+\t.aowake_status_r = 0x610,\n+\t.aowake_tier2_routing = 0x660,\n+\t.aowake_sw_status_w = 0x624,\n+\t.aowake_sw_status = 0x628,\n+\t.aowake_latch_sw = 0x620,\n+\t.aowake_ctrl = 0x68c,\n };\n \n static const char * const tegra264_reset_sources[] = {\n", "prefixes": [ "06/10" ] }