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GET /api/patches/2216084/?format=api
{ "id": 2216084, "url": "http://patchwork.ozlabs.org/api/patches/2216084/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260325192628.750398-4-lukas.schmid@netcube.li/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325192628.750398-4-lukas.schmid@netcube.li>", "list_archive_url": null, "date": "2026-03-25T19:26:10", "name": "[3/6] sunxi: add SPC setup for R528/T113 secure boot handoff", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3c6fc410efb52b70b20e9245bf0af11e2ae3d0a8", "submitter": { "id": 90004, "url": "http://patchwork.ozlabs.org/api/people/90004/?format=api", "name": "Lukas Schmid", "email": "lukas.schmid@netcube.li" }, "delegate": { "id": 114289, "url": "http://patchwork.ozlabs.org/api/users/114289/?format=api", "username": "apritzel", "first_name": "Andre", "last_name": "Przywara", "email": "andre.przywara@arm.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260325192628.750398-4-lukas.schmid@netcube.li/mbox/", "series": [ { "id": 497505, "url": "http://patchwork.ozlabs.org/api/series/497505/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=497505", "date": "2026-03-25T19:26:07", "name": "sunxi: add NetCube Nagami support and T113 secure boot enablement", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497505/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216084/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216084/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=netcube.li header.i=@netcube.li header.a=rsa-sha256\n header.s=s1 header.b=bqBLI3cl;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=netcube.li", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=netcube.li header.i=@netcube.li header.b=\"bqBLI3cl\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=netcube.li", "phobos.denx.de;\n spf=pass smtp.mailfrom=lukas.schmid@netcube.li" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgxkX2TlJz1y1K\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 26 Mar 2026 06:27:32 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 6983083FEC;\n\tWed, 25 Mar 2026 20:27:25 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id A29F283FD9; Wed, 25 Mar 2026 20:27:23 +0100 (CET)", "from mail.netcube.li (mail.netcube.li [173.249.15.149])\n (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 6B16483FA7\n for <u-boot@lists.denx.de>; Wed, 25 Mar 2026 20:27:20 +0100 (CET)", "from lukas-hpz440workstation.lan.sk100508.local\n (193-80-178-216.hdsl.highway.telekom.at [193.80.178.216])\n by mail.netcube.li with ESMTPA ; Wed, 25 Mar 2026 20:27:18 +0100" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_RPBL_BLOCKED,RCVD_IN_VALIDITY_SAFE_BLOCKED,\n SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2", "dkim-signature": "v=1; a=rsa-sha256; d=netcube.li; s=s1;\n c=relaxed/relaxed; q=dns/txt;\n h=From:Subject:Date:Message-ID:To:CC:MIME-Version:Content-Transfer-Encoding:In-Reply-To:References;\n bh=D64yMnijWbHgGWDWA/CqZFKx5yQYF/sP68dY4oYva+8=;\n b=bqBLI3clWe1vlYWJpCZw5LDNTxnkL+j9EXWkvF7balVCDWveUxHzvvw8Lm4ZaUKX+aeVqdnM4HtyVjB6TdWAMjbCDZ3Mmk8yBiRtvUJKy0SqzylLudCPBu1VDCp2Jnqbo1QCxbxwLhLpObIJrhOz3c0P27f2H9FvSk7Pph4e29s=", "From": "Lukas Schmid <lukas.schmid@netcube.li>", "To": "Andre Przywara <andre.przywara@arm.com>, Tom Rini <trini@konsulko.com>,\n Hans de Goede <hdegoede@redhat.com>,\n Jerome Forissier <jerome.forissier@arm.com>", "Cc": "Lukas Schmid <lukas.schmid@netcube.li>,\n\tu-boot@lists.denx.de", "Subject": "[PATCH 3/6] sunxi: add SPC setup for R528/T113 secure boot handoff", "Date": "Wed, 25 Mar 2026 20:26:10 +0100", "Message-ID": "<20260325192628.750398-4-lukas.schmid@netcube.li>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260325192628.750398-1-lukas.schmid@netcube.li>", "References": "<20260325192628.750398-1-lukas.schmid@netcube.li>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "The R528/T113 family protects peripheral access through the SPC, and\nalso uses security switch registers in the CCU, PRCM and DMA\ncontroller.\n\nConfigure these blocks during early platform init so Linux can access\nthe peripherals after U-Boot hands off control when booting in secure\nmode. Add an R528/T113-specific SPC init step alongside the existing\nearly security controller setup, allow non-secure DMA access there, and\nswitch the CCU and PRCM buses to non-secure access in clock_init_sec().\n\nSigned-off-by: Lukas Schmid <lukas.schmid@netcube.li>\n---\n arch/arm/cpu/armv7/sunxi/Makefile | 1 +\n arch/arm/cpu/armv7/sunxi/spc.c | 20 ++++++++++++++\n .../include/asm/arch-sunxi/cpu_sunxi_ncat2.h | 27 +++++++++++++++++++\n arch/arm/include/asm/arch-sunxi/sys_proto.h | 8 ++++++\n arch/arm/mach-sunxi/board.c | 1 +\n arch/arm/mach-sunxi/clock_sun50i_h6.c | 8 ++++++\n 6 files changed, 65 insertions(+)\n create mode 100644 arch/arm/cpu/armv7/sunxi/spc.c", "diff": "diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile\nindex 0624e93efde..bc19f6a203c 100644\n--- a/arch/arm/cpu/armv7/sunxi/Makefile\n+++ b/arch/arm/cpu/armv7/sunxi/Makefile\n@@ -8,6 +8,7 @@\n \n obj-$(CONFIG_MACH_SUN6I)\t+= tzpc.o\n obj-$(CONFIG_MACH_SUN8I_H3)\t+= tzpc.o\n+obj-$(CONFIG_MACH_SUN8I_R528)\t+= spc.o\n \n obj-$(CONFIG_MACH_SUN6I)\t+= sram.o\n obj-$(CONFIG_MACH_SUN8I)\t+= sram.o\ndiff --git a/arch/arm/cpu/armv7/sunxi/spc.c b/arch/arm/cpu/armv7/sunxi/spc.c\nnew file mode 100644\nindex 00000000000..bdecfaa1b4b\n--- /dev/null\n+++ b/arch/arm/cpu/armv7/sunxi/spc.c\n@@ -0,0 +1,20 @@\n+// SPDX-License-Identifier: GPL-2.0+\n+/*\n+ * (C) Copyright 2015 Chen-Yu Tsai <wens@csie.org>\n+ * (C) Copyright 2026 Lukas Schmid <lukas.schmid@netcube.li>\n+ */\n+\n+#include <asm/io.h>\n+#include <asm/arch/cpu.h>\n+#include <asm/arch/sys_proto.h>\n+\n+void spc_init(void)\n+{\n+\tstruct sunxi_spc *spc = (struct sunxi_spc *)SUNXI_SPC_BASE;\n+\tint i;\n+\n+\tfor (i = 0; i < SUNXI_SPC_NUM_PORTS; i++)\n+\t\twritel(SUNXI_SPC_DECPORT_MASK, &spc->decport[i].set);\n+\n+\twritel(SUNXI_DMA_SEC_MASK, SUNXI_DMA_BASE + SUNXI_DMA_SEC_REG);\n+}\ndiff --git a/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h\nindex bcfdc0a41c5..7a4d25e6e78 100644\n--- a/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h\n+++ b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h\n@@ -7,6 +7,7 @@\n #ifndef _SUNXI_CPU_SUNXI_NCAT2_H\n #define _SUNXI_CPU_SUNXI_NCAT2_H\n \n+#define SUNXI_SPC_BASE\t\t\t0x02000800\n #define SUNXI_CCM_BASE\t\t\t0x02001000\n #define SUNXI_TIMER_BASE\t\t0x02050000\n \n@@ -16,6 +17,7 @@\n #define SUNXI_TWI3_BASE\t\t\t0x02502C00\n \n #define SUNXI_SRAMC_BASE\t\t0x03000000\n+#define SUNXI_DMA_BASE\t\t\t0x03002000\n /* SID address space starts at 0x03006000, but e-fuse is at offset 0x200 */\n #define SUNXI_SIDC_BASE\t\t\t0x03006000\n #define SUNXI_SID_BASE\t\t\t0x03006200\n@@ -50,7 +52,32 @@\n \n #define SUNXI_CPU_PLL_CFG_BASE\t\t0x08817000\n \n+#ifdef CONFIG_MACH_SUN8I_R528\n+#define SUNXI_CCM_SEC_SWITCH_REG (SUNXI_CCM_BASE + 0x0f00)\n+#define SUNXI_CCM_SEC_SWITCH_NONSEC\t0x7\n+#define SUNXI_PRCM_SEC_SWITCH_REG (SUNXI_PRCM_BASE + 0x0290)\n+#define SUNXI_PRCM_SEC_SWITCH_NONSEC\t0x1\n+#define SUNXI_SPC_DECPORT_STA_REG(p) (SUNXI_SPC_BASE + 0x0000 + 0x10 * (p))\n+#define SUNXI_SPC_DECPORT_SET_REG(p) (SUNXI_SPC_BASE + 0x0004 + 0x10 * (p))\n+#define SUNXI_SPC_DECPORT_CLR_REG(p) (SUNXI_SPC_BASE + 0x0008 + 0x10 * (p))\n+#define SUNXI_SPC_NUM_PORTS 13\n+#define SUNXI_SPC_DECPORT_MASK\t\t0xffffffff\n+#define SUNXI_DMA_SEC_REG\t\t0x20\n+#define SUNXI_DMA_SEC_MASK\t\t0xffff\n+#endif\n+\n #ifndef __ASSEMBLY__\n+struct sunxi_spc_decport {\n+\tu32 status;\n+\tu32 set;\n+\tu32 clear;\n+\tu32 reserved;\n+};\n+\n+struct sunxi_spc {\n+\tstruct sunxi_spc_decport decport[SUNXI_SPC_NUM_PORTS];\n+};\n+\n void sunxi_board_init(void);\n void sunxi_reset(void);\n int sunxi_get_sid(unsigned int *sid);\ndiff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h\nindex 6f70753e948..a006e592f83 100644\n--- a/arch/arm/include/asm/arch-sunxi/sys_proto.h\n+++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h\n@@ -18,6 +18,14 @@ bool sunxi_get_unique_sid(unsigned int *sid);\n /* Build legacy-compatible SID-derived locally administered MAC address. */\n bool sunxi_get_sid_mac_addr(int index, u8 mac[6]);\n \n+#ifdef CONFIG_MACH_SUN8I_R528\n+void spc_init(void);\n+#else\n+static inline void spc_init(void)\n+{\n+}\n+#endif\n+\n /* return_to_fel() - Return to BROM from SPL\n *\n * This returns back into the BROM after U-Boot SPL has performed its initial\ndiff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c\nindex 432b1c10f92..4d98d350cbe 100644\n--- a/arch/arm/mach-sunxi/board.c\n+++ b/arch/arm/mach-sunxi/board.c\n@@ -475,6 +475,7 @@ void board_init_f(ulong dummy)\n \n \t/* Enable non-secure access to some peripherals */\n \ttzpc_init();\n+\tspc_init();\n \n \ttimer_init();\n \tclock_init();\ndiff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c\nindex 80004f13a1e..217d47c8770 100644\n--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c\n+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c\n@@ -74,6 +74,14 @@ void clock_init_safe(void)\n \t}\n }\n \n+void clock_init_sec(void)\n+{\n+\tif (IS_ENABLED(CONFIG_MACH_SUN8I_R528)) {\n+\t\twritel(SUNXI_CCM_SEC_SWITCH_NONSEC, SUNXI_CCM_SEC_SWITCH_REG);\n+\t\twritel(SUNXI_PRCM_SEC_SWITCH_NONSEC, SUNXI_PRCM_SEC_SWITCH_REG);\n+\t}\n+}\n+\n void clock_init_uart(void)\n {\n \tvoid *const ccm = (void *)SUNXI_CCM_BASE;\n", "prefixes": [ "3/6" ] }