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GET /api/patches/2216051/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2216051,
    "url": "http://patchwork.ozlabs.org/api/patches/2216051/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325184259.366-6-alireza.sanaee@huawei.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260325184259.366-6-alireza.sanaee@huawei.com>",
    "list_archive_url": null,
    "date": "2026-03-25T18:42:53",
    "name": "[5/9] hw/cxl: Map lazy memory backend after host acceptance",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "d1f711fab5e7a5ee372a12abd0ff20ff2a271d1c",
    "submitter": {
        "id": 90159,
        "url": "http://patchwork.ozlabs.org/api/people/90159/?format=api",
        "name": "Alireza Sanaee",
        "email": "alireza.sanaee@huawei.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325184259.366-6-alireza.sanaee@huawei.com/mbox/",
    "series": [
        {
            "id": 497484,
            "url": "http://patchwork.ozlabs.org/api/series/497484/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497484",
            "date": "2026-03-25T18:42:48",
            "name": "Application Specific Tagged Memory Support in CXL Type 3 Devices",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/497484/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2216051/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2216051/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)",
        "Received": [
            "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgwqN47L1z1xy3\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 26 Mar 2026 05:46:40 +1100 (AEDT)",
            "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w5TFA-0004Mr-Us; Wed, 25 Mar 2026 14:46:16 -0400",
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            "from frasgout.his.huawei.com ([185.176.79.56])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <alireza.sanaee@huawei.com>)\n id 1w5TEu-00083H-Mo\n for qemu-devel@nongnu.org; Wed, 25 Mar 2026 14:46:02 -0400",
            "from mail.maildlp.com (unknown [172.18.224.107])\n by frasgout.his.huawei.com (SkyGuard) with ESMTPS id 4fgwnn6sp4zHnGjr;\n Thu, 26 Mar 2026 02:45:17 +0800 (CST)",
            "from dubpeml500005.china.huawei.com (unknown [7.214.145.207])\n by mail.maildlp.com (Postfix) with ESMTPS id C5BF540584;\n Thu, 26 Mar 2026 02:45:53 +0800 (CST)",
            "from a2303103017.china.huawei.com (10.47.66.203) by\n dubpeml500005.china.huawei.com (7.214.145.207) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.11; Wed, 25 Mar 2026 18:45:52 +0000"
        ],
        "To": "<qemu-devel@nongnu.org>",
        "CC": "<anisa.su@samsung.com>, <armbru@redhat.com>, <berrange@redhat.com>,\n <eblake@redhat.com>, <jonathan.cameron@huawei.com>,\n <linux-cxl@vger.kernel.org>, <linuxarm@huawei.com>, <lizhijian@fujitsu.com>,\n <mst@redhat.com>, <pbonzini@redhat.com>, <gourry@gourry.net>,\n <nifan.cxl@gmail.com>, <me@linux.beauty>",
        "Subject": "[PATCH 5/9] hw/cxl: Map lazy memory backend after host acceptance",
        "Date": "Wed, 25 Mar 2026 18:42:53 +0000",
        "Message-ID": "<20260325184259.366-6-alireza.sanaee@huawei.com>",
        "X-Mailer": "git-send-email 2.51.0.windows.2",
        "In-Reply-To": "<20260325184259.366-1-alireza.sanaee@huawei.com>",
        "References": "<20260325184259.366-1-alireza.sanaee@huawei.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[10.47.66.203]",
        "X-ClientProxiedBy": "lhrpeml500011.china.huawei.com (7.191.174.215) To\n dubpeml500005.china.huawei.com (7.214.145.207)",
        "Received-SPF": "pass client-ip=185.176.79.56;\n envelope-from=alireza.sanaee@huawei.com; helo=frasgout.his.huawei.com",
        "X-Spam_score_int": "-41",
        "X-Spam_score": "-4.2",
        "X-Spam_bar": "----",
        "X-Spam_report": "(-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no",
        "X-Spam_action": "no action",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "qemu development <qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
        "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>",
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        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Reply-to": "Alireza Sanaee <alireza.sanaee@huawei.com>",
        "From": "Alireza Sanaee via qemu development <qemu-devel@nongnu.org>",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"
    },
    "content": "In the dc-regions-total-size flow, a requested extent is not backed when it\nis queued. It becomes usable only after the host accepts it with Add\nDynamic Capacity Response.\n\nUse that response path to look up the first pending group's metadata for\neach accepted extent, enable the selected host backend, and move the\nbackend and fixed-window references onto the committed extent list. The\naccepted range is then marked backed just like the non-lazy path.\n\nThis wires host acceptance to the lazy backend lifecycle and leaves the\nfixed-window direct aliasing to the following patch.\n\nSigned-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>\n---\n hw/cxl/cxl-mailbox-utils.c | 76 ++++++++++++++++++++++++++++++++++++--\n 1 file changed, 73 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c\nindex c5427adb3a..cc7be6e68c 100644\n--- a/hw/cxl/cxl-mailbox-utils.c\n+++ b/hw/cxl/cxl-mailbox-utils.c\n@@ -3668,6 +3668,28 @@ static CXLRetCode cxl_detect_malformed_extent_list(CXLType3Dev *ct3d,\n     return CXL_MBOX_SUCCESS;\n }\n \n+/* Find extent details (backend, window, tag, rid) in the first pending group */\n+static bool cxl_extent_find_extent_detail(CXLDCExtentGroupList *list,\n+                                          uint64_t start_dpa, uint64_t len,\n+                                          uint8_t *tag, HostMemoryBackend **hmb,\n+                                          struct CXLFixedWindow **fw, int *rid)\n+{\n+    CXLDCExtent *ent;\n+    CXLDCExtentGroup *group = QTAILQ_FIRST(list);\n+\n+    QTAILQ_FOREACH(ent, &group->list, node) {\n+        if (ent->start_dpa == start_dpa && ent->len == len) {\n+            *fw = ent->fw;\n+            *hmb = ent->hm;\n+            memcpy(tag, ent->tag, 0x10);\n+            *rid = ent->rid;\n+            return true;\n+        }\n+    }\n+\n+    return false;\n+}\n+\n static CXLRetCode cxl_dcd_add_dyn_cap_rsp_dry_run(CXLType3Dev *ct3d,\n         const CXLUpdateDCExtentListInPl *in)\n {\n@@ -3718,8 +3740,12 @@ static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd,\n     CXLUpdateDCExtentListInPl *in = (void *)payload_in;\n     CXLType3Dev *ct3d = CXL_TYPE3(cci->d);\n     CXLDCExtentList *extent_list = &ct3d->dc.extents;\n+    struct CXLFixedWindow *fw;\n+    HostMemoryBackend *hmb_dc;\n+    uint8_t tag[0x10];\n     uint32_t i, num;\n     uint64_t dpa, len;\n+    int rid;\n     CXLRetCode ret;\n \n     if (len_in < sizeof(*in)) {\n@@ -3756,10 +3782,54 @@ static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd,\n     for (i = 0; i < in->num_entries_updated; i++) {\n         dpa = in->updated_entries[i].start_dpa;\n         len = in->updated_entries[i].len;\n+        if (ct3d->dc.total_capacity_cmd) {\n+            bool found;\n+            MemoryRegion *mr;\n+\n+            found = cxl_extent_find_extent_detail(&ct3d->dc.extents_pending,\n+                                                  dpa, len, tag,\n+                                                  &hmb_dc, &fw, &rid);\n+\n+            /*\n+             * Host accepted an extent where device lacks details including\n+             * wrong DPA or wrong length.\n+             */\n+            if (!found) {\n+                qemu_log_mask(LOG_GUEST_ERROR,\n+                              \"Could not find the extent detail for DPA 0x%\"\n+                              PRIx64 \" LEN 0x%\" PRIx64 \"\\n\", dpa, len);\n+                return CXL_MBOX_INVALID_PA;\n+            }\n+\n+            /* The host memory backend should not be already mapped */\n+            if (host_memory_backend_is_mapped(hmb_dc)) {\n+                qemu_log_mask(LOG_GUEST_ERROR,\n+                              \"The host memory backend for DPA 0x%\" PRIx64\n+                              \" LEN 0x%\" PRIx64 \" is already mapped\\n\",\n+                              dpa, len);\n+                return CXL_MBOX_INVALID_PA;\n+            }\n \n-        cxl_insert_extent_to_extent_list(extent_list,\n-                                         NULL, NULL, dpa, len,\n-                                         NULL, 0, 0);\n+            mr = host_memory_backend_get_memory(hmb_dc);\n+            if (!mr) {\n+                qemu_log_mask(LOG_GUEST_ERROR,\n+                              \"Could not get memory region from \"\n+                              \"host memory backend\\n\");\n+                return CXL_MBOX_INVALID_PA;\n+            }\n+\n+            memory_region_set_nonvolatile(mr, false);\n+            memory_region_set_enabled(mr, true);\n+            host_memory_backend_set_mapped(hmb_dc, true);\n+\n+            cxl_insert_extent_to_extent_list(extent_list,\n+                                             hmb_dc, fw, dpa, len,\n+                                             NULL, 0, rid);\n+        } else {\n+            cxl_insert_extent_to_extent_list(extent_list,\n+                                             NULL, NULL, dpa, len,\n+                                             NULL, 0, -1);\n+        }\n         ct3d->dc.total_extent_count += 1;\n         ct3d->dc.nr_extents_accepted += 1;\n         ct3_set_region_block_backed(ct3d, dpa, len);\n",
    "prefixes": [
        "5/9"
    ]
}